I/O-Command-Codes
21 Standard CCW op-codes
22 Console
23 Card reader/punch
24 Printer
25 Magnetic Tape
26 DASD
Programming-Notes
31 BCT, BCTR, BXH, BXLE
32 TS, CS, CDS
33 CLCL, MVCL
34 CVB, CVD, PACK, UNPK
35 Divide, multiply, shift
36 ED, EDMK
37 MVN, MVO, MVZ
38 TRT
39 AL, SL (multi-word precision)
50 Call/Save/Return
1st-> 0 1 2 3 4 5 6 7 8 9 A B C D E F <-1st 0 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 0 1 1 17 33 49 65 81 97 113 129 145 161 177 193 209 225 241 1 2 2 18 34 50 66 82 98 114 130 146 162 178 194 210 226 242 2 3 3 19 35 51 67 83 99 115 131 147 163 179 195 211 227 243 3 4 4 20 36 52 68 84 100 116 132 148 164 180 196 212 228 244 4 5 5 21 37 53 69 85 101 117 133 149 165 181 197 213 229 245 5 6 6 22 38 54 70 86 102 118 134 150 166 182 198 214 230 246 6 7 7 23 39 55 71 87 103 119 135 151 167 183 199 215 231 247 7 8 8 24 40 56 72 88 104 120 136 152 168 184 200 216 232 248 8 9 9 25 41 57 73 89 105 121 137 153 169 185 201 217 233 249 9 A 10 26 42 58 74 90 106 122 138 154 170 186 202 218 234 250 A B 11 27 43 59 75 91 107 123 139 155 171 187 203 219 235 251 B C 12 28 44 60 76 92 108 124 140 156 172 188 204 220 236 252 C D 13 29 45 61 77 93 109 125 141 157 173 189 205 221 237 253 D E 14 30 46 62 78 94 110 126 142 158 174 190 206 222 238 254 E F 15 31 47 63 79 95 111 127 143 159 175 191 207 223 239 255 F 1st-> 0 1 2 3 4 5 6 7 8 9 A B C D E F <-1st
Dec Hex Binary Power of 16 0 0 0000 1 The largest number of N hexadecimal digits is 1 1 0001 16 one less than the Nth power of 16 -- eg. the 2 2 0010 256 largest 24-bit (6 hexadecimal digits) address 3 3 0011 4 096 is 16 777 215. 4 4 0100 65 536 5 5 0101 1 048 576 6 6 0110 16 777 216 7 7 0111 268 435 456 8 8 1000 4 294 967 296 9 9 1001 68 719 476 736 10 A 1010 1 099 511 627 776 11 B 1011 17 592 186 044 416 12 C 1100 281 474 976 710 656 13 D 1101 4 503 599 627 370 496 14 E 1110 72 057 594 037 927 936 15 F 1111 1 152 921 504 606 846 976
1st-> 0 1 2 3 4 5 6 7 8 9 A B C D E F <-1st
.
0 NUL DLE DS Sp & - { } \ 0 0
1 SOH DC1 SOS / a j A J 1 1
2 STX DC2 FS SYN b k s B K S 2 2
3 ETX DC3 WUS IR c l t C L T 3 3
4 SEL RES BYP PP d m u D M U 4 4
5 HT NL LF TRN e n v E N V 5 5
6 RNL BS ETB NBS f o w F O W 6 6
7 DEL POC ESC EOT g p x G P X 7 7
8 GE CAN SA SBS h q y H Q Y 8 8
9 SPS EM SFE IT i r z I R Z 9 9
.
A RPT UBS SM RFF ¢ ! ¦ : A
B VT CU1 CSP CU3 . $ , # B
C FF IFS MFA DC4 < * @ C
D CR IGS ENQ NAK ( ) _ ' D
E SO IRS ACK + ; > = E
F SI ITB BEL SUB | ¬ ? " EO F
1st-> 0 1 2 3 4 5 6 7 8 9 A B C D E F <-1st
1st-> 0 1 2 3 4 5 6 7 <-1st Not reliable on 3270 0 NUL DLE Sp 0 @ P p 0 60 grave accent 1 SOH DC1 ! 1 A Q a q 1 2 STX DC2 " 2 B R b r 2 3 ETX DC3 # 3 C S c s 3 4 EOT DC4 $ 4 D T d t 4 5 ENQ NAK 5 E U e u 5 6 ACK SYN & 6 F V f v 6 7 BEL ETB ' 7 G W g w 7 8 BS CAN ( 8 H X h x 8 9 HT EM ) 9 I Y i y 9 A LF SUB * : J Z j z A B VT ESC + ; K k B 5B left bracket 7B left brace C FF FS , < L l ¦ C 5C backslash D CR GS _ = M m D 5D right bracket 7D right brace E SO RS . > N n E 5E cap 7E tilde F SI US / ? O _ o DEL F 1st-> 0 1 2 3 4 5 6 7 <-1st Not reliable on 3270
Use Code Condition Equivalent
General B Unconditional BC 15
NOP No operation BC 0
BR 0 Pipeline drain BCR 15,0
Compare A with B BE Equal BC 8
and CS BNE Not equal BC 7
Compare A with B
BH A high BC 2
(but not CS) BNH A not high BC 13
BL A low BC 4
BNL A not low BC 11
Arithmetic, ICM, BP Positive BC 2
ED, EDMK, and BNP Not positive BC 13
LTR BM Negative BC 4
BNM Not negative BC 11
BZ Zero BC 8
BNZ Not zero BC 7
Arithmetic (but BO Overflow BC 1
not ICM etc) BNO No overflow BC 14
And, or, ex-or, test BZ Zero BC 8
and set, ISC BNZ Not zero BC 7
Test under mask BO Ones BC 1
BNO Not ones BC 14
BM Mixed BC 4
BNM Not mixed BC 11
BZ Zeroes BC 8
BNZ Not zeroes BC 7
Move characters long BE Equal length operands BC 8
BNE Unequal length BC 7
BP Padded BC 2
BNP Not padded BC 13
BO Overlap BC 1
BNO No overlap BC 14
BH, BL, etc are usable but less obvious.
+------+------+------+------+
Fullword | 0,4 | 2,4 |
+------+------+------+------+
+------+------+------+------+------+------+------+------+
Doubleword | 0,8 | 2,8 | 4,8 | 6,8 |
+------+------+------+------+------+------+------+------+
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
Hex--0 | Restart new PSW (IPL PSW) | Restart old PSW (IPL CCW 1) |
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
10 | (IPL CCW 2) | External old PSW |
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
20 | SVC old PSW | Program old PSW |
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
30 | Machine-check old PSW | Input/output old PSW |
+---+---+---+---+---+---+---+---8---+---+---+---C---+---+---+---+
40 | CSW | CAW | |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
50 | Interval timer| Trace tbl.dsg.| External new PSW |
+---+---+---+---4---+---+---+---8---+---+---+---+---+---+---+---+
60 | SVC new PSW | Program new PSW |
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
70 | Machine-check new PSW | Input/output new PSW |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
80 | External parm | External code | SVC code | Program code |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
.
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
Hex-90 | Translation | Mon cl| PER cd| PER address | Monitor code |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
A0 | | MAPL address | Channel ID | I/O ext log ad|
+---+---+---+---+---+---+---+---8---9---A---+---C---+---+---+---+
B0 | Limited channel logout |Msr|IO addr| |
+---+---+---+---4---+---+---+---+---9---A---+---C---+---+---+---+
C0 | |
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
D0 | | CPU timer save area |
+---+---+---+---+---+---+---+---8---+---+---+---+---+---+---+---+
E0 | Clock comparator save area | M/C check interrupt code |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
F0 | | External damg | Failing addr | Region code |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
100 | Fixed logout area | Prefix S.A. | Mod dep S.A. |
+---+---+---+---+---+---+---+---8---+---+---+---C---+---+---+---+
.
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
Hex-160 | Floating point register save area |
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
180 | General register save area |
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
1C0 | Control register save area |
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+---+---+---+---+---+---+---+---+---+---+---+---B---C---+---+---+
310 | |CPU| |
+---+---+---+---+---+---+---+---+---+---+---+---B---C---+---+---+
0-------------+-1-------+-------2---------------3---------------+
| Chan masks |E| Key |0 M W P| Interruption code |
0-------------+-1-------+-------2---------------3---------------+
4---+---+-------5---------------6---------------7---------------+
|ILC|CC | Mask | Instruction address |
4---+---+-------5---------------6---------------7---------------+
0-5 - Channels 0-5 masks 13 - (M) Machine check mask
6 - Channels 6 and up masks 14 - (W=1) Wait state
7 - (E) External mask 15 - (P=1) Problem state
Program mask bit 0 (PSW bit 36) - Fixed-point overflow
1 37 - Decimal overflow
2 38 - Exponent underflow
3 39 - Significance
0---------------1-------+-------2---+---+-------3---------------+
|0 R 0 0 0 T I E| Key |1 M W P S 0|CC | Mask |0 0 0 0 0 0 0 0|
0---------------1-------+-------2---+---+-------3---------------+
4---------------5---------------6---------------7---------------+
|0 0 0 0 0 0 0 0| Instruction address |
4---------------5---------------6---------------7---------------+
1 - (R) PER mask 13 - (M) Machine check mask
5 - (T=1) Translation mode 14 - (W=1) Wait state
6 - (I) I/O mask 15 - (P=1) Problem state
7 - (E) External mask 16 - (S=1) Secondary-space mode
Program mask bit 0 (PSW bit 20) - Fixed-point overflow
1 21 - Decimal overflow
2 22 - Exponent underflow
3 23 - Significance
0---------------1-------+-------2---+---+-------3---------------+
|0 R 0 0 0 T I E| Key |1 M W P S 0|CC | Mask |0 0 0 0 0 0 0 0|
0---------------1-------+-------2---+---+-------3---------------+
4-+-------------5---------------6---------------7---------------+
|A| Instruction address |
4-+-------------5---------------6---------------7---------------+
1 - (R) PER mask 13 - (M) Machine check mask
5 - (T=1) Translation mode 14 - (W=1) Wait state
6 - (I) I/O mask 15 - (P=1) Problem state
7 - (E) External mask 16 - (S=1) Secondary-space mode
32 - (A=1) 31-bit addressing mode
Program mask bit 0 (PSW bit 20) - Fixed-point overflow
1 21 - Decimal overflow
2 22 - Exponent underflow
3 23 - Significance
0-------+---+---1---------------2---------------3---------------+
| Key |S L|CC | Address of last executed CCW plus eight |
0-------+---+---1---------------2---------------3---------------+
4---------------5---------------6---------------7---------------+
| Unit status | Chan status | Residual count |
4---------------5---------------6---------------7---------------+
4 - (S) Suspended 5 - (L) Logout pending
Unit-status Channel-status
Bit 0 - Attention Bit 0 - Program controlled interruption
1 - Status modifier 1 - Incorrect length
2 - CU end 2 - Program check
3 - Busy 3 - Protection check
4 - Channel end 4 - Channel data check
5 - Device end 5 - Channel control check
6 - Unit check 6 - Interface control check
7 - Unit exception 7 - Chaining check
0---------------1-------+---+---2---------------3---------------+
| Zero's |ILC|CC | Interruption code |
0---------------1-------+---+---2---------------3---------------+
Program-interruption-codes (high byte is always zero)
01 - Operation 0C - Exponent overflow 1A - Page state 02 - Privelaged operation 0D - Exponent underflow 1B - Page transition 03 - Execute 0E - Significance 1C - Space-switch eve 04 - Protection 0F - Floating-point divide 1F - PC-transl spec 05 - Addressing 10 - Segment translation 20 - AFX translation 06 - Specification 11 - Page translation 21 - ASX translation 07 - Data 12 - Translation specification 22 - LX translation 08 - Fixed-point overflow 13 - Special operation 23 - EX translation 09 - Fixed-point divide 14 - VM pseudo page fault 24 - Primary auth 0A - Decimal overflow 17 - ASN-translation spec 25 - Secondary auth 0B - Decimal divide 18 - Page access 40 - Monitor event80 - PER event bit (ORed together with any other program interruption code)
External-(Hex-84)-Interruption-code-format
0---------------1---------------2---------------3---------------+
| CPU address | Interruption code |
0---------------1---------------2---------------3---------------+
External-interruption-codes (codes in the first column are ORed together)
0080 - Interval timer 1003 - TOD clock Synch check
0040 - Interrupt key 1004 - Clock comparator
0020 - External 2 1005 - CPU timer
0010 - External 3 1200 - Malfunction alert
0008 - External 4 1201 - Emergency signal
0004 - External 5 1202 - External call
0002 - External 6 2401 - Service signal
0001 - External 7 (also VM LDSF alert)
4000 - VM IUCV alert
4001 - VM VMCF alert
Machine-check-(Hex-84)-Interruption-code-format
0---------------1---------------2---------------3---------------+
|S P S T C E D| |S S K W M P F|I R E F G C L S|
|D D R D D D 0 G|W 0 0 0 0 0 B D|E C E 0 P S M A|A C C P R R G T|
0---------------1---------------2---------------3---------------+
4---------------5-----------+---6---------------7---------------+
| |C C| Machine-check extended |
|0 0 0 0 0 0 0 0 0 0 0 0 0 0|T C| logout length |
4---------------5-----------+---6---------------7---------------+
0 System Damage(SD) 14 Backed up(B) 24 Failing stg. addr(FA)
1 Instr. Proc'g Damage(PD) 15 Delayed(D) 25 Region code valid(RC)
2 System Recovery(SR) 16 Uncorrected(SE) 27 FPRs valid(FP)
3 Timer Damage(TD) 17 Corrected(SC) 28 GPRs valid(GR)
4 Timing Facil. Damage(CD) 18 Key uncorrected(KE) 29 ECRs valid(CR)
5 External Damage(ED) 20 EMWP valid(WP) 30 Logout valid(LG)
6 Not assigned(0) 21 Mask & key valid(MS) 31 Stg. logical valid(ST)
7 Degradation(DG) 22 Pgm mask valid(PM) 46 CPU timer valid(CT)
8 Warning(W) 23 Instr. addr. valid(IA) 47 Clock comparator(CC)
General------------CC-0--------CC-1----------CC-2----------CC-3
instructions-------BC-8--------BC-4----------BC-2----------BC-1
A,AH,AR Zero Negative Positive Overflow
AL,ALR Zero, Not zero, Zero, Not zero,
no carry no carry carry carry
C,CH,CR,CL,CLC Equal A low A high -
CS,CSD Equal Not equal - -
ICM Zero Negative Positive -
LTR Zero Negative Positive -
LC,LCR Zero Negative Positive Overflow
LN,LNR Zero Negative - -
LP,LPR Zero - Positive -
MVCL Equal A low A high Overlap
N,NR Zero Not zero - -
O,OR Zero Not zero - -
SLA,SLDA Zero Negative Positive Overflow
SRA,SRDA Zero Negative Positive -
STCK Set Not set Error Not operational
S,SH,SR Zero Negative Positive Overflow
SL,SLR - Not zero, Zero, Not zero,
no carry carry carry
TM Zero Mixed - Ones
TRT Zero Incomplete Complete -
TS Zero Not zero - -
X,XR Zero Not zero - -
-------------------CC-0--------CC-1----------CC-2----------CC-3
-------------------BC-8--------BC-4----------BC-2----------BC-1
Decimal------------CC-0--------CC-1----------CC-2----------CC-3 instructions-------BC-8--------BC-4----------BC-2----------BC-1 AP Zero Negative Positive Overflow CP Equal A low A high - ED,EDMK Zero Negative Positive - SRP Zero Negative Positive Overflow SP Zero Negative Positive Overflow ZAP Zero Negative Positive Overflow -------------------CC-0--------CC-1----------CC-2----------CC-3 -------------------BC-8--------BC-4----------BC-2----------BC-1
Floating-point-----CC-0--------CC-1----------CC-2----------CC-3 instructions-------BC-8--------BC-4----------BC-2----------BC-1 AD,ADR,AE,AER,AU AUR,AW,AWR,AXR Zero Negative Positive Overflow CD,CDR,CE,CER Equal A low A high - LTDR,LTER Zero Negative Positive - LCDR,LCER Zero Negative Positive - LNDR,LNER Zero Negative - - LPDR,LPER Zero - Positive - SD,SDR,SE,SER,SU SUR,SW,SWR,SXR Zero Negative Positive Overflow -------------------CC-0--------CC-1----------CC-2----------CC-3 -------------------BC-8--------BC-4----------BC-2----------BC-1
Input/Output------CC-0--------CC-1----------CC-2----------CC-3
instructions------BC-8--------BC-4----------BC-2----------BC-1
CLRCH Reset - Channel busy Not operational
signaled
CLRIO No oper in CSW stored Channel busy Not operational
progress
HDV Interrupt CSW stored Channel Not operational
pending working
HIO Interrupt CSW stored Burst oper Not operational
pending stopped
RIO Successful - - Not operational
SIO, SIOF Successful CSW stored Busy Not operational
TCH Available Interruption Burst mode Not operational
pending
TIO Available CSW stored Busy Not operational
------------------CC-0---------CC-1-----------CC-2-----------CC-3
------------------BC-8---------BC-4-----------BC-2-----------BC-1
System-control----CC-0---------CC-1-----------CC-2-----------CC-3
instructions------BC-8---------BC-4-----------BC-2-----------BC-1
CONCS, DISCS Successful Connected to - Not operational
another CPU
ISC Zero One - -
LASP Parameters Primary ASN Secondary ASN Space switch
loaded not available not available event
LRA Translation ST entry PT entry Length
available invalid invalid violation
RRB, RRBE R=0, C=0 R=0, C=1 R=1, C=0 R=1, C=1
K Set Secure - Not operational
SIGP Accepted Status stored Busy Not operational
TB Usable Not usable - -
TPROT Can fetch, Can fetch, Not fetch, Translation not
can store not store not store available
------------------CC-0---------CC-1-----------CC-2-----------CC-3
------------------BC-8---------BC-4-----------BC-2-----------BC-1
Code Action before printing Code Stacker blank Space 1 line V 1 0 Space 2 line W 2 - Space 3 line X 3 + Suppress space Y 4 1 Skip to channel 1 (line 1 on new page) Z 5 2 Skip to channel 2 3 Skip to channel 3 4 Skip to channel 4 5 Skip to channel 5 6 Skip to channel 6 7 Skip to channel 7 8 Skip to channel 8 9 Skip to channel 9 A Skip to channel 10 B Skip to channel 11 C Skip to channel 12
Machine defined printer control characters (RECFM=FBM) - see ASA/ANSI Action After Write Immediate Space 0 Lines 01 01 (sometimes called write without spacing) Space 1 Line 09 0B Space 2 Lines 11 13 Space 3 Lines 19 1B Skip to Channel 0 - 83 (3211 and 3203-4 only) Skip to Channel 1 89 8B Skip to Channel 2 91 93 Skip to Channel 3 99 9B Skip to Channel 4 A1 A3 Skip to Channel 5 A9 AB Skip to Channel 6 B1 B3 Skip to Channel 7 B9 BB Skip to Channel 8 C1 C3 Skip to Channel 9 C9 CB Skip to Channel 10 D1 D3 Skip to Channel 11 D9 DB Skip to Channel 12 E1 E3 Action After Write Immediate
Action Code Advance to End of Sheet 5B (3203 only) Allow Data Check 7B Block Data Check 73 Diagnostic Check Read 06 (exc. 3203) Diagnostic Gate 07 (3211 only) Diagnostic Read 02 (1403 only) Diagnostic Write 05 (3211 only) Fold 43 (3211 only) Load FCB 63 (exc. 1403) Load UCSB and fold F3 (exc. 3211) Load UCSB without folding FB Raise Cover 6B (3211 only) Read FCB 12 (3211 only) Read PLB 02 (3211 only) Read UCSB 0A (3211 only) Sense 04 Unfold 23 (3211 only) UCS Gate Load EB (1403 only) Action Code
Action Code Clear printer 87 End of transmission 07 Execute order 33 Initialize printer 37 Load copy modification 35 Load copy number 23 Load forms overlay seq. control 43 Load graphic char modification 25 Load translate table 83 Load WCGM 53 Mark form 17 Select translate table 0 47 Select translate table 1 57 Select translate table 2 67 Select translate table 3 77 Sense error log 24 Sense intermediate buffer 14 Sense I/O type E4 Action Code
+----+----+----+----+
| Op code | R1 | R2 | (RR) eg LR R1,R2
+----+----+----+----+
+----+----+----+----+
| Op code | M1 | R2 | (RR) eg BCR M1,R2
+----+----+----+----+
+----+----+----+----+
| Op code | I | (RR) eg SVC I
+----+----+----+----+
+----+----+----+----+
| Op code | R1 |////| (RR) eg SPM R1
+----+----+----+----+
4-byte-instruction-formats (high order bits of Op-code = 01)
+----+----+----+----+----+----+----+----+ | Op code | R1 | X2 | B2 | D2 | (RX) eg L R1,D2(X2,B2) +----+----+----+----+----+----+----+----+ +----+----+----+----+----+----+----+----+ | Op code | M1 | X2 | B2 | D2 | (RX) eg BC M1,D2(X2,B2) +----+----+----+----+----+----+----+----+4-byte-instruction-formats (high order bits of Op-code = 10)
+----+----+----+----+----+----+----+----+ | Op code | R1 | R3 | B2 | D2 | (RS) eg BXH R1,R3,D2(B2) +----+----+----+----+----+----+----+----+ +----+----+----+----+----+----+----+----+ | Op code | I | B1 | D1 | (SI) eg MVI D2(B2),I +----+----+----+----+----+----+----+----+ +----+----+----+----+----+----+----+----+ | Op code | B1 | D1 | (S) eg SCK D2(B2) +----+----+----+----+----+----+----+----+ +----+----+----+----+----+----+----+----+ | Op code |/////////| R1 | R2 | (RRE) eg IPTE R1,R2 +----+----+----+----+----+----+----+----+6-byte-instruction-formats (high order bits of Op-code = 11)
+----+----+----+----+----+----+----+----+----+----+----+----+ | Op code | L | B1 | D1 | B2 | D2 | (SS) +----+----+----+----+----+----+----+----+----+----+----+----+eg MVC D1(L,B1),D2(B2)
+----+----+----+----+----+----+----+----+----+----+----+----+ | Op code | L1 | L2 | B1 | D1 | B2 | D2 | (SS) +----+----+----+----+----+----+----+----+----+----+----+----+eg AP D1(L1,B1),D2(L2,B2)
+----+----+----+----+----+----+----+----+----+----+----+----+ | Op code | L1 | I3 | B1 | D1 | B2 | D2 | (SS) +----+----+----+----+----+----+----+----+----+----+----+----+eg SRP D1(L1,B1),D2(B2),I3
+----+----+----+----+----+----+----+----+----+----+----+----+ | Op code | B1 | D1 | B2 | D2 | (SSE) +----+----+----+----+----+----+----+----+----+----+----+----+eg LASP D1(L1,B1),D2(B2)
00 10 - LPR c 20 - LPDR c 30 - LPER c 01 11 - LNR c 21 - LNDR c 31 - LNER c 02 12 - LTR c 22 - LTDR c 32 - LTER c 03 13 - LCR c 23 - LCDR c 33 - LCER c 04 - SPM n 14 - NR c 24 - HDR 34 - HER 05 - BALR 15 - CLR c 25 - LRDR 35 - LRER 06 - BCTR 16 - OR c 26 - MXR 36 - AXR c 07 - BCR 17 - XR c 27 - MXDR 37 - SXR c 08 - SSK p 18 - LR 28 - LDR 38 - LER 09 - ISK p 19 - CR c 29 - CDR c 39 - CER c 0A - SVC n 1A - AR c 2A - ADR c 3A - AER c 0B - BSM 1B - SR c 2B - SDR c 3B - SER c 0C - BASSM 1C - MR 2C - MDR 3C - MER 0D - BASR 1D - DR 2D - DDR 3D - DER 0E - MVCL c 1E - ALR 2E - AWR c 3E - AUR c 0F - CLCL c 1F - SLR 2F - SWR c 3F - SUR cn - new condition code loaded; p - privileged; c - condition code set
40 - STH 50 - ST 60 - STD 70 - STE 41 - LA 51 61 71 42 - STC 52 62 72 43 - IC 53 63 73 44 - EX 54 - N c 64 74 45 - BAL 55 - CL c 65 75 46 - BCT 56 - O c 66 76 47 - BC 57 - X c 67 - MXD 77 48 - LH 58 - L 68 - LD 78 - LE 49 - CH c 59 - C c 69 - CD c 79 - CE c 4A - AH c 5A - A c 6A - AD c 7A - AE c 4B - SH c 5B - S c 6B - SD c 7B - SE c 4C - MH 5C - M 6C - MD 7C - ME 4D - BAS 5D - D 6D - DD 7D - DE 4E - CVD 5E - AL c 6E - AW c 7E - AU c 4F - CVB 5F - SL c 6F - SW c 7F - SU cc - condition code set
80 - SSM p S 90 - STM RS A0 B0 - CTP p,c 81 91 - TM c SI A1 B1 - LRA p,c RX 82 - LPSW p,n S 92 - MVI SI A2 B2 - see menu 83 - DIAG p 93 - TS c S A3 B3 84 - WRD p SI 94 - NI c SI A4 B4 - IPB p 85 - RDD p SI 95 - CLI c SI A5 B5 - SPB p,c 86 - BXH RS 96 - OI c SI A6 B6 - STCTL p RS 87 - BXLE RS 97 - XI c SI A7 B7 - LCTL p RS 88 - SRL RS 98 - LM RS A8 B8 - LFI p,c 89 - SLL RS 99 - TRACE p RS A9 B9 8A - SRA c RS 9A AA BA - CS c RS 8B - SLA c RS 9B AB BB - CDS c RS 8C - SRDL RS 9C - see menu S AC - STNSM p SI BC 8D - SLDL RS 9D - see menu S AD - STOSM p SI BD - CLM c RS 8E - SRDA c RS 9E - see menu S AE - SIGP c,p RS BE - STCM RS 8F - SLDA c RS 9F - see menu S AF - MC SI BF - ICM c RSn - new condition code loaded; p - privileged; c - condition code set
C0 D0 E0 F0 - SRP c C1 D1 - MVN E1 F1 - MVO C2 D2 - MVC E2 F2 - PACK C3 D3 - MVZ E3 F3 - UNPK C4 D4 - NC c E4 F4 C5 D5 - CLC c E5 - see menu F5 C6 D6 - OC c E6 F6 C7 D7 - XC c E7 F7 C8 D8 - RSP p,c E8 - MVCIN F8 - ZAP c C9 D9 - MVCK s,c E9 F9 - CP c CA DA - MVCP s,c EA FA - AP c CB DB - MVCS s,c EB FB - SP c CC DC - TR EC FC - MP CD DD - TRT c ED FD - DP CE DE - ED c EE FE CF DF - EDMK c EF FFp - privileged; s - semiprivileged; c - condition code set
9C00 - SIO p,c S 9D00 - TIO p,c S 01 - SIOF p,c S 01 - CLRIO p,c S 02 - RIO p,c S 9E00 - HIO p,c S 9F00 - TCH p,c S 01 - HDV p,c S 01 - CLRCH p,c S E500 - LASP p,c SSE 01 - TPROT p,c SSEp - privileged; c - condition code set
B200 - CONCS p,c S B210 - SPX p S B220 B230 - CSCH p S 01 - DISCS p,c S 11 - STPX p S 21 - IPTE p RRE 31 - HSCH p S 02 - STIDP p S 12 - STAP p S 22 - IPM RRE 32 - MSCH p S 03 - STIDC p,c S 13 - RRB p,c S 23 - IVSK s RRE 33 - SSCH p S 04 - SCK p,c S 14 - SIE p S 24 - IAC s,c RRE 34 - STSCH p S 05 - STCK c S 15 - CLRP p S 25 - SSAR RRE 35 - TSCH p S 06 - SCKC p S 16 26 - EPAR s RRE 36 - TPI p S 07 - STCKC p S 17 27 - ESAR s RRE 37 - SAL p S 08 - SPT p S 18 - PC s S 28 - PT s RRE 38 - RSCH p S 09 - STPT p S 19 - SAC S 29 - ISKE p RRE 39 - STCRW p S 0A - SPKA s S 1A 2A - RRBE p,c RRE 3A - STCPS p S 0B - IPK s S 1B - DECP p S 2B - SSKE p RRE 3B - RCHP p S 0C 1C - DCTP p,c S 2C - TB p,c RRE 3C - SCHM p S 0D - PTLB p S 1D - MAD p,c S 2D - DXR RRE 3D 0E 1E - MUN p,c S 2E 3E 0F 1F - STCAP p S 2F 3FB2F0 - VM IUCV request
0---------------1---------------2---------------3---------------+
| Command code | Data address |
0---------------1---------------2---------------3---------------+
4---------------5---------------6---------------7---------------+
| Flags |///////////////| Byte count |
4---------------5---------------6---------------7---------------+
Standard Command codes Flags
xxxx 0000 Invalid Bit 32 (80) - Chain data
++++ ++01 Write 33 (40) - Chain command
++++ 0100 Sense 34 (20) - Suppress incorrect length
++++ ++10 Read 35 (10) - Suppress data transfer
xxxx 1000 Transfer in Channel 36 (08) - Program controlled interrupt
++++ ++11 Control 37 (04) - Use Indirect Data Address Word
++++ 1100 Read Backward 38 (02) - Suspend
0000 0011 Control No-op 39 (01) - Must be 0
1110 0100 Sense ID
x - Bit Ignored + - Modifier Bit for Specific Type of Device
0---------------1---------------2---------------3---------------+
| Command code | Flags | Byte count |
0---------------1---------------2---------------3---------------+
4-+-------------5---------------6---------------7---------------+
|0| Data address |
4-+-------------5---------------6---------------7---------------+
Standard Command codes Flags
xxxx 0000 Invalid Bit 8 (80) - Chain data
++++ ++01 Write 9 (40) - Chain command
++++ 0100 Sense 10 (20) - Suppress incorrect length
++++ ++10 Read 11 (10) - Suppress data transfer
xxxx 1000 Transfer in Channel 12 (08) - Program controlled interrupt
++++ ++11 Control 13 (04) - Use Indirect Data Address Word
++++ 1100 Read Backward 14 (02) - Suspend
0000 0011 Control No-op 15 (01) - Must be 0
1110 0100 Sense ID
x - Bit Ignored + - Modifier Bit for Specific Type of Device
Segment-size Page-size Segment-index Page-index Byte-index
64K 4K 8-15 16-19 20-31
64K 2K 8-15 16-20 21-31
1M 4K 8-11 12-19 20-31
1M 2K 8-11 12-20 21-31
Segment 0-------+-------1---------------2---------------3---------+-----+
table |PT len |0 0 0 0| Page table address |P C I|
entry 0-------+-------1---------------2---------------3---------+-----+
Page-table 0---------------1-------+-+---+-+ P Segment protected
entry-(4k) | Page address |I|EA |/| C Common segment
0---------------1-------+-+---+-+ I Segment/page invalid
EA Bits 6 and 7 of 26-bit
Page-table 0---------------1---------+---+-+ real address
entry-(2K) | Page address |I 0|/|
0---------------1---------+---+-+
Code Data type Length Nominal value Padding Modifiers (align) (range) (with) Scale Exponent A (F) Address 4 (1-4) (Expression) L (0s) - - B Bit - (1-256) 'Bits' L (0s) - - C Character - (1-256) 'Characters' R (blanks) - - D (D) Float long 8 (1-8) 'Number' R (0s) 0 to 14 -85 to E (F) Float short 4 (1-8) 'Number' R (0s) 0 to 14 75 F (F) Fixed binary 4 (1-8) 'Number' L (0s) -187 to 386 "" H (H) Fixed binary 2 (1-8) 'Number' L (0s) -187 to 386 "" L (D) Float extended 16 (1-16) 'Number' R (0s) 0 to 28 "" P Packed decimal - (1-16) 'Number' L (0s) - - Q (F) DXD or DSECT 4 (1-4) (Symbol) L (0s) - - S (H) Base/displacement 2 (S-type ref) - - - V (F) External 4 (3-4) (Symbol) L (0s) - - X Hexadecimal - (1-256) 'Hex digits' L (0s) - - Y (H) Address 2 (1-2) (Expression) L (0s) - - Z Zoned decimal - (1-16) 'Number' L (0 chars) - -Q-type constants are not supported by DOS or DOS/VSE.
0-------+-------1-------+-------2------ / ------N-------+-------+
Zoned | zone | digit | zone | digit | | sign | digit |
0-------+-------1-------+-------2------ / ------N-------+-------+
0-------+-------1-------+-------2------ / ------N-------+-------+
Packed | digit | digit | digit | digit | | digit | sign |
0-------+-------1-------+-------2------ / ------N-------+-------+
Valid digits - 0 (0000) through 9 (1001)
Valid signs - Positive - A (1010), C (1100), E (1110) and F (1111)
Negative - B (1011) and D (1101)
Zoned length -> Packed length = (zoned length + 2) / 2 rounded down
0-+-------------1---------------2---------------3---------------+
Short |S| Power of 16 | Fraction (6 hex digits) |
0-+-------------1---------------2---------------3---------------+
0-+-------------1---------------2------ / ------7---------------+
Long |S| Power of 16 | Fraction (14 hex digits) |
0-+-------------1---------------2------ / ------7---------------+
0-+-------------1---------------2------ / ------7---------------+
Extended |S| Power of 16 | High-order 14 hex digits of fraction |
0-+-------------1---------------2------ / ------7---------------+
8---------------9---------------A------ / ------F---------------+
|///////////////| Low-order 14 hex digits of fraction |
8---------------9---------------A------ / ------F---------------+
'S' is sign of number (0 = positive, 1 = negative)
'Power of 16' is -64 through +63 in excess 64 code (X'00' = -64, X'7F' = +63)
Hexadecimal point of fraction follows first fraction digit
+----+------+-----------------------------+------------------------+------+ | CR | Bits | Name-of-field | Associated-with | Init | +----+------+-----------------------------+------------------------+------+ | 0 | 0 | Block multiplexing control | Block multiplexing | 0 | | | 1 | SSM suppression control | SSM instruction | 0 | | | 2 | TOD clock sync control | Multiprocessing | 0 | | | 3 | Low address prot. control | Low address protection | 0 | | | 4 | Extraction authority control| Dual address space ctl.| 0 | | | 5 | Secondary space control | "" | 0 | | | 7 | Storage key exception ctl. | Storage key 4K block | 0 | | | 8-12 | Translation format | Dynamic addr. transl. | 0 | +----+------+-----------------------------+------------------------+------+ +----+------+-----------------------------+------------------------+------+ | CR | Bits | Name-of-field | Associated-with | Init | +----+------+-----------------------------+------------------------+------+ | 0 | 16 | Malfunction alert mask | Multiprocessing | 0 | | | 17 | Emergency signal mask | "" | 0 | | | 18 | External call mask | "" | 0 | | | 19 | TOD clock sync check mask | "" | 0 | | | 20 | Clock comparator mask | Clock comparator | 0 | | | 21 | CPU timer mask | CPU timer | 0 | | | 22 | Service signal mask | Service signal | 0 | | | 24 | Interval timer mask | Interval timer | 1 | | | 25 | Interrupt key mask | Interrupt key | 1 | | | 26 | External signal mask | External signal | 1 | | | 30 | IUCV subclass mask | VM/370 | 0 | | | 31 | VMCF subclass mask | VM/370 | 0 | +----+------+-----------------------------+------------------------+------+ +----+------+-----------------------------+------------------------+------+ | CR | Bits | Name-of-field | Associated-with | Init | +----+------+-----------------------------+------------------------+------+ | 1 | 0-7 | Primary segment table length| Dynamic addr. transl. | 0 | | | 8-25 | Primary segment table origin| "" | 0 | | | 31 | Space switch event bit | Dual address space ctl.| 0 | +----+------+-----------------------------+------------------------+------+ | 2 | 0-31 | Channel masks | Channels | 1's | +----+------+-----------------------------+------------------------+------+ | 3 | 0-15 | PSW-key mask | Dual address space ctl.| 0 | | |16-31 | Secondary ASN | "" | 0 | +----+------+-----------------------------+------------------------+------+ | 4 | 0-15 | Authorization index | Dual address space ctl.| 0 | | |16-31 | Primary ASN | "" | 0 | +----+------+-----------------------------+------------------------+------+ | 5 | 0 | Subsystem-linkage control | Dual address space ctl.| 0 | | | 8-24 | Linkage-table origin | "" | 0 | | |25-31 | Linkage-table length | "" | 0 | +----+------+-----------------------------+------------------------+------+ +----+------+-----------------------------+------------------------+------+ | CR | Bits | Name-of-field | Associated-with | Init | +----+------+-----------------------------+------------------------+------+ | 6 | 0 | VM assists | VM assists | 0 | | | 1 | Virtual problem state | VM extended facility | 0 | | | 2 | ISK-SSK inhibit | VM assists | 0 | | | 3 | 360 operations only | "" | 0 | | | 4 | SVC inhibit | "" | 0 | | | 5 | Shad. tbl. validation inhbt.| "" | 0 | | | 6 | Expanded VM and CP | "" | 0 | | | 7 | Virtual interval timer | "" | 0 | | | 8-28 | Virtual m/c parameter lists | "" | 0 | | | 29 | VM extended facility | VM extended facility | 0 | +----+------+-----------------------------+------------------------+------+ +----+------+-----------------------------+------------------------+------+ | CR | Bits | Name-of-field | Associated-with | Init | +----+------+-----------------------------+------------------------+------+ | 7 | 0-7 | Secondary seg. tbl. length | Dual address space ctl.| 0 | | | 8-24 | Secondary seg. tbl. origin | "" | 0 | +----+------+-----------------------------+------------------------+------+ | 8 |16-31 | Monitor masks | Monitoring | 0 | +----+------+-----------------------------+------------------------+------+ | 9 | 0 | Successful branching mask | Program Event Recording| 0 | | | 1 | Instruction fetch mask | "" | 0 | | | 2 | Storage alteration mask | "" | 0 | | | 3 | GPR alteration mask | "" | 0 | | |16-31 | PER general register masks | "" | 0 | +----+------+-----------------------------+------------------------+------+ | 10 | 8-31 | PER starting address | Program Event Recording| 0 | +----+------+-----------------------------+------------------------+------+ | 11 | 8-31 | PER ending address | Program Event Recording| 0 | +----+------+-----------------------------+------------------------+------+ +----+------+-----------------------------+------------------------+------+ | CR | Bits | Name-of-field | Associated-with | Init | +----+------+-----------------------------+------------------------+------+ | 14 | 0 | Check-stop control | Machine-check handling | 1 | | | 1 | Synch. MCEL control | "" | 1 | | | 2 | I/O extended logout control | I/O extended logout | 0 | | | 4 | Recovery report mask | Machine-check handling | 0 | | | 5 | Degradation report mask | "" | 0 | | | 6 | Ext. damage report mask | "" | 1 | | | 7 | Warning mask | "" | 0 | | | 8 | Asynch. MCEL control | "" | 0 | | | 9 | Asynch. fixed log control | "" | 0 | | | 12 | ASN translation control | Dual address space ctl.| 0 | | |20-31 | ASN first table origin | "" | 0 | +----+------+-----------------------------+------------------------+------+ | 15 | 8-28 | MCEL address | Machine-check handling | 512 | +----+------+-----------------------------+------------------------+------+
TOD-clock 64 bits, unsigned. Bit 51 incremented every microsecond.External interrupt (X'1004') when TOD clock value exceeds TOD comparator value or when TOD clock is in error or not-operational state. This interrupt is masked by PSW bit 7 (external mask) and by subclass mask CR 0 bit 20 (both on to enable). See POP for MP considerations.
CPU-timer 64 bits, signed. Bit 51 decremented every microsecondExternal interrupt (X'1005') when CPU timer value is negative. This interrupt is masked by PSW bit 7 (external mask) and by subclass mask CR 0 bit 21 (both on to enable). Each processor has a separate CPU timer.
Interval-timer 32 bits, signed. Bit 23 decremented every 1/300th secondExternal interrupt (X'0080') when interval timer changes from positive to negative. This interrupt is masked by PSW bit 7 (external mask) and by subclass mask CR 0 bit 24 (both on to enable). Each processor has a separate interval timer.
Standard TOD clock settings (that is, using standard epoch) at 00:00:00 hours January 1st for some interesting years are (in hex):
1900 0000 0000 0000 0000 (not a leap year)
1980 8F80 9FD3 2200 0000 (a leap year)
1984 96AD 84B5 9000 0000 (another leap year)
2000 B361 183F 4800 0000 (yet another leap year)
Some interesting TOD clock intervals are:
1 nanosecond (roughly) 4
1 microsecond 1000
1 millisecond 003E 8000
1 second F424 8000
1 minute 0039 3870 0000
1 hour 0D69 3A40 0000
1 day 0001 41DD 7600 0000
365 day year 01CA E8C1 3E00 0000
366 day (leap) year 01CC 2A9E B400 0000
4 years (inc leap) 072C E4E2 6E00 0000
The high order fullword of the TOD clock is in units of 1.048576 seconds (2 to
the power 20 microseconds). This is often near enough to one second.
Bit 0 of the TOD clock went from zero to one at 11:56:53.685248 May 11th 1971.
TOD clock values are hard to work with. Helpfull examples follow. They assume that doubleword contains a valid TOD clock value set by something like:
STCK doubleword STORE TOD CLOCK VALUE
BC 7,error BRANCH IF CLOCK NOT VALID
TM doubleword,X'80' IS IT STANDARD EPOCH (see POP)
BNO error NO - BRANCH
Example 1: Set floating-point register 0 to the number of microseconds since
00:00:00 January 1st 1900:
LM R14,R15,doubleword LOAD TOD CLOCK VALUE
SRDL R14,(63-51) SHIFT TO GET MICROSECONDS
ICM R14,B'1000',=AL1(14+64) INSERT FLOATING-POINT EXPONENT
STM R14,R15,doubleword STORE MICROSECONDS IN FLOATING-POINT
LD F0,doubleword AND LOAD AS FLOATING-POINT LONG VALUE
Example 2: Compute time since 00:00:00 January 1st 1980 in fixed-point minutes
and microseconds:
LM R14,R15,doubleword LOAD TOD CLOCK VALUE
SL R14,=X'8F809FD3' RESET ORIGIN TO 1980 (NEAR ENOUGH)
SRDL R14,(63-51) SHIFT TO GET MICROSECONDS
D R14,=F'60E6' GET MINUTES (R15) AND MICROSECONDS (R14)
To specify a time interval in TOD clock, CPU timer, or clock comparator units,
you can use a constants like:
symbol DC 0D'0',FL.64S(63-51)'microseconds' symbol DC 0D'0',FL.64S(63-51)E6'seconds'For example:
DECSEC DC 0D'0',FL.64S(63-51)E6'0.1' ONE TENTH OF A SECOND MICSEC DC 0D'0',FL.64S(63-51)'1' ONE MICROSECOND MINUTE DC 0D'0',FL.64S(63-51)E6'60' ONE MINUTE (60 SECONDS) MINUTE DC 0D'0',FL.64S(63-51)'60E6' ONE MINUTE (60 MILLION MICROSECONDS)These DC operands may be slightly more complex than you normally see, so here is a summary of their components:
0D'0' ensures doubleword alignment and 8-byte implied length FL.64 indicates 64-bit number S(63-51) indicates units in bit 51 E6 converts seconds to microsecondsI am indebted to Lee-Cashman for the following:
Zeller's-congruence calculates the day of week for a given date. It is:
f = (|2.6m - 0.2| + k + D + |D/4| + |C/4| - 2C) mod 7
f day of week (0 = Sunday, 1 = Monday, etc.)
m month number, with January and Febuary taken as months 11 and 12 of the
previous year (1 = March, 2 = April, ..., 10 = December)
k day of the month
C century
D year in the century
|n| integer part of n, for example |3.2| = |3.9| = 3.
Thus, for Aug 23, 1963: m=06, k=23, C=19, D=63
Jan 1, 1800: m=11, k=01, C=17, D=99 ... etc.
Example: Aug 23, 1963 results in (15 + 23 + 63 + 15 + 4 - 38) = 82
the remainder on division by 7 is 5 (= Friday).
Byte 0
+-------+-------+-------+-------+-------+-------+-------+-------+
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
+-------+-------+-------+-------+-------+-------+-------+-------+
2540| | Cmd | Int | Bus | Eq | Data | xxxxx | Unused| xxxxx |
1821 | Rej | Req | Out | Chk | Chk | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
1403| | Cmd | Int | Bus | Eq | xxxxx | xxxxx | Unused| Ch |
1443 | Rej | Req | Out | Chk | type | type | | 9 |
| | | | | bar | bar | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
2400 | Cmd | Int | Bus | Eq | Data | Over- | Wrt | Data |
| Rej | Req | Out | Chk | Chk | run | Cnt | Convtt|
| | | | | | | Zero | Chk |
+-------+-------+-------+-------+-------+-------+-------+-------+
2301| | Cmd | Int | Bus | Eq | Data | Over- | xxxxx | Inval |
2820 | Rej | Req | Out | Chk | Chk | run | | Addr |
+-------+-------+-------+-------+-------+-------+-------+-------+
2250 | Cmd | Int | Bus |Should | Data |Should |Buffer |Should |
| Rej | Req | Out | Not | Chk | Not |Running| Not |
| | | | Occur | | Occur | | Occur |
+-------+-------+-------+-------+-------+-------+-------+-------+
3380 | Cmd | Int | Bus | Eq | Data | Over- | Unused| Unused|
| Rej | Req | Out | Chk | Chk | run | | |
| | | | | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
A220 | Cmd | Int | Bus | Eq | Data | Over- | Unused| Unused|
| Rej | Req | Out | Chk | Chk | Run | | |
| | | | | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
Byte 1
+-------+-------+-------+-------+-------+-------+-------+-------+
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
+-------+-------+-------+-------+-------+-------+-------+-------+
2400 | Noise | 00-Non-Xst Tu | 7 | At | Wrt | File | Tape |
| | 01-Not Ready | Trk | Load | Staus |Protect| Ind |
| | 10-Rdy, no Rwd| | Point| | | |
| | 11-Rdy, Rwding| | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
2301| | Cnt | Track | End | Inval | No | File |Service| Over- |
2820 | Data | Over- | of | Seq | Rec | Prot | Over- | Flow |
| Check | run | Cyl | | Found| | run | Inl |
+-------+-------+-------+-------+-------+-------+-------+-------+
2250 | Light | End | Char | xxxxx | xxxxx | xxxxx | xxxxx | xxxxx |
| Pen | Order | Mode | | | | | |
| Detect| Seq. | | | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
3380 | Perm |Invalid| End | Alt. | No | File | Unused| Oper. |
| Error | Format| of | Intf | Rec | Prot | | Incmpl|
| | | Cyl | Dis | Found| | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
A220 | Oper. | Remote| Trunk | Header| Trunk | Data | Trunk |Deadman|
| Abort | Adapt | Time- | fail | Parity| Chkwr | Rsrvd | Time- |
| | Abort | out | | | Error | | out |
+-------+-------+-------+-------+-------+-------+-------+-------+
Byte 2
+-------+-------+-------+-------+-------+-------+-------+-------+
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
+-------+-------+-------+-------+-------+-------+-------+-------+
2400 | Bits 0-7 inidcate a track is in error | 6&7 indicate |
| | no error or |
| | multi-error |
+-------+-------+-------+-------+-------+-------+-------+-------+
2301| |Unsafe | Shift | Skew | Ctr. | Comp | xxxxx | xxxxx | xxxxx |
2820 | | Reg | Fail | Check | Check | | | |
| | | | | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
2250 | xxxxx | Buffer Address Register |
| | Bit 15| Bit 14| Bit 13| Bit 12| Bit 11| Bit 10| Bit 9 |
+-------+-------+-------+-------+-------+-------+-------+-------+
3380 | |Correc-| | Env. | Intent| Imprec| | |
| | table | | Data |Violate| Ending| | |
| | | | Pres | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
A220 | Comnd | Seq | Data | Memory| Data | Temp. | Unused| Unused|
| Retry | Error | Conf. |Unavail| Waitng| Warng | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
Byte 3
+-------+-------+-------+-------+-------+-------+-------+-------+
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
+-------+-------+-------+-------+-------+-------+-------+-------+
2400 | R|W | Lrcr | Skew | Crc | Skew | xxxxx | Bkwd | Comp- |
| Vrc | | | | Req | |Status | are |
| | | | | Vrc | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
2301/ | Lrc | Lrc | Lrc | Lrc | xxxxx | xxxxx | xxxxx | xxxxx |
2820 | Bit 0 | Bit 1 | Bit 2 | Bit 3 | | | | |
+-------+-------+-------+-------+-------+-------+-------+-------+
2250 | Buffer Address Register |
| Bit 8 | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 |
+-------+-------+-------+-------+-------+-------+-------+-------+
+--------------------------------------+--------------------------------+ | Write, No Carrier Return 01 | Sense 04 | | Write, Auto Carrier Return 09 | Audible Alarm 0B | | Read Inquiry 0A | | +--------------------------------------+--------------------------------+
Command Binary Hex Sense 0000 0100 04 Feed, Select Stacker SS10 F011 Read Only 11D0 F010 Special feature on 3525 Diagnostic Read 1101 0010 D2 Invalid for 3504 Read, Feed, Select Stacker SSD0 F010 Special feature on 3525 Write RCE Format 0001 0001 11 Special feature on 3525 3504-and-3505-only Write OMR Format 0011 0001 31 Special feature 3525-only Write, Feed, Select Stacker SSD0 0001 Print Line LLLL L101 Special feature SS:-Stacker F:-Format-mode D:-Data-mode L:-Line-position 00 1 0 Unformatted 0 EBCDIC 5-bit binary value 01/10 2 1 Formatted 1 Card image
+-----------------------------------+------------------------------------+
| Write 01 | Sense 04 |
| Write Tape Mark 1F | Request Track-in-Error 1B |
| | Erase Gap 17 |
| Read Forward 02 | |
| Read Backward 0C | Mode Set 2 (9-track) |
| | 800 BPI CB |
| Backspace Block 27 | 1600 BPI C3 |
| Backspace File 2F | 6250 BPI (3420) D3 |
| Forward Space Block 37 | |
| Forward Space File 3F | Sense Reserve (3420) F4 |
| | Sense Release (3420) D4 |
| Rewind 07 | |
| Rewind Unload 0F | Loop Write-to-Read (3420) 8B |
| | Set Diagnose (3420) 4B |
| Data Secrity Erase (3420) 97 | Diagnostic Mode Set (3420) 0B |
+-----------------------------------+------------------------------------+
Magnetic-Tape Density--Parity---DC----Trans---Cmd
Mode-Set-1 200 odd on off 13
(7-Track) off off 33
on 3B
even off off 23
on 2B
556 odd on off 53
off off 73
on 7B
even off off 63
on 6B
800 odd on off 93
off off B3
on BB
even off off A3
on AB
Density--Parity---DC----Trans---Cmd
Control command Code Count Search command MT off on Count
Orient (2) 2B > 0 Home address equal 39 B9 4
Recalibrate 13 > 0 ID equal 31 B1 5
Seek 07 6 ID high 51 D1 5
Seek cylinder 0B 6 ID equal or high 71 F1 5
Seek head 1B 6 Key equal 29 A9 Key length
Space count 0F 3 Key high 49 C9 Key length
Set file mask 1F 1 Key equal or high 69 E9 Key length
Set sector (1,3) 23 1 Key and data equal (4) 2D AD ) Length
Restore (no-op) 17 > 0 Key and data high (4) 4D CD ) of
Vary sensing (2) 27 1 Key and data ) search
Diagnostic load (1) 53 1 equal or high (4) 6D ED ) argument
Diagnostic write (1) 73 512
Control command Code Count Search command MT off on Count
Notes: 1) Except 2314, 2319 3) Special feature required on 3340
2) 2305/2835 only 4) 2314, 2319 only
Read command MT off on Count Write command Code Count
Home address 1A 9A 5 Home address 19 5, 7 or 11
Count 12 92 8 Record 0 15 8 + KL + DL
Record 0 16 96 (4) Erase 11 8 + KL + DL
Data 06 86 (4) Count, key, data 1D 8 + KL + DL
Key, data 0E 8E (4) Special
Count, key, data 1E 9E (4) count, key, data 01 8 + KL + DL
IPL 02 02 (4) Data 05 DL
Multiple > max Key, data 0D KL + DL
count, key, data (1) 5E 5E track len
Sector (2,3) 22 22 1
Read command MT off on Count Write command Code Count
Notes: 1) 3330, 3340, 3350 only 3) Special feature required on 3340
2) Except 2314, 2319 4) Number of bytes to be transferred
Continue scan (1) MT off on Count Sense command Code Count
Search equal 25 A5 (2) Sense I/O 04 (7)
Search high 45 C5 (2) Sense I/O Type (3) E4 7
Search high or equal 65 E5 (2) Read, reset
Set compare 35 B5 (2) buffered log (3) A4 24
Set compare 75 F5 (2) Read buffered log (4) 24 128
No compare 55 D5 (2) Device release (5) 94 (7)
Device reserve (5) B4 (7)
Read diag. sts. 1 (6) 44 16 or 512
Continue scan (1) MT off on Count Sense command Code Count
Notes: 1) 2314, 2319 only 5) String or 2 channel switch rqd.
2) Nbr bytes in search argument 6) Except 2314, 2319
3) 3330, 3340, 3350 only 7) 6 for 2314, 2319 else 24
4) 2305/2835 only
Command Code Count Notes Define extent 63 16 Locate 43 8 Read 42 Count = number of bytes to be transferred Read IPL 02 Count = number of bytes to be transferred Write 41 Count = number of bytes to be transferred Sense I/O 04 24 Sense I/O type E4 7 Read, reset buffered log A4 24-64 Must be 24 for 3310 Read device characteristics 64 32 Device reserve B4 24 String or channel switch, not 3310 Device release 94 24 String or channel switch, not 3310 Unconditional reserve 14 24 String or channel switch, not 3310 Diagnostic control F3 Count =4 for 3370, >11 for 3310 Diagnostic sense/read C4 Count =6 for 3370, =4 or 512 for 3310 Command Code Count Notes
Define-extent CCW X'63',parameter-address,flags,16 Define extent parameter format 0----1----2--------4----------------8----------------C----------------+ |Mask| 00 |Blk size| Offset 1 | Offset 2 | Offset 3 | 0----1----2--------4----------------8----------------C----------------+ Mask: B'ww00cd00' Block size: Y(n*512) ww: 00 => Inhibit format writes Offset 1: Number of blocks from start of 01 Inhibit all writes module to 1'st block of extent 10 Invalid Offset 2: Number of blocks from start of 11 Permit all writes data set (=file) to 1'st block c: 0 => Data area of extent. 1 CE area Offset 3: Number of blocks from start of d: 0 => Inhibit diagnostic commands data set (=file) to last block 1 Permit diagnostic commands of extent. Locate CCW X'43',parameter-address,flags,8 Locate parameter format 0----1----2--------4----------------+ | Op |Rep |Blk cnt | Offset | 0----1----2--------4----------------+ Op: B'000xcccc' Block size: Y(n*512) x: - Not used Rep: Replication count for 'read cccc: 0001 - Write data replicated data'. Else 0. 0101 - Write and check data Offset: Number of blocks from start of 0110 - Read data data set (=file) to this block. 0010 - Read replicated data 0100 - Format defective block Diagnostic-control CCW X'F3',parameter-address,flags,4+n Diagnostic control parameter formats 0----1----2--------+ Trace/Dump | 00 | 00 | 00 00 | 0----1----2--------4--------6--------8--------A----B----+ Format ID | 04 | 00 | 00 08 |Blk cnt | Flags |Cylinder|Head|Blk | 0----1----2--------4--------6--------+--------A----B----+ Space ID and read | 06 | 00 | 00 08 |Blk cnt | Flags |Cylinder|Head|Blk | 0----1----2--------4--------6--------+--------A----B----+ Read ID | 0A | 00 | 00 08 |Blk cnt | Flags |Cylinder|Head|Blk | 0----1----2--------4--------6--------+--------A----B----+ Displace ID | 0F |Mod | 00 00 | 0----1----2--------+
Device Cyls Tracks Track Bytes per record
type /pack /cyl capacity without key with key
2305-1 48 8 14568 432+D 634+K+D
2305-2 96 8 14858 198+D 289+K+D
2314 200 20 7294 101+(D)534/512 146+(K+D)534/512
D (last on track) 45+K+D (last on track)
3330-1 404 19 13165 135+D 191+K+D
3330-11 808 19 13165 135+D 191+K+D
3340-35 348 12 8535 167+D 242+K+D
3340-70 696 12 8535 167+D 242+K+D
3350 555 30 19254 185+D 267+K+D
3375 959 12 36000 224+#(D+191) 224+#(K+191)+#(D+191)
3380 885 15 47968 480+#(D+12) 704+#(K+12)+#(D+12)
3380E 1770 15 47968 480+#(D+12) 704+#(K+12)+#(D+12)
3380K 2655 15 47968 480+#(D+12) 704+#(K+12)+#(D+12)
Device Cyls Tracks Capacity Without key With key
Notes: D is data length, K is key length
# means round up to multiple of 32
( n-1 )
S(n) = (1/factor_a) * (factor_b + SUM bytes_per_record(i) )
( i=1 )
Device Factor Factor Bytes per record
type A B without key with key
3330 105 237 135+D 191+K+D
3340 140 353 167+D 242+K+D
3350 156 389 185+D 267+K+D
3375 192 832 224+#(D+191) 224+#(K+191)+#(D+191)
3380 224 1248 480+#(D+12) 704+#(K+12)+#(D+12)
Notes: D is data length, K is key length
# means round up to multiple of 32
Instruction Equivalent to Notes
BCT Rx,label SL Rx,=A(1) 1) Rx 32 bit binary unsigned.
BNZ label 2) Condition code not set.
BCTR Rx,Ry same as BCT but 'BNZ label' replaced by 'BNZR Ry'
Instruction Equivalent to Notes
BXH Rx,Ry,label
Ry even ALR Rx,Ry 1) Rx, Ry, Ry+1 32 bit binary unsigned.
CR Rx,Ry+1 2) Condition code not set.
BH label 3) 'label' cannot be indexed.
Ry odd ALR Rx,Ry 1) Rx, Ry 32 bit binary unsigned.
CR Rx,Ry 2) Condition code not set.
BH label 3) 'label' cannot be indexed.
BXLE Rx,Ry,label same as BXH but 'BH label' replaced by 'BNH label'
TS label The high order bit (X'80') of the byte at 'label' is tested
and the condition code set to 0 (BZ taken) if the bit is
off, or 1 (BNZ taken) if the bit is on. X'FF' is then stored at 'label'.
Serialization effectively inhibits access to the byte by channels and/or other
CPUs while the instruction is executing. Note that 'label' cannot be indexed.
Instruction Equivalent to Notes
CS Rx,Ry,label CL Rx,label 1) Condition code set 0 - EQ, 1 - NE
BE EQ 2) Serialization performed
NE L Rx,label 3) 'label' must be fullword aligned
B GO 4) 'label' cannot be indexed
EQ ST Ry,label
GO EQU *
CDS Rx,Ry,label like CS but:
LA 0,8 PRELOAD INCREMENT
RETRY L 1,SHARED LOAD OLD VALUE
LR 2,1 COPY OLD VALUE
AR 2,0 COMPUTE NEW (INCREMENTED) VALUE
CS 1,2,SHARED TRY STORING NEW VALUE
BNE RETRY OLD VALUE HAS CHANGED - TRY AGAIN
Similarly, the AR instruction could be replaced by SR to decrement the field,
OR to turn on bits in the field, etc.
+-------------+-------------+-------------+-------------+
Rx |/////////////| Address of 'to' field |
+-------------+-------------+-------------+-------------+
Rx+1 |/////////////| Length of 'to' field |
+-------------+-------------+-------------+-------------+
+-------------+-------------+-------------+-------------+
Ry |/////////////| Address of 'from' field |
+-------------+-------------+-------------+-------------+
Ry+1 | Pad char. | Length of 'from' field |
+-------------+-------------+-------------+-------------+
0 (BE) - ('to' length) = ('from' length)
1 (BL) - ('to' length) < ('from' length)
2 (BH) - ('to' length) > ('from' length)
3 (BO) - ('to' address) < ('from' address) < ('to' address + 'to' length)
CC 3 (destructive overlap) is checked for first. If found then no move is done.
0 (BE) - ('to' field) = ('from' field) or both lengths 0
1 (BL) - ('to' field) < ('from' field)
2 (BH) - ('to' field) > ('from' filed)
CC 1 and 2 stop CLCL at the mismatch - ie. Rx -> unequal 'to' byte,
Ry -> unequal 'from' byte (or end of 'from' field if padding). Rx+1
and Ry+1 contain corresponding remaining lengths.
Valid signs: Positive - A (1010), C (1100), E (1110) or F (1111)
Negative - B (1011) or D (1101)
CVD--R1,label
D--R1,label 1) R1 must be even and specifies a pair of registers.
DR-R1,R2 2) 64 bit number in R1 and R1+1 is divided by fullword at
'label' (D) or fullword in R2 (DR).
3) Remainder goes into R1, quotient into R1+1 (both 32 bit).
4) Condition code is not set.
5) Fixed-Point Divide Exception if divisor too small (eg. 0).
6) Specification Exception if R1 is odd numbered register.
M--R1,label 1) R1 must be even and specifies a pair of registers.
MR-R1,R2 2) 32 bit number in R1+1 is multiplied by fullword at 'label'
(M) or fullword in R2 (MR).
3) R1 contents ignored.
4) 64 bit result goes into R1 and R1+1.
5) Condition code is not set.
6) Specification Exception if R1 is odd numbered register.
MH-R1,label 1) 32 bit number in R1 is multiplied by halfword at 'label'.
2) 32 bit result goes into R1.
3) Condition code is not set.
+------------------+-----------------+
Register-shifts | Single | Double | symbol is the nbr
+--------------------+------------------+-----------------+ of bits to shift.
| Arithmetic Left | SLA R1,symbol | SLDA R1,symbol | It is evaluated as
| Right | SRA R1,symbol | SRDA R1,symbol | base+displacement
+--------------------+------------------+-----------------+ but only the low
| Logical Left | SLL R1,symbol | SLDL R1,symbol | order six bits are
| Right | SRL R1,symbol | SRDL R1,symbol | used as the shift
+--------------------+------------------+-----------------+ amount.
Left: 0 (BZ) - Result = 0 Right: 0 (BZ) - Result = 0
1 (BM) - Result < 0 1 (BM) - Result < 0
2 (BP) - Result > 0 2 (BP) - Result > 0
3 - Impossible 3 (BO) - Overflow (Fixed-Point
Overflow Exception if enabled)
MP label1,label2 (Multiply Decimal)
0 (BZ) - Result = 0
1 (BM) - Result < 0
2 (BP) - Result > 0
Left shift only: 3 (BO) - Overflow (Decimal Overflow Exception if enabled)
Oh all right then I'll do it when I've got time (Ed.)
+---------+--------------+--------+-----------+--------------+
| Pattern | Significance | Source | Result | Significance |
| char. | was | digit | char. | set to |
+---------+--------------+--------+-----------+--------------+
| X'20' | off | 0 | filler | off |
| | | 1-9 | 1-9 | on (note-1) |
| | on | 0-9 | 0-9 | on (note-1) |
+---------+--------------+--------+-----------+--------------+
| X'21' | off | 0 | filler | on (note-1) |
| | | 1-9 | 1-9 | on (note-1) |
| | on | 0-9 | 0-9 | on (note-1) |
+---------+--------------+--------+-----------+--------------+
| X'22' | N/A | N/A | filler | off |
+---------+--------------+--------+-----------+--------------+
| other | off | N/A | filler | no change |
| | on | N/A | = pattern | no change |
+---------+--------------+--------+-----------+--------------+
Note-1: In these cases the significance indicator will be set off if
the source digit is a high half-byte and the low half-byte is a
positive sign code.
PATTERN DC X'40,20,20,20,21,20,4B,20,20'Note that the first character of the pattern (blank) is the filler and is also a message character. Since significance is initially off it will (in its role as a message character) be replaced by itself (in its role as the filler). Note also that the significance starter (X'21') is included just before the position where we want to start showing leading zeros. Now let's use it:
ED PATTERN,=PL4'1234' GIVES ' 12.34'
ED PATTERN,=PL4'12' GIVES ' 0.12'
ED PATTERN,=PL4'0' GIVES ' 0.00'
Now let's try a seven digit integer which we want to show as '0' (if it is)
and with commas (X'6B') inserted to break the number into thousands - we set
up a pattern accordingly:
PATTERN DC X'40,20,6B,20,20,20,6B,20,21,20'And use it:
ED PATTERN,=PL4'1234567' GIVES ' 1,234,567'
ED PATTERN,=PL4'1234' GIVES ' 1,234'
ED PATTERN,=PL4'0' GIVES ' 0'
And here's EDMK used to insert the currency symbol:
PATTERN DC X'40,20,20,20,21,20,4B,20,20'
EDMK PATTERN,=PL4'12' GIVES ' 0.12'
BCTR 1,0 POINTS GPR1 FOR US
MVI 0(1),C'$' GIVES ' $0.12'
MVN---label1,label2 The numerics (ie. low-order half-bytes) of the field
at 'label1' are replaced by the corresponding numerics
of the field at 'label2'. The zones of the field at
'label1' are not changed. The instruction processes
the two fields left to right. Only 'label1' has a
length atribute. The condition code is not changed.
MVZ---label1,label2 As MVN except that the zones (ie. high-order half-bytes)
are moved instead of the numerics.
MVO---label1,label2 Proceeding from right to left, each half-byte of the
field at 'label2' is stored to the left of and next to
the corresponding half-byte of the field at 'label1'.
The low-order half-byte of the field at 'label1' is not
changed. Both fields have length attributes. The field
at 'label2' is truncated or padded with 0's at the left.
The condition code is not changed.
TRT--label1,label2 'label1' specifies the address and length of the field to
be tested against the 256 byte translate table specified
by 'label2'. Neither field is modified by the TRT.
Proceeding from left to right, each byte of the field at 'label1' is checked
for a non-zero translation. One of three results is possible:
AL 1,DBLWD+4 ADD THE LOW ORDER WORDS
BC 8+4,NOCARRY BRANCH IF NO CARRY
AL 0,=F'1' CARRY - ADD IT INTO HIGH ORDER WORD
NOCARRY AL 0,DBLWD ADD HIGH ORDER WORDS
To subtract the contents of DBLWD from the contents of GPRs 0 and 1:
SL 1,DBLWD+4 SUBTRACT THE LOW ORDER WORDS
BC 2+1,CARRY BRANCH IF CARRY
SL 0,=F'1' NO CARRY - SUBTRACT FROM HIGH ORDER WORD
CARRY SL 0,DBLWD SUBTRACT HIGH ORDER WORDS
Note: 1) The condition code is not set in the same way as for the arithmetic
add and subtract operations.
2) Fixed-point overflow is not raised even if enabled.
3) Yes, I do know you can use BCTR to subtract one.
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
Hex--0 | WD1 | HSA | LSA | GPR-14 (RET) |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
10 | GPR-15 (EPA) | GPR-0 | GPR-1 | GPR-2 |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
20 | GPR-3 | GPR-4 | GPR-5 | GPR-6 |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
30 | GPR-7 | GPR-8 | GPR-9 | GPR-10 |
+---+---+---+---4---+---+---+---8---+---+---+---C---+---+---+---+
40 | GPR-11 | GPR-12 | FPR-0 |
+---+---+---+---4---+---+---+---8 - + - + - + - + - + - + - + - +
48 | FPR-2 | FPR-4 |
+ - + - + - + - + - + - + - + - 8 - + - + - + - + - + - + - + - +
50 | FPR-6 |
+ - + - + - + - + - + - + - + - 8
WD1 (Word 1) is used by compiler generated code.
HSA (High Save area Address) -> previous save area.
LSA (Low Save area Address) -> next save area.
Standard-register-usage:
Call: GPR-0 Parameter or not used.
GPR-1 Parameter, address of parameter list or not used.
GPR-13 Address of save area for use by called routine.
GPR-14 Return address.
GPR-15 Address of called routine.
Return: GPR-0 Reason code or as passed by calling routine.
GPR-15 Return code (0 => normal completion).
All other registers are as passed by the calling routine.
Save-area-chaining (example):
name CSECT
USING name,15 GPR 15 CONTAINS ENTRY ADDRESS - USE IT
SAVE (14,12) SAVE REGISTERS IN CALLER'S SAVE AREA
+ STM 14,12,12(13) ('SAVE' expansion)
LR xx,13 POINT GPR xx AT CALLER'S SAVE AREA
LA 13,our-save-area POINT GPR 13 AT OUR SAVE AREA
ST 13,8(,xx) CHAIN CALLER'S SAVE AREA FROM OUR'S
ST xx,4(,13) CHAIN OUR SAVE AREA FROM CALLER'S
DROP 15 STOP USING GPR 15 FOR OUR BASE REGISTER
LR yy,15 LOAD GPR yy WITH OUR BASE ADDRESS
USING name,yy AND USE GPR yy FOR OUR BASE REGISTER
Notes: For re-entrant programs 'our-save-area' must be in dynamic (GETMAINed)
storage. Required code depends on SCP environment.
Floating point registers are not saved in this example.
Additional-note-for-idiots: Don't use 0, 1, 13 or 15 for 'xx'.
Following description applies to the original IOS3270 version
The GCARD exec provides an interactive display of information extracted from from the 'Green card' - GX20-1850-3 (Fourth Edition, November 1976). If GCARD is called with no parameters then a selection menu is displayed. If you know which information you want you can specify a single parameter which may be:
Extended branch mnemonics - ebm-branch
Channel Command Word - ccw-channel-sio-io-i/o
Condition codes - cc-condition
Printer I/O command codes - pcc-printer-3211-3811-3203-1403-2821
Tape I/O Command codes - iomt-tape-3420-3803-3410-3411
Disk I/O Command codes - dasd-ckd-fba-capacity-rps
%Author:-Steve-Hobson, IBM IASC, VNET node%GFORD1 user-ID%IALxSJH
(Note that in IASC UserIds "x" is currently "-" - DFG 17Feb86)