From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Sun, 28 Jan 2007 16:48:37 -0700re:
and old reference to what was lengthy and on-going discussion about
managing encryption for large scale HSDT infrastructure ... misc. past
posts mentioning HSDT
https://www.garlic.com/~lynn/subnetwork.html#hsdt
Date: 12/18/84 08:39:12
To: wheeler
...
I know there is a lot of dissenting opinion, but I happen to believe
that some kind of public key mechanism will end up being used for key
management in the business world. I understand some of the problems
with the basic security of the current schemes, but the other side of
the coin is trying to coordinate session keys between sources and
sinks in the networks that are already in place, let alone what is
coming down the pike. Specifically, some of the multiple network or
satellite point-to-multipoint session keys could be nicely handled
with some kind of public key mechanism. The current MVS Cryptographic
Subsystem key management scheme is a perfect example of the morass
that faces us in 'automatically' managing keys.
... snip ... top of post, old email index, HSDT email
old email with some reference to public key
https://www.garlic.com/~lynn/2006w.html#email810515
https://www.garlic.com/~lynn/2006.html#email850701
https://www.garlic.com/~lynn/2007c.html#email860120
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful? Newsgroups: alt.folklore.computers Date: Mon, 29 Jan 2007 09:42:15 -0700Chris Barts <puonegf+hfrarg@tznvy.pbz> writes:
floppy disk was originally developed for loading microcode into the 3830 disk controller ... and was also used for loading microcode into many of the 370 mainframe machines. this typically happened automatically at power-up ... however there has been recent subthread here on the "IPL" button on 360/370 front consoles ... "initial program load" ... which was software (boot) function. However 370s also had "IMPL" button ... initial microcode program load ... if there was some service update which included replacing the microprogram floppy disk ... then the microcode could be reloaded (w/o a power cycle).
3081 had service processor and a 3310/piccolo, FBA (fixed block architecture) "hard disk" containing microcode for the 3081 processor ... and some processor functions could involve "paging" microcode from the 3310.
this is different than an instruction, dynamically modifying some (frequently immediately) following instruction, in the instruction stream. a lot of 360 (software) code made use of this feature to achieve real-storage compactness (compared to paging which also is oriented towards real-storage compactness). However, it was something of a performance penalty as processors started attempting to squeeze instruction latency ... doing instruction decode and setup overlapped with execution ... there had to be constant checking if some previous instruction had modified a following instruction that had already been fetched and decoded.
a couple past posts mentioning pageable microcode:
https://www.garlic.com/~lynn/2000d.html#82 "all-out" vs less aggressive designs (was: Re: 36 to 32 bit transition)
https://www.garlic.com/~lynn/2004j.html#45 A quote from Crypto-Gram
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: uNIX circa 1982? Newsgroups: alt.folklore.computers Date: Mon, 29 Jan 2007 13:58:21 -0700Lawrence Statton XE2/N1GAK <yankeeinexile@gmail.com> writes:
and a little more recent, Creators Admit Unix, C Hoax
https://www.garlic.com/~lynn/2006v.html#52 Is this true?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful? Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 07:41:06 -0700Peter Flass <Peter_Flass@Yahoo.com> writes:
sort of 370 subset ... and one of the differences ... "macrocode"
mode eliminated provisions for supporting self-modifying code ...
and the associated performance penalty ...
https://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?
misc. past posts mentioning Amdahl's macrocode:
https://www.garlic.com/~lynn/2002p.html#44 Linux paging
https://www.garlic.com/~lynn/2002p.html#48 Linux paging
https://www.garlic.com/~lynn/2003.html#9 Mainframe System Programmer/Administrator market demand?
https://www.garlic.com/~lynn/2003.html#56 Wild hardware idea
https://www.garlic.com/~lynn/2005d.html#59 Misuse of word "microcode"
https://www.garlic.com/~lynn/2005d.html#60 Misuse of word "microcode"
https://www.garlic.com/~lynn/2005h.html#24 Description of a new old-fashioned programming language
https://www.garlic.com/~lynn/2005p.html#14 Multicores
https://www.garlic.com/~lynn/2005p.html#29 Documentation for the New Instructions for the z9 Processor
https://www.garlic.com/~lynn/2005u.html#40 POWER6 on zSeries?
https://www.garlic.com/~lynn/2005u.html#43 POWER6 on zSeries?
https://www.garlic.com/~lynn/2005u.html#48 POWER6 on zSeries?
https://www.garlic.com/~lynn/2006b.html#38 blast from the past ... macrocode
https://www.garlic.com/~lynn/2006c.html#9 Mainframe Jobs Going Away
https://www.garlic.com/~lynn/2006j.html#32 Code density and performance?
https://www.garlic.com/~lynn/2006j.html#35 Code density and performance?
https://www.garlic.com/~lynn/2006m.html#39 Using different storage key's
https://www.garlic.com/~lynn/2006p.html#42 old hypervisor email
https://www.garlic.com/~lynn/2006u.html#33 Assembler question
https://www.garlic.com/~lynn/2006u.html#34 Assembler question
https://www.garlic.com/~lynn/2006v.html#20 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Jim Gray Is Missing Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 08:07:42 -0700Jim Gray Is Missing
... and ...
Coast Guard searches for missing SF boater, 63-year-old man failed to
return from trip to Farallon Islands
http://www.sfgate.com/cgi-bin/article.cgi?f=/c/a/2007/01/29/BAGB5NR0GL6.DTL&feed=rss.bayarea
from above:
The U.S. Coast Guard is looking for a San Francisco computer scientist
who may be lost at sea after he failed to return from an outing to the
Farallon Islands Sunday afternoon.
... snip ...
a couple recent posts with old references mentioning Jim
https://www.garlic.com/~lynn/2006w.html#46 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 10:46:37 -0700jmfbahciv writes:
related post here
https://www.garlic.com/~lynn/aadsm26.htm#24 News.com: IBM donates new privacy tool to open-source Higgins
latest series of news items:
TJX Stored Customer Data, Violated Visa Payment Rules
http://www.informationweek.com/showArticle.jhtml?articleID=197001447
Under Fire, TJX Defends Its Handling of Card Data Breach
http://www.digitaltransactions.net/newsstory.cfm?newsid=1233
In video message, TJX says it delayed reporting for security reasons
http://www.boston.com/business/ticker/2007/01/in_video_messag.html
TJX cyberfraud spreads: Bank of America reissuing cards
http://business.bostonherald.com/businessNews/view.bg?articleid=179220&srvc
Fraud linked to TJX data heist spreads
http://www.linuxsecurity.com/content/view/126786/169/
Fraud linked to TJX data heist spreads
http://www.theregister.com/2007/01/29/tjx_data_fraud/
TJX Sued for Loss of Consumer Data
http://www.consumeraffairs.com/news04/2007/01/tjx_folo.html
Consumers of T.J. Maxx, Marshalls, HomeGoods, and A.J. Wright Bring
Class Action Suit for Loss of Credit Card Data; Filed by Berger &
Montague, PC and Stern Shapiro Weissberg & Garin, LLP
http://www.earthtimes.org/articles/show/news_press_release,51744.shtml
Consumers of T.J. Maxx, Marshalls, HomeGoods, and A.J. Wright Bring
Class Action Suit for Loss of Credit Card Data; Filed by Berger &
Montague, PC and Stern Shapiro Weissberg & Garin, LLP
http://www.prnewswire.com/cgi-bin/stories.pl?ACCT=104&STORY=/www/story/01-29-2007/0004515512&EDATE=
TJX explains reaction to data breach
http://www.abcmoney.co.uk/news/30200714213.htm
TK Maxx owner criticized after security breach
http://news.zdnet.co.uk/security/0,1000000189,39285692,00.htm
TJX faces lawsuit over data breach
http://searchsecurity.techtarget.com/originalContent/0,289142,sid14_gci1241259,00.html
Stolen TK Maxx credit card details used to commit fraud
http://www.itpro.co.uk/security/news/103333/stolen-tk-maxx-credit-card-details-used-to-commit-fraud.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Jim Gray Is Missing Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 13:11:12 -0700"Jim Mehl" <mehl@ihot.com> writes:
for a time, he had lived on sail boat moored in san fran ... and commute down to sjr (south san jose) ... and its "at least" 10 years experience. fortunately commute was opposite of main traffic flow ... however one of the excuses about leaving for tandem ... was that it cut the commute.
Recently, I've seen him maybe once or twice a year for one reason or another.
Old reference to both being keynote speakers
https://web.archive.org/web/20011004023230/http://www.hdcc.cs.cmu.edu/may01/index.html
at NASA High Dependability Computing Consortium conference.
lots of past posts mentioning System/R
https://www.garlic.com/~lynn/submain.html#systemr
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful? Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 14:39:47 -0700Morten Reistad <first@last.name> writes:
recent post about rewriting cms applications for pc environment
(as more attractive alternative considering the memory and disk
constraints of the period). recent posts
https://www.garlic.com/~lynn/2006y.html#29 The Elements of Programming Style
https://www.garlic.com/~lynn/2007.html#1 The Elements of Programming Style
note above reference has a little x-over with more recent thread:
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
i did some simple benchmarks on early prototype and also noticed that a lot of stuff page-trashed ... in the 384k bytes available for 370 operation. the result was that I then took the blame for several month slip in customer ship while they put together an upgrade to 512k bytes.
washington was the only product where I was able to ship my CMS paged
mapped filesystem support. At the high-end ... I could benchmark three
times thruput increase with 3380s for filesystem intensive workloads.
The degradation with the 100ms XT harddisks were quite striking ...
and CMS paged mapped filesystem support offered a little improvement.
misc. past posts about CMS page mapped filesystem support
https://www.garlic.com/~lynn/submain.html#mmap
lots of past posts mentioning Washington
https://www.garlic.com/~lynn/96.html#23 Old IBM's
https://www.garlic.com/~lynn/2000.html#5 IBM XT/370 and AT/370 (was Re: Computer of the century)
https://www.garlic.com/~lynn/2000.html#29 Operating systems, guest and actual
https://www.garlic.com/~lynn/2000.html#75 Mainframe operating systems
https://www.garlic.com/~lynn/2000e.html#52 Why not an IBM zSeries workstation?
https://www.garlic.com/~lynn/2000e.html#55 Why not an IBM zSeries workstation?
https://www.garlic.com/~lynn/2001c.html#89 database (or b-tree) page sizes
https://www.garlic.com/~lynn/2001f.html#28 IBM's "VM for the PC" c.1984??
https://www.garlic.com/~lynn/2001i.html#19 Very CISC Instuctions (Was: why the machine word size ...)
https://www.garlic.com/~lynn/2001i.html#20 Very CISC Instuctions (Was: why the machine word size ...)
https://www.garlic.com/~lynn/2001k.html#24 HP Compaq merger, here we go again.
https://www.garlic.com/~lynn/2002b.html#43 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2002b.html#45 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2002d.html#4 IBM Mainframe at home
https://www.garlic.com/~lynn/2002f.html#44 Blade architectures
https://www.garlic.com/~lynn/2002f.html#49 Blade architectures
https://www.garlic.com/~lynn/2002f.html#50 Blade architectures
https://www.garlic.com/~lynn/2002f.html#52 Mainframes and "mini-computers"
https://www.garlic.com/~lynn/2002i.html#76 HONE was .. Hercules and System/390 - do we need it?
https://www.garlic.com/~lynn/2003f.html#8 Alpha performance, why?
https://www.garlic.com/~lynn/2003f.html#56 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003h.html#40 IBM system 370
https://www.garlic.com/~lynn/2004h.html#29 BLKSIZE question
https://www.garlic.com/~lynn/2004m.html#7 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2004m.html#10 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2004m.html#11 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2004m.html#13 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2004o.html#9 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005f.html#6 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2005f.html#10 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2006f.html#2 using 3390 mod-9s
https://www.garlic.com/~lynn/2006j.html#36 The Pankian Metaphor
https://www.garlic.com/~lynn/2006m.html#56 DCSS
https://www.garlic.com/~lynn/2006n.html#5 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#14 RCA Spectra 70/25: Another Mystery Computer?
https://www.garlic.com/~lynn/2006y.html#29 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2006y.html#30 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007c.html#14 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007c.html#23 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Jim Gray Is Missing Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 14:58:41 -0700latest news item
Scientist is missing after day trip on his yacht, S.F. MAN'S WORK
PAVED WAY FOR E-COMMERCE
http://www.mercurynews.com/mld/mercurynews/business/16578350.htm
from above ...
Jim Gray, 63, founder and manager of Microsoft's Bay Area Research
Center, had left early Sunday in his 40-foot C&C yacht, Tenacious,
from a marina near San Francisco's Fort Mason.
... snip ...
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful? Newsgroups: alt.folklore.computers Date: Tue, 30 Jan 2007 18:23:54 -0700cstacy@news.dtpq.com (Christopher C. Stacy) writes:
a few past posts with old email from '79 mentioning attempts to get an
early 801 processor for lisp machines:
https://www.garlic.com/~lynn/2003e.html#65 801 (was Re: Reviving Multics
https://www.garlic.com/~lynn/2006c.html#3 Architectural support for programming languages
https://www.garlic.com/~lynn/2006o.html#45 "25th Anniversary of the Personal Computer"
https://www.garlic.com/~lynn/2006t.html#9 32 or even 64 registers for x86-64?
in 1980 time-frame there were attempts to replace the large number of different corporate microprocessors with 801s.
however, 801 as a "microcode" processor engine made "self-modifying" microcode nearly impossible (in the sense of 360/370 instructions modifying subsequent instructions in the instruction stream).
with separate I&D caches and no provisions for cache consistency ... the instruction and data "data spaces" were somewhat disjoint. Program loaders needed special operation which would flush/force any modifications from the data cache back to memory ... and then invalidate any corresponding locations that might happen to be in the i-cache ... so that instruction fetch would result in an i-cache miss, forcing a (i-cache) fetch (of the possibly modified data) from memory (and that doesn't even take into account possible superscaler instruction pre-fetch, decode, and execution).
posted old email mentioning 801, fort knox, romp, rios, pc/rt,
rs/6000, power/pc, etc.
https://www.garlic.com/~lynn/lhwemail.html#801
misc. collected posts mentioning 801, fort knox, romp, rios, pc/rt,
rs/6000, power/pc, etc
https://www.garlic.com/~lynn/subtopic.html#801
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The logic of privacy Newsgroups: alt.privacy Date: Wed, 31 Jan 2007 07:59:40 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
somewhat related
IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html
from above:
For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid
... snip ...
note in the late 90s, FSTC
http://www.fstc.org/
had proposed something similar with "FAST" (financial authenticated secure transaction) ... but w/o the user needing an encrypted credential ahead of time. The institution just needed a question that was digitally signed by the user that could be answered yes/no.
related post
https://www.garlic.com/~lynn/aadsm26.htm#24 IBM donates new privacy tool to open-source Higgins
In the mid-90s, the x9a10 financial standards group had been given the
requirement to preserve the integrity of the financial infrastructure
for all retail transactions ... which resulted in the x9.59 standard
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
which basically has a financial transaction that can be answered yes/no ... and can be authenticated with digital signature that can be verified with a public key on-file with the financial institution.
x9.59 financial standard also included business rule that account
numbers used in x9.59 transactions couldn't be used in
non-authenticated transactions. This didn't do anything to eliminate
(recent spate of) skimming/harvesting attacks capturing account
numbers (frequently from logs of previous transactions)
https://www.garlic.com/~lynn/subintegrity.html#harvest
however, it made the information collected unusable by the attackers for (replay attack) fraudulent transactions.
In effect, FAST transactions were x9.59 transactions ... but allowed transactions that asked questions concerning matters other than approving a financial transaction (does person meet some age criteria, address criteria, or other subject).
Part of this was from experience of the x.509 identity certificates
from the early 90s that were being overloaded with personal
information. At the time, these were being proposed as electronic
versions for things like passports and driver's licenses. Relatively
recent post on the passport subject:
https://www.garlic.com/~lynn/aadsm25.htm#46 Flaw exploited in RFID-enabled passports
https://www.garlic.com/~lynn/aadsm26.htm#0 Flaw in RFID-enabled passports (part 2?)
By the mid-90s, it was starting to dawn that such an infrastructure
represented significant privacy issues. The response in the mid-90s
was something called relying-party-only certificates
https://www.garlic.com/~lynn/subpubkey.html#rpo
which contained simple a record locater (or account number) to where the information could be found at an institution. An institution could used the on-file information to determine the response ... w/o constantly spraying a whole load of privacy information around the whole world with digital certificates.
However, it was relatively trivial to show that such digital certificates were redundant and superfluous ... all you really needed was a strongly authenticated transaction containing the record locator (and infrastructure design that eliminated static data paradigm and associated replay attacks).
This most recent news article is taking effectively the same digital
certificate/credential mechanism and encrypting the
certificate/credential ... so it is effectively (again) a
relying-party-only credential (the information only accessible
by the responsible institution). The X9.59/FAST scenario just
eliminates having to repeatedly ship (potentially egregious) payload
of the encrypted information back to the institution that issued the
credential in the first place ... past posts about egregious, bloated
payloads
https://www.garlic.com/~lynn/subpubkey.html#bloat
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Wed, 31 Jan 2007 08:10:56 -0700jmfbahciv writes:
from slightly different standpoint
IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html
from above:
For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid
... snip ...
and recent comments (from x9.59 perspective)
https://www.garlic.com/~lynn/aadsm26.htm#24 IBM donates new privacy tool to open-source Higgins
https://www.garlic.com/~lynn/2007d.html#10 The logic of privacy
and x9.59 references
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: One Time Identification, a request for comments/testing. Newsgroups: comp.protocols.kerberos Date: Wed, 31 Jan 2007 09:11:57 -0700g.w writes:
IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html
from above:
For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid
... snip ...
which talks about
The encrypted credentials would be for one-time use only. The next
purchase or other transaction will require a new credential. The
process is similar to the one-time-use credit card numbers that
Citigroup card holders can already generate on the bank's Web site.
... snip ...
being one-time use (as countermeasure to replay attacks) ... which implies that you have been loaded up with a supply before hand ... or there is a dynamic interaction to get the credential followed by a subsequent interaction to validate the credential ... effectively having two independent transactions bracketing the actual operation (so what is to prevent attacking the initial transaction having to do with the dynamic issuing of the encrypted credential).
a couple recent comments about strategy vis-a-vis x9.59 & FAST
https://www.garlic.com/~lynn/aadsm26.htm#24 IBM donates a new privacy tool to open-source Higgins
https://www.garlic.com/~lynn/2007d.html#10 The logic of privacy
The original PKINIT draft just had registering public key in-lieu of
password, performing a digital signature (with some countermeasure
against replay attack) and validating the digital signature with the
on-file public key. this is similar to this proposal from 1981
... recent post
https://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
with copy of some old email
https://www.garlic.com/~lynn/2006w.html#email810515
... i.e. certificate-less operation
https://www.garlic.com/~lynn/subpubkey.html#certless
it wasn't until sometime later that there was a lot of pressure applied
to include digital certificate mode of operation in pkinit ... misc.
past posts mentioning pkinit and/or early kerberos work
https://www.garlic.com/~lynn/subpubkey.html#kerberos
the token proposal for such operation was aads chip strawman
https://www.garlic.com/~lynn/x959.html#aads
which basically was a chip that was form-factor & interface (including USB) agnostic and simply performed a digital signature w/o ever divulging the private key. this was sufficient for establishing something you have authentication.
The big issue with existing password scheme is that they are shared-secrets ... so that there is requirement for unique shared-secret for
every unique security domain, as a countermeasure against cross-domain
attacks (local garage ISP attacking online banking) ... some past
posts
https://www.garlic.com/~lynn/subintegrity.html#secrets
in the token scenario ... the pin/password is passed to your private token (for correct operation) ... thus changing it from a shared-secret to just a secret (eliminating needing large number of different pin/passwords as countermeasure to shared-secret vulnerabilities).
a little tangential ... there is a separate issue with
institutional-centric token issuance ... resulting in having to carry
around as many unique tokens to manage ... as a person previously had
unique passwords to manage. a few recent posts on the
institutional-centric vis-a-vis person-centric hardware token paradigm
https://www.garlic.com/~lynn/2006q.html#3 Device Authentication - The answer to attacks lauched using stolen passwords?
https://www.garlic.com/~lynn/2007b.html#12 Special characters in passwords was Re: RACF - Password rules
https://www.garlic.com/~lynn/2007b.html#13 special characters in passwords
so another exploit issues for multi-factor authentication ... like a something you know pin/password ... is evesdropping attacks on the entry of the pin/password. the digital signature information is assumed to be sufficient computational integrity that additional information isn't needed (like pin/password) as countermeasure to brute force attack. so the purpose of the pin/password is purely as a countermeasure to lost/stolen token. the assumption here is that stealing the token is a (relatively) independent operation from stealing the pin/password (modulo direct physical coercion) ... which is somewhat the basis for multi-factor authentication assumed to provide stronger security (i.e. different factors having independent vulnerabilities).
the issue here is having a person-owned pin/password entry device for the token ... possibly built into the token itself ... or incorporated into a cellphone or PDA based operation ... and communicating wirelessly (rather than via USB).
In the person-centric scenario ... then the same mechanism can be used for both straight authentication (say in the kerberos scenario) as well as for integrity (electronic transaction requiring both authentication and integrity).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Why so little parallelism? Newsgroups: comp.arch Date: Wed, 31 Jan 2007 09:45:06 -0700previous in this thread:
and now ...
IBM's Chief Architect Says Software is at Dead End
http://it.slashdot.org/it/07/01/30/1547235.shtml
and
Where's The Software To Catch Up To Multicore Computing?
http://www.informationweek.com/news/showArticle.jhtml?articleID=197800774
from above:
To make this complex architecture useful to even the most advanced
scientific simulation application developers, much of the work on the
system development is in the programming methodology enablement and
corresponding application framework and tooling.
... snip ...
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Unix magic poster Newsgroups: alt.folklore.computers Date: Wed, 31 Jan 2007 13:25:27 -0700Al Balmer <albalmer@att.net> writes:
misc. previous references to this series of trip reports
https://www.garlic.com/~lynn/2001l.html#61 MVS History (all parts)
https://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
https://www.garlic.com/~lynn/2006n.html#56 AT&T Labs vs. Google Labs - R&D History
https://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
SPICE reference from part of trip report to CMU 22jul81-24jul81
Shifting Towards Personal Computing Most of what I said above about the advantages of small machines over large machines is, I believe, also applicable when comparing personal machines to small machines. That is, personal machines will probably have as many advantages over small machines as small machines do over large machines. But before I go into that, let me define what I mean by *large*, *small*, and *personal* machines. My primary criterion in categorizing a machine as *large* or *small* is the number of simultaneous users it typically supports. The following table is my general feeling: 1 user - personal machine 2 to 10 users - very small machine 10 to 25 users - small machine 25 to 50 users - medium machine 50 to 150 users - large machine 150 to 300 users - very large machine over 300 users - enormous machine Of course, the larger machines are generally faster and have more memory and storage as well as more users. But for a machine to be effective, regardless of the number of users it supports, it must deliver a certain amount of computing power to each user and there must be available a certain amount of memory and storage per user. As suggested above, there seems to be quite a bit of evidence to indicate that doubling the MIPS, memory, storage, and number of users, results in less of everything for everyone. Several people at CMU seem to feel that the natural extension of this is the personal computer where a fixed amount of compute power and memory are dedicated to a single user and not subject to load fluctuations or other user's hardware or software failures. The SPICE people at CMU seem to feel that such a machine would need about 1 MIPS of compute power and about 1 Mbyte of memory plus around 10 Mbyte of DASD part of which should be on a removable medium. Current technology seems to fall just short of providing this combination at an affordable price, but it's close and getting closer. I tend to agree with the SPICE people that we should be heading toward personal machines and should begin getting them for our Computer Science researchers even if they cost 10 times what we'd like to pay for them The cost will come down dramatically and we need to get leading edge experience with machines that will be cost effective 4-5 years from now which means we'll have to pay much higher prices today. The alternative is to work with today's cost effective technology and gain very little experience on how to use tomorrow's.... snip ...
The Computer Science Department The goal of the computer science department computer facilities is to optimize the productivity of researchers, and to provide sufficient cycles for the various research projects. They want to provide a minimally constrained solution space for the researchers. "Solve the problem, then specifiy the requirements" The department is committed to doing research with equipment that will be available in 3 to 5 years; thus it costs much more to simulate that equipment with currently available gear. They view such capital expenditures as leverage for their researchers. Try to choose productivity of the users over throughput of the systems - minimize administrative overhead and constraints. The computer science department personnel are as follows: • 40 faculty and researchers • 80 graduate students • 55 staff, including administrators, secretaries, programmers, engineers, operators, technicians Systems and Their Use The computer science department has several different kinds of machines: • General purpose time sharing • Project machines • Personal machines • research systems • connectivity and networking • special resources... snip ...
The SPICE Project For a complete description of the Spice project, see "Research in Personal Computing at Carnegie-Mellon University, Peter G. Hibbard, 25 November 1980, Spice Document S008" Spice, *Scientific Personal Integrated Computing Environment* is a major research project currently underway at CMU. Spice is aimed at increasing user productivity. The environment will: • Comprise at least 100 personal computers connected in a high bandwidth network, providing facilities for scientific computing. • Provide access to shared facilities such as printers and filing systems. • Provide a consistent style of user interaction for all the software components. • Provide tools to encourage modular extension and enhancement of the software during its lifetime. Work started on Spice during the summer of 1979. It is expected that a version of the system will be available to users by 1983; and essentially complete by 1985. The computer science department is heavily committed to using Spice for its principal computing resources until the 1990's. The Spice machine is a 2 to 4 mips processor, 1 megabyte of memory, a 100 megabyte disk, a full page APA display, tablet, and a 10 megabit ethernet connection. While CMU is using the Perq as a Spice development machine, they feel that it is under powered, and does not represent what will be needed in the second half of this decade. The machines will be connected via the 10 megabit ethernet, and will share a common file system, with the local disk being managed as a cache to the primary file server(s). Thus the system will give the appearance of a large timesharing system, yet have all the advantages of personal, separate machines.... snip ...
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Pennsylvania Railroad ticket fax service Newsgroups: alt.folklore.computers Date: Thu, 01 Feb 2007 09:01:47 -0700Dave Pitts <dpitts@cozx.com> writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: "The Elements of Programming Style" Newsgroups: alt.folklore.computers Date: Thu, 01 Feb 2007 09:08:46 -0700Greg Menke <gdmnews@toadmail.com> writes:
misc. past posts mentioning mach:
https://www.garlic.com/~lynn/2000.html#64 distributed locking patents
https://www.garlic.com/~lynn/2000e.html#27 OCF, PC/SC and GOP
https://www.garlic.com/~lynn/2001.html#44 Options for Delivering Mainframe Reports to Outside Organizat ions
https://www.garlic.com/~lynn/2001b.html#14 IBM's announcement on RVAs
https://www.garlic.com/~lynn/2001f.html#22 Early AIX including AIX/370
https://www.garlic.com/~lynn/2001f.html#23 MERT Operating System & Microkernels
https://www.garlic.com/~lynn/2001n.html#35 cc SMP
https://www.garlic.com/~lynn/2002i.html#54 Unisys A11 worth keeping?
https://www.garlic.com/~lynn/2002i.html#73 Unisys A11 worth keeping?
https://www.garlic.com/~lynn/2002o.html#32 I found the Olsen Quote
https://www.garlic.com/~lynn/2002o.html#40 I found the Olsen Quote
https://www.garlic.com/~lynn/2003.html#46 Horror stories: high system call overhead
https://www.garlic.com/~lynn/2003.html#50 Origin of Kerberos
https://www.garlic.com/~lynn/2003c.html#32 Early attempts at console humor?
https://www.garlic.com/~lynn/2003c.html#45 Early attempts at console humor?
https://www.garlic.com/~lynn/2003e.html#25 A Speculative question
https://www.garlic.com/~lynn/2003e.html#33 A Speculative question
https://www.garlic.com/~lynn/2003g.html#9 Determining Key Exchange Frequency?
https://www.garlic.com/~lynn/2003i.html#66 TGV in the USA?
https://www.garlic.com/~lynn/2003j.html#72 Microkernels are not "all or nothing". Re: Multics Concepts For
https://www.garlic.com/~lynn/2004c.html#53 defination of terms: "Application Server" vs. "Transaction Server"
https://www.garlic.com/~lynn/2004h.html#42 Interesting read about upcoming K9 processors
https://www.garlic.com/~lynn/2004k.html#50 Xah Lee's Unixism
https://www.garlic.com/~lynn/2004n.html#9 RISCs too close to hardware?
https://www.garlic.com/~lynn/2005b.html#22 The Mac is like a modern day Betamax
https://www.garlic.com/~lynn/2005c.html#44 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005d.html#20 shared memory programming on distributed memory model?
https://www.garlic.com/~lynn/2005g.html#54 Security via hardware?
https://www.garlic.com/~lynn/2005i.html#53 Single Password - Linux & Windows
https://www.garlic.com/~lynn/2005j.html#13 Performance and Capacity Planning
https://www.garlic.com/~lynn/2005j.html#26 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005q.html#49 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005r.html#43 Numa-Q Information
https://www.garlic.com/~lynn/2006b.html#8 Free to good home: IBM RT UNIX
https://www.garlic.com/~lynn/2006c.html#42 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#43 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006l.html#43 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006m.html#10 An Out-of-the-Main Activity
https://www.garlic.com/~lynn/2006m.html#14 The AN/FSQ-31 Did Exist?!
https://www.garlic.com/~lynn/2007b.html#16 V2X2 vs. Shark (SnapShot v. FlashCopy)
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Jim Gray Is Missing Newsgroups: alt.folklore.computers Date: Fri, 02 Feb 2007 09:11:08 -0700re:
recent reference
Sea too vast for man, machine, SEARCHERS GRASPING AT THEORIES AS DAYS
PASS WITHOUT CLUES
http://www.mercurynews.com/mld/mercurynews/news/11808773.htm
From Jim's past ... this is shorter version dated 20Sep80, there is
also one about twice as long from four days later later dated 24Sep80,
copy located here:
https://web.archive.org/web/20081115000000*/http://research.microsoft.com/~gray//papers/CritiqueOfIBM%27sCSResearch.doc
recent post
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
with couple emails from the period making reference to MIP envy
(and Jim leaving for Tandem):
https://www.garlic.com/~lynn/2007.html#email801006
https://www.garlic.com/~lynn/2007.html#email801016
references for a few terms used in the above:
"System R" is the original relational/SQL project ... some number
of posts here
https://www.garlic.com/~lynn/submain.html#systemr
*FS* in the above refers to "Future System" project, some number
of posts here
https://www.garlic.com/~lynn/submain.html#futuresys
*DOS* in the above doesn't refer to the PC "DOS" ... but to the 360 "disk operating system" ... an entry level 360 operating system ... simpler than OS/360 (and less resource requirements) ... but more complex than "TOS" (tape operating system).
*SCRIPT* was document formatting application, originally developed at
the science center for CMS in the mid-60s. GML (precursor to SGML,
HTML, XML, etc) was invented at the science center in '69. SCRIPT
was then enhanced to also have support for GML tags. misc. collected
posts
https://www.garlic.com/~lynn/submain.html#sgml
recent reference to STL's log-on restriction policies
https://www.garlic.com/~lynn/2007c.html#12
with old email about "group fairshare" contributing to STL (now called
Silicon Valley Lab) relaxing the (above referenced) controlled
"log-on" policies
https://www.garlic.com/~lynn/2007c.html#email830709
After Jim left for Tandem, we would periodically go by and visit,
especially on Friday afternoons when beer was served. There was also a
computer mailing list, online discussion that started up which came to
be called Tandem Memos ... concerning some of the topics mentioned
in MIPENVY as well as some of the stuff that came out of Friday
afternoon discussions. I got a lot of blame for Tandem Memos,
recent post (also mentioning Jim and Tandem) with reference
https://www.garlic.com/~lynn/2006w.html#46
and recent post with lots of old posts mentioning Tandem Memos
https://www.garlic.com/~lynn/2006w.html#35
The visits and trip reports in the summer of '81 were somewhat an
outcome of both MIPENVY and the Tandem Memos. Some posts containing
portions of the series of trip reports
https://www.garlic.com/~lynn/2001l.html#61 MVS History (all parts)
https://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
https://www.garlic.com/~lynn/2006n.html#56 AT&T Labs vs. Google Labs - R&D History
https://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
https://www.garlic.com/~lynn/2007d.html#14 Unix magic poster
Starting in the late 70s, I somewhat sponsored a Friday after work,
typically at one of the local establishments within several blocks of
bldg. 28. Jim was frequently a regular at such events ... and they
periodically would go on until late in the evening (sometimes until
they threw us out). It was at one such gathering that Jim and I
concocted the idea of online telephone books ... as a ploy to get
executives to use online computing. Misc. past posts mentioning the
subject:
https://www.garlic.com/~lynn/2003b.html#45 hyperblock drift, was filesystem structure (long warning)
https://www.garlic.com/~lynn/2004c.html#0 A POX on you, Dennis Ritchie!!!
https://www.garlic.com/~lynn/2005c.html#38 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005c.html#43 History of performance counters
https://www.garlic.com/~lynn/2005t.html#44 FULIST
https://www.garlic.com/~lynn/2006b.html#9 Is there a workaround for Thunderbird in a corporate environment?
https://www.garlic.com/~lynn/2006v.html#32 Effi[ci]ency of branch table vs individual compare & branch
https://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
https://www.garlic.com/~lynn/2007b.html#31 IBMLink 2000 Finding ESO levels
and some definitions from old (IBM) jargon file ...
[MIP envy]
n. The term, coined by Jim Gray in 1980, that began the
Tandem Memos (q.v.). MIP envy is the coveting of other's
facilities - not just the CPU power available to them, but also
the languages, editors, debuggers, mail systems and
networks. MIP envy is a term every programmer will
understand, being another expression of the proverb The
grass is always greener on the other side of the fence.
[Tandem Memos]
n. Something constructive but hard to control; a fresh of breath air
(sic). "That's another Tandem Memos." A phrase to worry middle
management. It refers to the computer-based conference (widely
distributed in 1981) in which many technical personnel expressed
dissatisfaction with the tools available to them at that time, and
also constructively criticized the way products were [are] developed.
The memos are required reading for anyone with a serious interest in
quality products. If you have not seen the memos, try reading the
November 1981 Datamation summary.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBMLink 2000 Finding ESO levels Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers Date: Fri, 02 Feb 2007 13:50:16 -0700ref:
other ancient HONE references:
Date: 02/16/79 16:24:41
From: wheeler
To: east coast
would you pass on to YYYYYY. HONE people have been led to understand
that they should start working on converting to MVS since there will
not be any more VM for the high end. specific details started at CCDN
task force meeting (which some HONE people belong) got a presentation
from XXXXXX (they were not sure of the spelling), DP Product Group
POK. VM remains strategic for low end, but there will definitely not be
any for the high end. HONE were told by same that they could solve
their MVS performance problems by rewriting all their VSAPL
application code in assembler.
... snip ... top of post, old email index, HONE email
Date: 02/20/79 15:41:25
From: wheeler
To: distribution
VM project office has been active on file I sent out. XXXXXX may
have been using the wrong set of flip charts when he made his
presentation and steps are being taken to
1) assure HONE that nothing of the sort is intended
and
2) make sure that it is not repeated
... snip ... top of post, old email index, HONE email
I have some vague recollection that XXXXXX had been in charge of the
resource manager component of FS ... and in old discussions with that
group, telling them that I thot what i had already implemented for
dynamic adaptive resource management was better than what they were
spec'ing for FS. misc. past posts mentioning future system project
https://www.garlic.com/~lynn/submain.html#futuresys
This scenario about HONE having to convert to MVS was just one
in a long series ... relatively recent related post
https://www.garlic.com/~lynn/2006o.html#53 The Fate of VM - was: Re: Baby MVS????
HONE provided vm370-based, online, interactive service for world-wide sales, marketing and field people. HONE had started out with clone of the science center's cp67 and then later converted to vm370 ... and eventually HONE clones started popping up all over the world.
One of HONE (apl) major applications were the configurators which basically filled out the sales order. Mainframe orders typically required complex combination of options and features (with lots of interdependencies) dependent on specific customer configurations.
Over 15yr period, I provided HONE custom built cp67 and then vm370
systems, I even got to personally install some of the clones.
misc. past posts mentioning HONE
https://www.garlic.com/~lynn/subtopic.html#hone
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Pennsylvania Railroad ticket fax service Newsgroups: misc.transport.rail.americas,alt.folklore.computers Date: Fri, 02 Feb 2007 14:44:15 -0700David Lesher <wb8foz@panix.com> writes:
old thread with mention of even older thread/discussion of ALC
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
ACP (airline control program) "operating system" was getting near the point where they would make the name change to TPF (transaction processing facility) ... since you were started to find some number of large financial operations using it for financial transactions.
SABRE was the American system, united had their own ACP system as well as eastern airlines. ACP/TPF wasn't going to get multiprocessor support for some time ... so it tended to be run on loosely-coupled clusters of single-processor machines ... and the airlines tended to try and get the largest they could, eastern had ACP running on 370/195.
later, AMADEUS (European reservation system) effort would start out
using eastern's system as starting point (later part of the 80s). My
wife did a short stint as AMADEUS chief architect. misc. past posts
mentioning AMADEUS:
https://www.garlic.com/~lynn/2001g.html#50 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2001h.html#76 Other oddball IBM System 360's ?
https://www.garlic.com/~lynn/2003d.html#67 unix
https://www.garlic.com/~lynn/2004b.html#6 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004m.html#27 Shipwrecks
https://www.garlic.com/~lynn/2004o.html#23 Demo: Things in Hierarchies (w/o RM/SQL)
https://www.garlic.com/~lynn/2004o.html#29 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005f.html#22 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
https://www.garlic.com/~lynn/2006o.html#4 How Many 360/195s and 370/195s were shipped?
https://www.garlic.com/~lynn/2006r.html#9 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006y.html#14 Why so little parallelism?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Intel prepares to kill off the Pentium 4 Newsgroups: comp.os.vms,alt.folklore.computers Date: Sat, 03 Feb 2007 10:39:49 -0700pechter@pechter.dyndns.org (William Pechter) writes:
we were started to make customer executive presentations on 3-tier
architecture and middle-layer/middleware type configurations
https://www.garlic.com/~lynn/subnetwork.html#3tier
and taking heat from the SAA and token-ring forces ... as i've
mentioned before ... SAA could be construed as attempting to
maintain the terminal emulation infrastructure (and attempting
to return the 2-tier, client/server genie back to the bottle)
https://www.garlic.com/~lynn/subnetwork.html#emulation
one of the things that almaden was finding was that star-wired ethernet configuration had both lower latency and higher aggregate thruput ... than running as 16mbit token-ring.
misc. old thread/post
https://www.garlic.com/~lynn/96.html#17 middle layer
https://www.garlic.com/~lynn/2005q.html#18 Ethernet, Aloha and CSMA/CD
https://www.garlic.com/~lynn/2005u.html#50 Channel distances
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: How many 36-bit Unix ports in the old days? Newsgroups: alt.folklore.computers Date: Sun, 04 Feb 2007 09:43:21 -0700Dave Daniels <dave_daniels@127.0.0.1> writes:
as mentioned before, the future system project absorbed lots of
the corporations tactical and strategic efforts
https://www.garlic.com/~lynn/submain.html#futuresys
and when it was killed, there was all sorts of scurrying around.
so 158-3 had microcode engine with both a set of microcode that supported six "integrated" channels ... as well as microcode that supported 370 processor execution.
for the 303x ... they repackaged a 158-3 microcode engine w/o the 370 microcode; just the integrated channel microcode and called it a "channel director".
a 3031 was then a repackaged 158-3 microcode engine w/o the integrated channel microcode; just the 370 microcode with a separate external "channel director" box (i.e. might call it a multiprocessor ... but the two microcode engines were doing different things).
a 3032 was then a repackaged 168-3 ... configured with one or more (up to three for 16 channels) channel director boxes.
a 3033 was the 168-3 "wiring diagram" remapped to faster technology.
now when you powered on a processor box ... things were typically set-up so that the processor completed its power up and its impl ... and then it started a sequential power-up sequence on the external boxes ... channels (channel director), control units, disks, and other devices. A configuration might easily have 30-60 boxes ... where the processor would power up (and microcode load) followed by sequentially doing power-up sequence on each of the other boxes in the configuration.
The power-up of an external boxes might also have their own microcode
load as part of the power-on sequence i.e. floppy disks were
originally developed for 3830 disk controller microcode load ... and
then also got used for processor microcode loads; recent reference
https://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?
So 3032 power up ... would include microcode load for the 3032, and then it would have to power sequence the channel directors, i.e. 158-3 microcode engines, which would individual power-up and do their own microcode load, and then the various i/o control units powered up along with their own microcode loading.
for additional drift ... as part of the i/o reliability enhancements
for the engineering labs (rewrote the i/o supervisor)
https://www.garlic.com/~lynn/subtopic.html#disk
one of the tricks was how to force a bollixed up channel director (on the 3033 in bldg. 15) to re-impl under software control from the processor (i.e. a misbehaving engineering control unit or device could get the channel director into a state requiring the channel director to be reset). so it turned out that if you did a very fast Clear-channel command sequence to each of the channel director's channels ... the channel director would graciously re-impl ... and there was a similar convention for various control units.
the 158-3/3031 was air cooled ... but the other processors had water cooled
heat exchange (fluid circulating inside the processor was closed loop
with heat exchange interface to external liquid cooling). old
posts mentioning glitch in the thermal and flow sensing that would
automatically shut-off power
https://www.garlic.com/~lynn/2000b.html#36 How to learn assembler language for OS/390 ?
https://www.garlic.com/~lynn/2000b.html#38 How to learn assembler language for OS/390 ?
https://www.garlic.com/~lynn/2001k.html#4 hot chips and nuclear reactors
https://www.garlic.com/~lynn/2002d.html#13 IBM Mainframe at home
https://www.garlic.com/~lynn/2004p.html#35 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004p.html#36 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004p.html#41 IBM 3614 and 3624 ATM's
various past posts mentioning 303x machines &/or 303x channel directors:
https://www.garlic.com/~lynn/97.html#20 Why Mainframes?
https://www.garlic.com/~lynn/99.html#7 IBM S/360
https://www.garlic.com/~lynn/99.html#187 Merced Processor Support at it again
https://www.garlic.com/~lynn/2000.html#78 Mainframe operating systems
https://www.garlic.com/~lynn/2000c.html#69 Does the word "mainframe" still have a meaning?
https://www.garlic.com/~lynn/2000d.html#7 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#11 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#12 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#21 S/360 development burnout?
https://www.garlic.com/~lynn/2000g.html#11 360/370 instruction cycle time
https://www.garlic.com/~lynn/2001b.html#39 John Mashey's greatest hits
https://www.garlic.com/~lynn/2001b.html#83 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2001j.html#3 YKYGOW...
https://www.garlic.com/~lynn/2001l.html#24 mainframe question
https://www.garlic.com/~lynn/2001l.html#32 mainframe question
https://www.garlic.com/~lynn/2002.html#36 a.f.c history checkup... (was What specifications will the standard year 2001 PC have?)
https://www.garlic.com/~lynn/2002.html#48 Microcode?
https://www.garlic.com/~lynn/2002d.html#7 IBM Mainframe at home
https://www.garlic.com/~lynn/2002f.html#8 Is AMD doing an Intel?
https://www.garlic.com/~lynn/2002i.html#23 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
https://www.garlic.com/~lynn/2002p.html#59 AMP vs SMP
https://www.garlic.com/~lynn/2003.html#39 Flex Question
https://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
https://www.garlic.com/~lynn/2003g.html#32 One Processor is bad?
https://www.garlic.com/~lynn/2004.html#8 virtual-machine theory
https://www.garlic.com/~lynn/2004.html#9 Dyadic
https://www.garlic.com/~lynn/2004.html#10 Dyadic
https://www.garlic.com/~lynn/2004d.html#12 real multi-tasking, multi-programming
https://www.garlic.com/~lynn/2004d.html#64 System/360 40 years old today
https://www.garlic.com/~lynn/2004e.html#51 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004f.html#21 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#17 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#50 Chained I/O's
https://www.garlic.com/~lynn/2004m.html#17 mainframe and microprocessor
https://www.garlic.com/~lynn/2004n.html#14 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2004o.html#7 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005b.html#26 CAS and LL/SC
https://www.garlic.com/~lynn/2005d.html#62 Misuse of word "microcode"
https://www.garlic.com/~lynn/2005e.html#59 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005h.html#40 Software for IBM 360/30
https://www.garlic.com/~lynn/2005m.html#25 IBM's mini computers--lack thereof
https://www.garlic.com/~lynn/2005p.html#1 Intel engineer discusses their dual-core design
https://www.garlic.com/~lynn/2005q.html#30 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2005s.html#22 MVCIN instruction
https://www.garlic.com/~lynn/2006m.html#27 Old Hashing Routine
https://www.garlic.com/~lynn/2006n.html#16 On the 370/165 and the 360/85
https://www.garlic.com/~lynn/2006q.html#31 VAXen with switchmode power supplies?
https://www.garlic.com/~lynn/2006r.html#22 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006r.html#40 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006s.html#40 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006s.html#42 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006t.html#19 old vm370 mitre benchmark
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: How many 36-bit Unix ports in the old days? Newsgroups: alt.folklore.computers Date: Sun, 04 Feb 2007 09:59:42 -0700jmfbahciv writes:
and this is recent posts about fast reboot after some sort of system
glitch ... that would include writing image of storage to disk,
checkpointing various other pieces of stuff and then rebooting.
https://www.garlic.com/~lynn/2007c.html#41 How many 36-bit Unix ports in the old days?
and description here about redoing parts of the startup function:
https://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?
note, later machines had service processors that had to power-on and
impl before the processor (followed by powerup/impl sequence for the
rest of the boxes in the configuration). in the case of the 3090, the
"service processors" were a pair of 4361 processors which would
power-on, impl their microcode, and then boot a customized version of
vm370 release 6 ... which then executed the service processor
functions that would get the 3090 processor up and impl'ed
https://www.garlic.com/~lynn/2007c.html#16 How many 36-bit Unix ports in the old days?
misc. past posts/thread about fast reboot:
https://www.garlic.com/~lynn/2001g.html#52 Compaq kills Alpha
https://www.garlic.com/~lynn/2003p.html#23 1960s images of IBM 360 mainframes
https://www.garlic.com/~lynn/2004o.html#7 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005g.html#30 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005o.html#25 auto reIPL
https://www.garlic.com/~lynn/2005o.html#30 auto reIPL
https://www.garlic.com/~lynn/2006c.html#28 Mount DASD as read-only
https://www.garlic.com/~lynn/2006r.html#41 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: How many 36-bit Unix ports in the old days? Newsgroups: alt.folklore.computers Date: Sun, 04 Feb 2007 14:33:17 -0700"Sarr J. Blumson" <sarr@rygar.gpcc.itd.umich.edu> writes:
but the nearly instant up was one of the reasons that it could be configured for use as the "service processor" (on pair of 4361s) in 3090 ... aka the majority of the "service machines" were not required for the service processor configuration.
other recent posts mentioning the use in service processor
https://www.garlic.com/~lynn/2007.html#18 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007.html#24 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007.html#39 Just another example of mainframe costs
https://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#15 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#30 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007c.html#16 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?
the whole service (virtual) machine concept is showing about again as virtual
appliances deployed by new generations of virtual machine hypervisors; some
discussion in recent thread
https://www.garlic.com/~lynn/2006t.html#46 To RISC or not to RISC
https://www.garlic.com/~lynn/2006w.html#25 To RISC or not to RISC
https://www.garlic.com/~lynn/2006x.html#6 Multics on Vmware ?
https://www.garlic.com/~lynn/2006x.html#8 vmshare
possibly the first couple things on the path to "service machines" ...
was back on cp67 with the combination of 1) auto dump and fast
automatic restart along with 2) prepare command which turned off the
cpu meter (from the days of leased machines and monthly charged based
on what had been logged on the cpu meter). the combination of the two
things allowed time-sharing service to be provided 7x24 at nominal
cost (even off shift and weekends) w/o always requiring an operator to
be present. some of this is discussed in various postings related to
commercial time-sharing offering of cp67 and vm370
https://www.garlic.com/~lynn/submain.html#timeshare
however, the "service machines" still required manual activation.
At the science center, doing a lot of performance testing, I had
developed some automated benchmarking procedures
https://www.garlic.com/~lynn/submain.html#benchmark
... that i were setup to run unattended, non-stop for multiple shifts
at a time. part of the benchmarking involved generating custom
modified kernels with specific features and then doing a "fast" reboot
to start a new set of tests. this required that all the benchmarking
processes had to come up automagically (in service machine controlling
the benchmarks) w/o manual intervention. For this I created the
"autolog" command. This one of the features that were picked up in
and shipped as part of the vm370 release 3 product ... along with
very small subset of the extended virtual memory support
https://www.garlic.com/~lynn/submain.html#mmap
https://www.garlic.com/~lynn/submain.html#adcon
most stuff was relatively quick except the scenario where system had
gone down with power outage and various things weren't saved to disk
for use as part of restart. power outage in cp67 had met that all
"spool" file information was lost. in vm370, spool file
"checkpointing" was added. This was a small subset of spool file
status ... that in recovery after power failure (w/o necessary status
information) ... the checkpointed information was sufficient to
support a "fsck" type operation ... use the small amount of
information as starting point to scan the spool file disks and
recreate the necessary status information. For a large configuration
with lots of spool files this could take an hour elapsed time (and was
done in early boot sequence ... long before system was opened up to
any sort of other execution and use). this was subject of my "spool
file system" changes ... to both significantly increase the raw
thruput of spool file operation (by possibly two orders of magnitude)
as well as improve the power-failure/chkpt scenario to worst case of
few minutes. a few recent posts on that subject:
https://www.garlic.com/~lynn/2006q.html#27 dcss and page mapped filesystem
https://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2006t.html#45 To RISC or not to RISC
https://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?
of course, in the 3090 "service processor" scenario ... it was configured so that it didn't have to worry about spool files ... even in the scenario of restart/reboot after power-failure.
misc. past posts mentioning autolog command (as well as its
automagic execution at kernel boot for activation of service
machines):
https://www.garlic.com/~lynn/2001l.html#32 mainframe question
https://www.garlic.com/~lynn/2002q.html#28 Origin of XAUTOLOG (x-post)
https://www.garlic.com/~lynn/2003j.html#34 Interrupt in an IBM mainframe
https://www.garlic.com/~lynn/2003k.html#49 S/360 IPL from 7 track tape
https://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
https://www.garlic.com/~lynn/2005.html#53 8086 memory space
https://www.garlic.com/~lynn/2005.html#59 8086 memory space
https://www.garlic.com/~lynn/2005o.html#30 auto reIPL
https://www.garlic.com/~lynn/2006w.html#8 Why these original FORTRAN quirks?
https://www.garlic.com/~lynn/2006w.html#16 intersection between autolog command and CMSBACK (more history)
https://www.garlic.com/~lynn/2006w.html#25 To RISC or not to RISC
https://www.garlic.com/~lynn/2006w.html#42 vmshare
https://www.garlic.com/~lynn/2006w.html#44 more secure communication over the network
https://www.garlic.com/~lynn/2006w.html#52 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2006x.html#6 Multics on Vmware ?
https://www.garlic.com/~lynn/2006x.html#8 vmshare
https://www.garlic.com/~lynn/2006y.html#7 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2006y.html#35 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2007.html#11 vm/sp1
https://www.garlic.com/~lynn/2007.html#14 vm/sp1
https://www.garlic.com/~lynn/2007.html#23 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007b.html#7 information utility
https://www.garlic.com/~lynn/2007b.html#31 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007b.html#55 IBMLink 2000 Finding ESO levels
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: How many 36-bit Unix ports in the old days? Newsgroups: alt.folklore.computers Date: Sun, 04 Feb 2007 14:42:18 -0700"David Wade" <g8mqw@yahoo.com> writes:
doing some work in the mid-80s related to IMS hot-standby ... there was issue with VTAM having to do with recovery after failure and the "owning" scp/pu5 rebuilding the session information. for large configuration with possibly 20,000 sessions to rebuild ... the VTAM "working set" could quickly exceed available real storage and things would degenerate effectively into page thrashing off disk. IMS hot-standby could effectively be up (with replicated cluster operation ... even at geographically remote site) ... but if the MVS with the owning scp/pu5 (VTAM) for the sessions got cycled ... its recovery time could be a multiple hrs.
for other topic drift ... long ago and far away, my wife had been
con'ed into serving a stint in pok responsible for loosely-couple
architecture during that stint she created Peer-Coupled Shared Data
architecture
https://www.garlic.com/~lynn/submain.html#shareddata
however, until sysplex came along ... about the only uptake of her architecture was by the IMS hot-standby group.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: modern paging Newsgroups: alt.folklore.computers Date: Mon, 05 Feb 2007 09:53:53 -0700the 360s & 370s that i worked with in the 60s&70s tended to have real storage sizes in the 512kbyte to 2mbyte range. cp67 and vm370 used virtual memory and paging to manage that real storage ... and you needed to control paging activity to keep up good performance. lots of past posts on the subject of paging, page replacement algorithms, etc
and some posts with old email discussing various aspects of
the subject
https://www.garlic.com/~lynn/lhwemail.html#globallru
recent post with somewhat related discussion ... mentioning getting
blamed for slipping product schedule on washington (old time xt/370)
by six months when I did several benchmarks and found a lot of
applications "page thrashing" in the 384kbyte storage configuration
... and it took them awhile to get the product upgraded to 512kbyte
storage configuration.
https://www.garlic.com/~lynn/2007d.html#7 Has anyone ever used self-modifying microcode? Would it even be useful?
now i have a large data intensive analysis program and i run it on a 1.7ghz pentium M and a 3.4ghz pentium 4 ... and it runs nearly twice as fast on the 1.7ghz pentium M than it does on the 3.4ghz pentium 4. It turns out that the 3.4ghz pentium 4 has a 512k processor cache and the 1.7ghz pentium M has a 2mbyte processor cache ... the bigger processor cache size significantly more than offsets the pentium M processor running at only have the clock rate (i.e. the processor caches are on the order of old-time 360/370 real storage sizes)
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Tue, 06 Feb 2007 07:16:45 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
and for a little more drift
Study Finds Bank of America SiteKey is Flawed
http://it.slashdot.org/it/07/02/05/1323243.shtml
The Emperor's New Security Indicators
http://www.usablesecurity.org/emperor/
and part III of some comments
https://www.garlic.com/~lynn/aadsm26.htm#28 man in the middle, SSL
and for latest, new "old" thing
Chip and pin flaws exposed
http://business.guardian.co.uk/story/0,,2006890,00.html
Fraud team exposes chip and pin flaws
http://money.guardian.co.uk/news_/story/0,,2006888,00.html
Fraudsters 'can hijack chip and pin details in-store'
http://www.24dash.com/billpayments/16145.htm
Chip and pin cards hacked
http://www.thesun.co.uk/article/0,,2005300000-2007060040,00.html
Chip and pin fraud warning issued
http://itn.co.uk/news/45ffad463a16cebbcbd0dfe768eb628e.html
Chip-and-pin loophole
http://www.inthenews.co.uk/infocus/features/in-focus/chip-and-pin-loophole-$1049428.htm
Chip-and-pin 'not infallible'
http://www.inthenews.co.uk/news/news/technology/chip-and-pin-not-infallible-$1049429.htm
as discussed in numerous yes card postings ... some of these exploits
have been around since the 90s with the early chip deployments
https://www.garlic.com/~lynn/subintegrity.html#yescard
post from last year
https://www.garlic.com/~lynn/2006l.html#33 Google Architecture
with reference to deployment by ibm at safeways in the 90s
http://www-03.ibm.com/industries/financialservices/doc/content/solution/1026217103.html
from above:
Safeway and its technology partner IBM were involved in the first
"Chip and Pin" trials held in the UK in 1997. Recently, Safeway
engaged IBM again to provide the Electronic Payment System (EPS)
infrastructure in support of the company's push forward with
the introduction of "Chip and Pin"
... snip ...
From: lynn@garlic.com Subject: Re: modern paging Date: Wed, 07 Feb 2007 11:35:29 -0800 Newsgroups: alt.folklore.computershancock4@bbs.cpcn.com wrote:
when i was doing some stuff on the original relational/sql
implementation
https://www.garlic.com/~lynn/submain.html#systemr
i was also involved in another kind of DBMS implementation ... that sort of started jointly between some people at STL (now called silicon valley lab) and bldg. 29 (los gatos vlsi lab) ... that had some early uptake by the vlsi tools group in bldg.29.
since going on to other things ... i've re-implemented various
versions of this technology from scratch a number of times ... and it
is what i use to maintain and generate the html files for the ietf rfc
index:
https://www.garlic.com/~lynn/rfcietff.htm
and the various merged taxonomies and glossaries that i maintain
https://www.garlic.com/~lynn/index.html#glosnote
a little overview/introduction
https://www.garlic.com/~lynn/index.html
it is implemented in C ... and i've done very extensive optimizing of the core functions. in this particular case, i was dealing with a hundred or so mbytes of information.
a few ancient refs
https://www.garlic.com/~lynn/94.html#26 Misc. more on bidirectional links
https://www.garlic.com/~lynn/2004f.html#7 The Network Data Model, foundation for Relational Model
https://www.garlic.com/~lynn/2004q.html#31 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2006v.html#47 Why so little parallelism?
https://www.garlic.com/~lynn/2006v.html#48 Why so little parallelism?
https://www.garlic.com/~lynn/2006w.html#11 long ago and far away, vm370 from early/mid 70s
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: SVCs Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sat, 10 Feb 2007 22:49:02 -0700Shmuel Metz , Seymour J. wrote:
CP67 on program interrupt ... had to determine if the program old psw was in supervisor state or problem state ... if supervisor state ... it was a CP67 kernel problem. If the program old psw was problem state then the virtual machine was running. If it was program interrupt for privilege instruction and the virtual machine was in virtual supervisor state ... then the kernel had to emulate the privilege instruction ... otherwise it emulated a program interrupt to the virtual machine. For emulation of a privilege instruction, the kernel had to determine the opcode of the interrupting instruction ... and effectively use decode table for which instruction decode routing to go off to.
Three people from the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
had come out and installed cp67 the last week in jan68 at the univ. where i was undergraduate.
That spring and summer I had done a lot of rewrite of the cp67 kernel.
The CP67 kernel used svc 8/12 interrupts for all calls between
internal routines. I rewrote it to cut the processing from about
300mics (per call/return) down to about 80mics. I also implemented a
virtual machine SVC "fastpath" reflect (to the virtual machine)
completely within the kernel SVC FLIH which substantially reduced that
pathlength. As previously mentioned I gave a talk at the fall68 share
meeting in Boston on some of the results ... recent posts:
https://www.garlic.com/~lynn/2007b.html#45 Is anyone still running
https://www.garlic.com/~lynn/2007c.html#45 SVCs
as mentioned in above ... i then changed the internal linkage for various high-use kernel routines from SVC (interrupt) to straight BALR.
Somewhere along the way ... I started looking at overhead in CMS virtual machine ... and noticed that all the disk i/o operations were effectively done synchronously ... i.e. CMS would do SIO for the disk I/O and then LPSW into wait state waiting for the disk I/O to complete. CMS never attempted to any overlapped processing while waiting for disk i/o. Also, one of cp67 big overhead, long path items was channel program (CCW) i/o decode and emulation.
So I added some code to CMS that would double check if it was running in a virtual machine (the CP67 CMS could also run on bare real hardware), and if so ... instead of doing a regular disk I/O CCW sequence ... it would do a special disk CCW with x'FF' opcode ... which had parameter list for seek, search, and read/write ... and if chained for multiple record transfer. The x'FF' CCW opcode was special case to quickly decode and emulate and was also defined to be "immediate" ... i.e. the virtual SIO wouldn't complete until the disk I/O had finished ... and then it would complete with condition code one on the SIO (i.e. immediate, csw stored). That also eliminated the additional internal CMS processing, the virtual LPSW instruction emulation as well as the virtual I/O interrupt emulation. This cut typical cp67 supervisor emulation overhead for CMS virtual machine by well over half (in addition to the other stuff that I had already done ... and also showed up in the FS/360 mft14 benchmarks).
The people at the science center (primarily Bob Adair) explained to me in gory detail that I wasn't allowed to do that ... since it violated the purity of the virtual machine architecture (i.e. the channel program architecture was not defined to do what I had defined for the x'FF' opcode). However, everybody liked the resulting performance improvement benefit. So it was explained that there was this "diagnose" instruction which was described in the 360 principle of operations to be "model" dependent ... and so it would be possible to define the abstraction of a virtual machine model ... and when running a 360 virtual machine MODEL ... cp67 could define how the diagnose instruction worked (anyway it wanted to). So the code I had done for (CMS) SIO disk x'FF' CCW got remapped into the diagnose instruction (with the implementation for the diagnose instruction to sort of be like SVC kernel call with function codes selecting which operation was to be performed).
misc. past posts mentioning diagnose instruction
https://www.garlic.com/~lynn/99.html#95 Early interupts on mainframes
https://www.garlic.com/~lynn/2002d.html#31 2 questions: diag 68 and calling convention
https://www.garlic.com/~lynn/2002h.html#62 history of CMS
https://www.garlic.com/~lynn/2003.html#60 MIDAS
https://www.garlic.com/~lynn/2003m.html#36 S/360 undocumented instructions?
https://www.garlic.com/~lynn/2003p.html#9 virtual-machine theory
https://www.garlic.com/~lynn/2003p.html#40 virtual-machine theory
https://www.garlic.com/~lynn/2004.html#8 virtual-machine theory
https://www.garlic.com/~lynn/2004d.html#66 System/360 40 years old today
https://www.garlic.com/~lynn/2004f.html#23 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
https://www.garlic.com/~lynn/2005b.html#23 360 DIAGNOSE
https://www.garlic.com/~lynn/2005b.html#38 Relocating application architecture and compiler support
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005o.html#35 Implementing schedulers in processor????
https://www.garlic.com/~lynn/2005t.html#8 2nd level install - duplicate volsers
https://www.garlic.com/~lynn/2006w.html#29 Descriptive term for reentrant program that nonetheless is
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: old tapes Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 11 Feb 2007 06:56:02 -0700Shmuel Metz , Seymour J. wrote:
in '69, "G", "M", and "L" invented GML at the science center ... and
markup tag processing was added to script. later a ISO international
standard was produced as "SGML"; misc. posts mentioning GML, sgml, etc
https://www.garlic.com/~lynn/submain.html#sgml
CERN did a cms/tso "bakeoff" comparison and presented a report to SHARE circa '74. Internally, the report was labeled "confidential, restricted" (available on need to know basis only) ... attempting to limit the number of employees who would be exposed to how badly tso compared to cms.
waterloo did their own version of the cms script command.
in this URL, it describes the morphing of waterloo script SGML to HTML
at CERN
http://infomesh.net/html/history/early/
and this URL, describes the first WEB server in the US on the vm/cms
system at SLAC ("first server outside of Europe")
https://ahro.slac.stanford.edu/wwwslac-exhibit
past posts mentioning morph from SGML to HTML and/or the first web
server in the US
https://www.garlic.com/~lynn/2004d.html#53 COMPUTER RELATED WORLD'S RECORDS?
https://www.garlic.com/~lynn/2004l.html#0 Xah Lee's Unixism
https://www.garlic.com/~lynn/2004l.html#72 Specifying all biz rules in relational data
https://www.garlic.com/~lynn/2005.html#27 Network databases
https://www.garlic.com/~lynn/2005e.html#34 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2006d.html#35 Fw: Tax chooses dead language - Austalia
https://www.garlic.com/~lynn/2006m.html#55 The System/360 Model 20 Wasn't As Bad As All That
past posts mentioning the CERN cms/tso "bakeoff"
https://www.garlic.com/~lynn/2001i.html#30 IBM OS Timeline?
https://www.garlic.com/~lynn/2001m.html#19 3270 protocol
https://www.garlic.com/~lynn/2002h.html#14 Why did OSI fail compared with TCP-IP?
https://www.garlic.com/~lynn/2002j.html#64 vm marketing (cross post)
https://www.garlic.com/~lynn/2002n.html#54 SHARE MVT Project anniversary
https://www.garlic.com/~lynn/2002o.html#54 XML, AI, Cyc, psych, and literature
https://www.garlic.com/~lynn/2003c.html#53 HASP assembly: What the heck is an MVT ABEND 422?
https://www.garlic.com/~lynn/2003c.html#69 OT: One for the historians - 360/91
https://www.garlic.com/~lynn/2003h.html#19 Why did TCP become popular ?
https://www.garlic.com/~lynn/2003k.html#13 What is timesharing, anyway?
https://www.garlic.com/~lynn/2003o.html#16 When nerds were nerds
https://www.garlic.com/~lynn/2004c.html#10 XDS Sigma vs IBM 370 was Re: I/O Selectric on eBay: How to use?
https://www.garlic.com/~lynn/2004c.html#26 Moribund TSO/E
https://www.garlic.com/~lynn/2005s.html#26 IEH/IEB/... names?
https://www.garlic.com/~lynn/2006d.html#35 Fw: Tax chooses dead language - Austalia
https://www.garlic.com/~lynn/2006k.html#34 PDP-1
https://www.garlic.com/~lynn/2006n.html#3 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006v.html#23 Ranking of non-IBM mainframe builders?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: distribution methods. Newsgroups: alt.folklore.computers Date: Sun, 11 Feb 2007 07:27:35 -0700jmfbahciv writes:
a past thread mentioning corporate naming convention
https://www.garlic.com/~lynn/2005r.html#38 IEH/IEB/... names?
https://www.garlic.com/~lynn/2005r.html#40 IEH/IEB/... names?
https://www.garlic.com/~lynn/2005s.html#26 IEH/IEB/... names?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: old tapes Newsgroups: bit.listserv.ibm-main,alt.folklore.computers CC: IBM Mainframe Discussion List <IBM-MAIN@bama.ua.edu> Date: Sun, 11 Feb 2007 08:03:04 -0700re:
and for total (internet) topic drift .... collection of old email
mentioning nsfnet related activity from the 80s
https://www.garlic.com/~lynn/lhwemail.html#nsfnet
1jan83 was the technology/protocol conversion from the old arpanet
host-to-host (and IMP-based) protocol to internetworking
protocol. however, nsfnet could be considered the operational
precursor to the modern internet ... with high-speed backbone for
interconnecting different networks (and relying on the underlying
internetworking protocol). misc. collected posts mentioning internet,
nsfnet, csnet, etc
https://www.garlic.com/~lynn/subnetwork.html#internet
misc. collected posts somewhat discussing the trials and tribulations
with transition from networking to internetworking. part of this is
related to the ISO networking standardization around the OSI model
... much more of a traditional "networking" model ... w/o any support
for "internetworking". This was compounded by ISO requiring that all
networking standardization work had to conform to the OSI model (and
anything that included a internetworking support would be in violation
of the OSI model). In the late 80s and early 90s ... this was further
compounded with various institutions and govs. mandating the
elimination of the internet and switch-over to ISO/OSI (like in the
federal gov. mandates with respect to "GOSIP")
https://www.garlic.com/~lynn/subnetwork.html#xtphsp
and misc NSFNET related posts:
https://www.garlic.com/~lynn/2000e.html#10 Is Al Gore The Father of the Internet?^
https://www.garlic.com/~lynn/2004h.html#7 CCD technology
https://www.garlic.com/~lynn/2004h.html#8 CCD technology
https://www.garlic.com/~lynn/2005d.html#13 Cerf and Kahn receive Turing award
https://www.garlic.com/~lynn/2006s.html#50 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006t.html#6 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006t.html#12 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006u.html#56 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006w.html#21 SNA/VTAM for NSFNET
https://www.garlic.com/~lynn/2006w.html#43 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2006x.html#7 vmshare
https://www.garlic.com/~lynn/2006y.html#34 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007.html#19 NSFNET (long post warning)
https://www.garlic.com/~lynn/2007c.html#19 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007c.html#20 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Running OS/390 on z9 BC Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 11 Feb 2007 12:36:04 -0700Jim Mulder wrote:
As a result, all of that got dropped from the original release of virtual memory hardware for 370 ... and the 370 models that had already implemented the full 370 architecture had to be retrofitted to only have the 370/165 subset implementation.
In the morph of cp67 cms to vm370 cms (besides the name change from cambridge monitor system to conversational monitor system) ... there was big change to use 370 r/o segment protection. when the r/o segment protect feature got dropped from the architecture (as part of helping the 370/165 engineers make up six month schedule) ... it had significant long term effects on the whole way that vm370 had to go about supporting shared segment protection.
In those days ... the architecture group had converted the
architecture "red book" to cms script .... and were using conditional
script controls when printing either the full architecture book or the
subset that appeared as the principles of operation. slight overlap
with this thread:
https://www.garlic.com/~lynn/2007d.html#29 old tapes
https://www.garlic.com/~lynn/2007d.html#31 old tapes
Very early on, there was joint project between Endicott and the
science center to modify cp67 to support 370 "virtual memory" virtual
machines ... including all the features in the full, original 370
virtual memory architecture. This was in regular production use a year
before the first 370 engineering machine with virtual memory support
appeared (370/145) ... and long before any 370/165 machine with
virtual memory support was available. misc. past posts mentioning the
subject:
https://www.garlic.com/~lynn/2001.html#63 Are the L1 and L2 caches flushed on a page fault ?
https://www.garlic.com/~lynn/2001c.html#7 LINUS for S/390
https://www.garlic.com/~lynn/2001k.html#8 Minimalist design (was Re: Parity - why even or odd)
https://www.garlic.com/~lynn/2002m.html#2 Handling variable page sizes?
https://www.garlic.com/~lynn/2002n.html#10 Coherent TLBs
https://www.garlic.com/~lynn/2002n.html#23 Tweaking old computers?
https://www.garlic.com/~lynn/2003g.html#19 Multiple layers of virtual address translation
https://www.garlic.com/~lynn/2004c.html#6 If the x86 ISA could be redone
https://www.garlic.com/~lynn/2004p.html#8 vm/370 smp support and shared segment protection hack
https://www.garlic.com/~lynn/2005e.html#53 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005f.html#45 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005h.html#10 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005j.html#39 A second look at memory access alignment
https://www.garlic.com/~lynn/2005p.html#45 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2006.html#13 VM maclib reference
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006i.html#9 Hadware Support for Protection Bits: what does it really mean?
https://www.garlic.com/~lynn/2006i.html#23 Virtual memory implementation in S/370
https://www.garlic.com/~lynn/2006j.html#5 virtual memory
https://www.garlic.com/~lynn/2006j.html#41 virtual memory
https://www.garlic.com/~lynn/2006l.html#22 Virtual Virtualizers
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006s.html#61 Is the teaching of non-reentrant HLASM coding practices ever defensible?
https://www.garlic.com/~lynn/2006t.html#1 Is the teaching of non-reentrant HLASM coding practices ever
https://www.garlic.com/~lynn/2006u.html#60 Why these original FORTRAN quirks?
https://www.garlic.com/~lynn/2006y.html#26 moving on
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Jim Gray Is Missing Newsgroups: alt.folklore.computers Date: Sun, 11 Feb 2007 13:57:48 -0700besides recent pointer by Jim Mehl
Tenacious Search
http://www.openphi.net/tenacious/
and recent articles
Technologists Apply Tools Of The Trade In Search For Jim Gray
http://www.informationweek.com/management/showArticle.jhtml?articleID=205918003
No trace of missing yachtsman on vast sea; Even with army of
volunteers and high-tech gadgets, search for sailor proves difficult
http://sfgate.com/cgi-bin/article.cgi?f=/c/a/2007/02/10/BAGEVO2FS61.DTL
re:
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Mixed Case Password on z/OS 1.7 and ACF 2 Version 8 Newsgroups: bit.listserv.ibm-main Date: Wed, 14 Feb 2007 13:06:15 -0700Howard Brazee wrote:
recent thread in crypto list
https://www.garlic.com/~lynn/aadsm26.htm#32 Failure of PKI in messaging
https://www.garlic.com/~lynn/aadsm26.htm#33 Failure of PKI in messaging
https://www.garlic.com/~lynn/aadsm26.htm#34 Failure of PKI in messaging
and somewhat related thread that preceded it
https://www.garlic.com/~lynn/aadsm26.htm#26 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#27 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#28 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#30 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#31 man in the middle, SSL
as repeatedly mentioned in the above ... (SSL) encryption involved "hiding" the account number while it moved thru the internet ... for what came to be called electronic commerce.
in the mid-90s, the x9a10 financial standard working group had been
given the requirement to preserve the integrity of the financial
infrastructure for all retail payments. this resulted in the x9.59
financial standard
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
if you look at the security PAIN acronym:
P - privacy (or somethings CAIN for confidentiality, i.e. security by
hiding information)
A - authentication
I - integrity
N - non-repudiation
in effect, x9.59 financial standard substituted authentication and integrity for privacy. part of this was the diametrically opposing requirements placed on account numbers. at one end, the requirement to keep account numbers confidential and never allowed to be divulged. at the other end, dozens of business processes that require ready and general access to the account number. this led to my periodic comment that even if the planet was buried under miles of (information hiding) encryption, it still wouldn't be able to prevent account number leakage.
now, part of the password paradigm analysis is from the standpoint of 3-factor authentication:
https://www.garlic.com/~lynn/subintegrity.html#3factor
40-50 years ago, when a person was possibly involved in only a single
security domain ... and only had a single password to remember ... the
password (shared-secret something you know) paradigm was somewhat
tolerable. However, as typical number of unique security domain
participation by individuals has grown to scores ... the scores of
related passwords have become unmanageable.
https://www.garlic.com/~lynn/subintegrity.html#secrets
now, one of the assumptions in the domain of multi-factor authentication ... is the security is better based on (frequently implicit) assumption that the different factors are subject to independent vulnerabilities. however, there are a number of technology attacks that can invalidate such a assumption ... being able to compromise multi-factor authentication in a single exploit.
For instance, in the previously mentioned yes card exploits, there is
an assumption about multi-factor authentication ... with a chip-token
as a something you have authentication in conjunction with a PIN as
something you know. However, part of the yes card exploit is being
able to counterfeit the YES in response to query whether the correct
PIN was entered (i.e. YES is the response regardless of what PIN is
entered, negating any requirement for actually needing to know the
correct PIN).
https://www.garlic.com/~lynn/subintegrity.html#yescard
and a recent somewhat long running general thread
https://www.garlic.com/~lynn/2007.html#0 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007.html#5 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007.html#6 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007.html#27 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007.html#28 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007b.html#60 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007b.html#61 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007b.html#62 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007b.html#64 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#6 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#8 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#10 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#15 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#17 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#18 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#22 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#26 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#27 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#28 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#30 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#31 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#32 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#33 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#35 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#36 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#37 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#38 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#39 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#40 Point-of-Sale security
https://www.garlic.com/~lynn/2007c.html#43 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#44 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#46 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#51 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#52 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#53 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#0 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#5 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#11 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#26 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MAC and SSL Newsgroups: sci.crypt Date: Wed, 14 Feb 2007 14:49:05 -0700"Ron Ayoub" <ronaldayoub@yahoo.com> writes:
much of the drivers for SSL domain name certificates business has been selling SSL domain name certificates to webservers for the purpose of electronic commerce (i.e. a major use of SSL in the world today is hiding account numbers and much of the motivation behind its initial uptake).
an issue arose early on with how SSL was actually deployed. As countermeasure for man-in-the-middle attack ... the browser was support to verify the domain name in the typed-in URL (the webserver you think you are talking to) matched the domain name in a validated SSL domain name certificate supplied by the webserver (the webserver you are talking to).
however, many web merchants quickly found that using SSL cut their thruput by 80-90 percent ... as a result, SSL deployment was changed to be purely used for the checkout/payment process ... and wasn't being used for the general shopping experience. the change was to have a checkout/payment button that was clicked ... which supplied the SSL URL. The effect was that the paradigm changed from
• "is the webserver that you think you are talking to, the webserver you are talking to" (i.e. the domain name in the URL that you supplied matches the domain name in the digital certificate supplied by the webserver
to
• "the webserver you are talking to is the webserver that it claims to be" (i.e. the domain name in the URL supplied by the webserver ... via its checkout/payment button, matches the domain name in the digital certificate supplied by the webserver)
...
basically, a disconnect in the SSL implicit assumptions occurred when public is getting their URLs supplied by various "click" operations ... and public no longer has a direct connection between URLs and the webservers they are contacting. this also is somewhat the basis for wide variety of phishing attacks.
recent posts in a similar thread
https://www.garlic.com/~lynn/aadsm26.htm#26 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#27 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#28 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#30 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#31 man in the middle, SSL
and also this thread:
https://www.garlic.com/~lynn/aadsm26.htm#32 Failure of PKI in messaging
https://www.garlic.com/~lynn/aadsm26.htm#33 Failure of PKI in messaging
https://www.garlic.com/~lynn/aadsm26.htm#34 Failure of PKI in messaging
for archeology reference ... we did some consulting with a small
client/server startup that was looking to use some technology they had
(something they called SSL) for doing payment transactions on their
servers ... something that is currently frequently referred to as
electronic commerce
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
in any case, it is possible that the referenced slide/statement refers to a) for large number of deployments, the man-in-the-middle countermeasure has effectively been negated leaving only encryption/hiding information and b) large number of the SSL PKI business involves selling digital certificates for use in electronic commerce applications (i.e. credit card transactions).
numerous past posts mentioning SSL domain name certificates
https://www.garlic.com/~lynn/subpubkey.html#sslcert
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MAC and SSL Newsgroups: sci.crypt Date: Wed, 14 Feb 2007 15:21:56 -0700William Ahern <william@25thandClement.com> writes:
and as referred to in various archaeological references ... previous post
https://www.garlic.com/~lynn/2007d.html#35 MAC and SSL
we had sign-off authority on how SSL was deployed for the backend interface between the webserver and the payment processing gateway ... but we didn't quite have the same level of authority regarding the webserver/browser SSL operation. For instance, we could mandate that the webserver TCP/SSL setup (to the payment interface) include multiple A-record support ... but it took something like another year of lobbying to get multiple A-record support into the browser. We could also mandate the webserver to payment SSL interface use mutual authentication (this was before SSL had definition for mutual authentication).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MAC and SSL Newsgroups: sci.crypt Date: Thu, 15 Feb 2007 09:45:28 -0700William Ahern <william@25thandClement.com> writes:
part of the issue in the netscape/ssl ... was that there was a lot of work on "commerce server" webserver offering that utilized the protocol ... as well as the backend implementation that actually interfaced to the payment infrastructure (somewhat focusing on emerging electronic commerce as a silver bullet ... rather than simply secure communication).
note that the SET reference is slightly off ... it was a specification
not a standard (i.e. specification is done by an non-standards
organization). In the mid-90s, the X9A10 financial standard working
group had been given the requirement to preserve the integrity of the
financial infrastructure for all retail payments. the result was the
x9.59 standard
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
recent posting with some comment
https://www.garlic.com/~lynn/2007d.html#34
when the SET specification was first published, i did a crypto-opt profile of the end-to-end operation and got some detailed timings for BSAFE library ... resulting in estimate of actual thruput. When these numbers were presented to various people involved in the SET effort, I was told that they were too large by a factor of 100 times. However, six months later when they had some initial prototypes running, my projected numbers were within a couple percent of measured. This didn't take into account that the benchmarked BSAFE numbers were four times faster than the standard BSAFE library (changes which were subsequently made available). Instead of claiming that the numbers were 100 times too slow, anybody dealing with an actual implementation should have realized that the numbers were four times too fast (based on standard BSAFE library). Not only was the claim that the projected numbers 100 times too slow ... the projected numbers were also on the order of 100 times larger than the existing (total) processing for doing payment transactions.
lots of past posts related to enormous crypto and PKI "bloat" in doing
payment transactions
https://www.garlic.com/~lynn/subpubkey.html#bloat
the other enormous bloating factor (besides processor operation) was payload size ... the typical PKI digital certificate payload overhead was also on the order of one hundreds times larger than base, existing payment transaction payload.
For other electronic commerce archaeological drift:
Scientist is missing after day trip on his yacht, S.F. MAN'S WORK
PAVED WAY FOR E-COMMERCE
http://www.mercurynews.com/mld/mercurynews/business/technology/16607490.htm
this has to do with database transactions ... as opposed to crypto
operations for electronic commerce. for complete subject drift
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#33 Jim Gray Is Missing
original relational/sql implementation
https://www.garlic.com/~lynn/submain.html#systemr
as well as general area of transactions and things like ACID properties.
for even older public key archaeological drift ... old email from 1981
https://www.garlic.com/~lynn/2006w.html#email810515
in this post
https://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
my view of the mid-90s with respect to mentioned IPsec ... was that the IPsec effort was defining end-to-end security in the lower-level protocol stack ... which then required new protocol stack implementation ... which was typically in the kernel ... which implied new kernel distribution (to an extremely large number of existing deployed machines) ... which represented a significant market inhibitor.
Two things that happened in the mid-90s that had much more rapid uptake vis-a-vis ipsec ... were VPN and SSL. There has been lots of stuff about SSL uptake in this period. My claim is that it happened because it didn't require replacing/upgrading existing low-level infrastructure; just load the new (browser) application ... and the support was built in. I saw something similar happen with VPN updated. A friend had introduced it at the gateway working group in the '94 IETF meeting in san jose. My impression was that it caused quite a bit of stir with the ipsec contingent. It was somewhat resolved, when they could refer to VPN as "lightweight" ipsec (and of course, then lots of others could refer to regular ipsec as "heavyweight"). Original VPN went into boundary routers ... and provided for secure communication tunneled thru the internet ... w/o having to upgrade a large number of a institutions operations.
VPN introduction also caused quite a bit of stir among router vendors that didn't have existing processors that were powerful enuf to perform the VPN crypto operations (efforts that appeared to try and sidetrack VPN standardization effort until various vendors had routers that were capable of actually performing the crypto operations).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Question on Network Security Newsgroups: comp.os.linux.security Date: Thu, 15 Feb 2007 11:46:53 -0700axsmth writes:
and what was causing the four floor nets to repeatedly crash most of sunday and well into monday morning.
this also gave rise to one of the specifications in RFC1122
("Requirements for Internet Hosts -- Communication Layers", also STD3)
as part of default configuration ... from my ietf rfc index
https://www.garlic.com/~lynn/rfcietff.htm
and summary for RFC1122
https://www.garlic.com/~lynn/rfcidx3.htm#1122
clicking on the ".txt=nnn" field in the summary retrieves the actual RFC.
for other archaeological topic drift on network security (old email from '81)
https://www.garlic.com/~lynn/2006w.html#email810515 more secure communication over the network
in this post:
https://www.garlic.com/~lynn/2006w.html#12
somewhat related thread here:
https://www.garlic.com/~lynn/2007d.html#35 MAC and SSL
https://www.garlic.com/~lynn/2007d.html#36 MAC and SSL
https://www.garlic.com/~lynn/2007d.html#37 MAC and SSL
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: old tapes Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Thu, 15 Feb 2007 12:48:39 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
some other archaeological topic drift with respect to browsers and
electronic commerce
https://www.garlic.com/~lynn/2007d.html#35 MAC and SSL
https://www.garlic.com/~lynn/2007d.html#36 MAC and SSL
https://www.garlic.com/~lynn/2007d.html#37 MAC and SSL
but some of this then traces back to NCSA ... for other archaeological
topic drift ... that includes NCSA/UIUC reference
https://www.garlic.com/~lynn/2005d.html#13 Cerf and Kahn receive Turing award
https://www.garlic.com/~lynn/2006u.html#56 Ranking of non-IBM mainframe builders?
and old email, NCSA/UIUC was one of the institutions we were dealing with as part of the NSFNET/HSDT activity ... and were to be included in the meeting mentioned previously (before it was canceled by some set of executives)
old email from Champaign ...
Date: 07/14/82 10:09:33
To: wheeler
Greetings from Champaign, Illinois
XXXXXX tells me that you are the person responsible for making the
VMSHARE data available to us on HONE. This has been of considerable
value to me (I'm a field SE and a VM Specialist). So valuable, indeed
that when it goes two months without being updated I miss it greatly.
Hope you can get a later version. I've been following some of the
items as one would a serial in the comics. I've also let one of my
customers, the University of Illinois, come out and access the VMSHARE
data at 9600 bps. That way he can just dial into TYMSHARE and update
those he's interested in.
Thanks again.
... snip ... top of post, old email index, HONE email
various collected old NSFNET related email
https://www.garlic.com/~lynn/lhwemail.html#nsfnet
and numerous posts mentioning hsdt
https://www.garlic.com/~lynn/subnetwork.html#hsdt
as well as old email mentioning hsdt
https://www.garlic.com/~lynn/lhwemail.html#hsdt
and with respect to VMSHARE mentioned in above
https://www.garlic.com/~lynn/lhwemail.html#vmshare
and lots of posts mentioning HONE
https://www.garlic.com/~lynn/subtopic.html#hone
as well as old HONE related email
https://www.garlic.com/~lynn/lhwemail.html#hone
and more recent(?) email with some reference to NCSA
Date: Thu, 04 Jun 87 07:27:00 CDT To: supercomputer@nyu.arpa Subject: ARGONNE SUMMER INSTITUTE IN PARALLEL COMPUTING SUMMER INSTITUTE IN PARALLEL COMPUTING A Two-Week Institute at the Advanced Computing Research Facility Mathematics and Computer Science Division Argonne National Laboratory September 8-18, 1987 Summer Institute Faculty Computer Facilities C. Gordon Bell, NSF ALLIANT FX/8 (8 processors) Bill Buzbee, NCAR ENCORE MULTIMAX (20 processors) Josh Fisher, Multiflow Computer INTEL iPSC HYPERCUBE (32 processors) Dave Kuck, CSRD, UIUC INTEL iPSC HYPERCUBE (16 processors, Neil Lincoln, ETA Systems with vector capability) Chuck Seitz, Cal Tech SEQUENT BALANCE (24 processors) Larry Smarr, NCSA, UIUC Burton Smith, Inst. for Defense Analyses Guy Steele, Thinking Machines Eligibility and Selection Criteria Institute limited to 25 graduate students and postdoctoral researchers. Participants expected to carry out a computing project. Preference given to those likely to advance parallel computing research. Only one person from the same institution and department accepted. Applications due July 15, 1987, supported by a letter of recommendation. Note: Participants will receive free lodging during the period September 7-17 and a stipend for meals and incidental expenses. Travel costs will be reimbursed up to $750. For further information, write or call Teri Huml Mathematics and Computer Science Division Building 221 Argonne National Laboratory Argonne, Illinois 60439-4844 312-972-7163 The Institute is supported by the National Science Foundation and the U.S. Department of Energy.... snip ... top of post, old email index
there was some involvement among various people in the above when
we were doing ha/medusa ...
https://www.garlic.com/~lynn/lhwemail.html#medusa
as part of ha/cmp scale-up
https://www.garlic.com/~lynn/subtopic.html#hacmp
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: old tapes Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Thu, 15 Feb 2007 16:18:10 -0700"Gerard Schildberger" <Gerard46@rrt.net> writes:
possibly somewhere in share archives ... at some point in the recent past there was effort to try and find old flavors of the (waterloo) share "tape" ... which contained all sorts of stuff (although mostly source changes to cp and cms).
for some digression here is "VMSEAS" (European share) discussion
thread started in '79; from VMSHARE archive
http://vm.marist.edu/~vmshare/browse.cgi?fn=VMSEAS&ft=MEMO
with this append giving some of the installation codes of VMSEAS members
Appended on 02/22/79 23:30:47 by _CU seas project representative installation code code ---- ------- -------------- ------------ S125 _BU H.Seidlitz Berlin University S139 _CU J.Gribbin Commercial Union S23 _EF M.Lefebure Euorcontrol France S100 _EG A.Snow Eurocontrol Germany S132 _HB J.Lynge Copenhagen Handlesbank S28 _IC I.Stinson Imperial College S54 _ID H.Hanssen I/S Datacentrallen S52 _MP R.Pocock Max Planck, Munchen S60 _MU H.Stenzel Munster University S78 _NU J.Dobson Newcastle University S74 _PH A.Dorreman Phillips, Eindhoven S121 _PO B.Chombart Poclain S42 _RL G.Adamson Rutherford Laboratories S44 _RR S.Webb Rolls-Royce (Aero Engines) S93 _SR M.Benichou Sofresid S116 _SK H.Deckers SCK/CEN, Belgium S171 _UD K.Appel Uppsala Data Centre... snip ...
but no direct reference to the CERN tso/cms comparison report.
I do have a hardcopy of a May 13, 1975 VM370 presentation SHARE made to IBM. It included somewhat case studies involving Bell Northern Research, AMOCO Production Company (two sites), Perkin-Elmer, Pratt Whitney, State of Nebraska, Kodak, and Kansas Hospital Association.
this post mentions a hardcopy of the 1979 "LSRAD" report SHARE
presented to IBM ...
https://www.garlic.com/~lynn/2001b.html#50 IBM 705 computer manual
also in this response to an earlier similar request of yours, I was
hoping that i might have a copy stored with the LSRAD report
... however no luck
https://www.garlic.com/~lynn/2006d.html#38 Tax chooses dead language - Australia
for the fun of it, one other post mentioning LSRAD report
https://www.garlic.com/~lynn/2005e.html#1 [Lit.] Buffer overruns
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Thu, 15 Feb 2007 19:55:07 -0700"dk" <sales@kanecki.com> writes:
Kildall using cp67/cms at navy post-graduate in 72
https://web.archive.org/web/20071011100440/http://www.khet.net/gmc/docs/museum/en_cpmName.html
cms personal computing ran in (the really old, new thing) virtual machine ... originally cp67/cms and later vm370/cms (in the morph from cp67 to vm370, cms was renamed from the cambridge monitor system to the conversational monitor system).
internal cms implementation had/has "handles" like CON1, RDR1, PUN1, PTR1, TAP1, TAP2, DSK1, DSK2, DSK3, ....
table from gh20-0859, pg. 5, cp-67/cms user's guide
https://www.garlic.com/~lynn/2004.html#45 40th anniversary of IBM System/360 on 7 Apr 2004
other references:
https://www.garlic.com/~lynn/2002m.html#11 DOS history question
https://www.garlic.com/~lynn/2004b.html#0 Is DOS unix?
https://www.garlic.com/~lynn/2004b.html#56 Oldest running code
https://www.garlic.com/~lynn/2004c.html#3 Oldest running code
also
https://web.archive.org/web/20071011100440/http://www.khet.net/gmc/docs/museum/en_cpmName.html
from above:
And CP/CMS stands for Control Program/Cambridge Monitor System, the
first virtual machine OS to go "prime time", and was written not by
the product OS people, but by the research laboratory!
... snip ...
there's actually some amount of sensitivity regarding the above statement.
There was an article that appeared in a corporate monthly publication
that made some assertions that virtual machines were first done by
corporate Researchers. There was a number of protests written by
internal employees from the cambridge science center
https://www.garlic.com/~lynn/subtopic.html#545tech
demanding a retraction (which never happened).
Later a similar article appeared that claimed that virtual machines were first done by corporate researchers. The letters of protest were again repeated, this time the publication editor responded that "researcher" (with little case r) could be construed as including people at the corporate science centers (as opposed to the previous scenario where upper case R could only be construed to mean people from the corporate Research division).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Mixed Case Password on z/OS 1.7 and ACF 2 Version 8 Newsgroups: bit.listserv.ibm-main Date: Fri, 16 Feb 2007 14:13:01 -0700Steve_Thompson@STERCOMM.COM (Thompson, Steve) writes:
so the issue discussed in these recent posts
https://www.garlic.com/~lynn/aadsm26.htm#35 Failure of PKI in messaging
https://www.garlic.com/~lynn/aadsm26.htm#36 New Credit Cards May Leak Personal Information
is to transition away from shared-secret authentication paradigm
https://www.garlic.com/~lynn/subintegrity.html#secrets
an issue with (static data) shared-secret paradigm is that the same value is used to both originate/authenticate as well as to verify. this also leads to requirement that each unique security domain requires unique shared-secret as countermeasure to cross-domain attacks.
in public key paradigm, the value to originate an authentication is different than the value to verify an authentication. also the value being verified can be made unique for every use ... as countermeasure to evesdropping and replay attacks.
the private key can be made sufficiently complex that it effectively negates brute-force guessing attacks.
so threat/attack vector then starts focusing on (unauthorized) accessing (possibly single) private key.
for some drift, old email archaeological ('81) reference to public key proposal
https://www.garlic.com/~lynn/2006w.html#email810515 more secure communication over the network
in this post
https://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
and old ('84) April 1st "corporate directive" password guideline
https://www.garlic.com/~lynn/2001d.html#52 OT Re: A beautiful morning in AFM.
https://www.garlic.com/~lynn/2001d.html#53 April Fools Day
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Sat, 17 Feb 2007 13:28:27 -0700Walter Bushell <proto@panix.com> writes:
ppc was another 801 follow-on to romp (pc/rt) and rios (rs/6000). lots of people thot ppc would be a natural way of RISC competing with '86 processors. however there were large segments that effectively viewed it as competition.
various posts with old email mentioning 801, iliad, romp, rios, etc
https://www.garlic.com/~lynn/lhwemail.html#801
and general posts mentioning 801, iliad, fort knox, romp, rios,
somerset, etc
https://www.garlic.com/~lynn/subtopic.html#801
the other issue in that time-frame ... as i've mentioned before, the
SAA effort was effectively attempting to maintain the terminal emulation
paradigm for PCs
https://www.garlic.com/~lynn/subnetwork.html#emulation
limiting the per adapter thruput (like with the discussion of LAN
adapter cards) for desktop machines ... to what was needed for
terminal emulation ... helped box-in emerging client/server and 3-tier
architecture
https://www.garlic.com/~lynn/subnetwork.html#3tier
part of the issue limiting rs/6000 to PC adapter cards ... was that it not only limited the desktop thruput ... but also thruput of server & 3-tier configurations (again restricting the transition away from terminal emulation).
various specific posts mentioning rs/6000 being pressured into using
various PC adapter cards (LAN, disk, display, etc) ... joke was that
you too could have rs/6000 with thruput of a PC
https://www.garlic.com/~lynn/2001j.html#20 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2002g.html#9 IBM MIcrochannel??
https://www.garlic.com/~lynn/2004p.html#59 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2005h.html#12 practical applications for synchronous and asynchronous communication
https://www.garlic.com/~lynn/2005q.html#20 Ethernet, Aloha and CSMA/CD -
https://www.garlic.com/~lynn/2005q.html#21 Ethernet, Aloha and CSMA/CD -
https://www.garlic.com/~lynn/2005q.html#38 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2005u.html#50 Channel Distances
https://www.garlic.com/~lynn/2006k.html#42 Arpa address
https://www.garlic.com/~lynn/2006l.html#35 Token-ring vs Ethernet - 10 years later
https://www.garlic.com/~lynn/2006l.html#36 Token-ring vs Ethernet - 10 years later
https://www.garlic.com/~lynn/2007b.html#46 'Innovation' and other crimes
that strategy somewhat restricted rs/6000 to numerical intensive applications ... which wasn't a particularly large market ... and didn't already have a large corporate install base.
there was some conjecture that similar objectives were in-part behind taking ha/medusa scale-up away from us and moving it to another organization.
referenced here
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/96.html#15
https://www.garlic.com/~lynn/2001n.html#83
we were looking at doing as much scale-up in the commercial market
segment as in the numerical intensive market segment. the resulting
transfer eventually announced a product addressed only at the
numerical intensive market segment. misc. past posts with old email
discussing ha/medusa scale-up
https://www.garlic.com/~lynn/lhwemail.html#medusa
similar observations could also be made about canceling our
activities for high-speed NSFNET backbone ... even tho there were
extensive lobbying efforts by NSF ... including all the way up to the
director of NSF communicating with corporate CEO/chairman ... including
letter mentioned in this old email
https://www.garlic.com/~lynn/2006s.html#email860417
... that what we already had running was at least five years ahead of
all bid submissions to build something new (i've made various comments
in the past that while tcp/ip was the technology basis for
internetworking ... the NSFNET backbone was the operational basis for
internetworking and eventually the modern internet). misc. past posts
with old email mentioning various high-speed networking related
activity
https://www.garlic.com/~lynn/lhwemail.html#nsfnet
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Sat, 17 Feb 2007 16:30:31 -0700Peter Flass <Peter_Flass@Yahoo.com> writes:
pressuring RS/6000 to use PS/2 adapter cards ... was "helping your brethren" ... frequently the issue was who was to help who. one might claim that too much helping ... could result in having hodge-podge of pieces that weren't designed for the targeted market (stuff that had been designed for a totally different market).
Another possible way of viewing the situation is that lots of times efforts were being pressured into supporting major installed legacy operations ... at the expense of being able to agilely move into new markets.
There has been quite a bit written about original acorn effort
starting out as independent business operation ... not having to worry
about compromising as part of supporting existing legacy
operations. However, once a major market segment had been established
... especially in the scenario of terminal emulation
https://www.garlic.com/~lynn/subnetwork.html#emulation
... lots of pressure mounted for other products to not be inconsistent and/or impact that installed product base.
another possible scenario that i've mentioned before was the original
acorn effort was not looking at doing its own software ... somewhat as
a result a west coast group formed to provide software for the
product. at some point, the acorn effort changed their mind and
decided that they also wanted to "own" their own software (even if
that met going with outside companies under contractual relationships
... eliminating possibility that they cede control to other internal
organizations). misc. past posts mentioning ...
https://www.garlic.com/~lynn/2002g.html#79 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2005q.html#24 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005r.html#8 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006p.html#41 Device Authentication - The answer to attacks launched using stolen passwords?
https://www.garlic.com/~lynn/2006y.html#29 "The Elements of Programming Style"
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Sat, 17 Feb 2007 22:27:38 -0700re:
somewhat related topic drift in this old email (talking about MIP Envy
and possible ways that "small" processor evolution would follow)
https://www.garlic.com/~lynn/2007.html#email801006
in this post from several weeks ago
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
along with this related old email (in the same post)
https://www.garlic.com/~lynn/2007.html#email801016
this might be considered evolution of large clusters of mid-range
4341s ... mentioned in these collected old emails
https://www.garlic.com/~lynn/lhwemail.html#4341
with workstations and larger PCs later taking over that market segment.
and the MIP Envy topic wouldn't be complete w/o these more
recent postings mentioning Jim
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#33 Jim Gray Is Missing
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful? Newsgroups: alt.folklore.computers Date: Sun, 18 Feb 2007 08:19:03 -0700krw <krw@att.bizzzz> writes:
and for store-into d-caches (as opposed to store-thru) ... you need explicit operations to flush any data modifications from d-cache back to main memory, then explicitly invalidate any corresponding locations in the i-cache (or maybe just global cache operations, flush all of d-cache to memory and then invalidate all of the i-cache) ... so that i-fetch will result in pulling the modified locations from memory
there was a similar but different problem with the introduction of 168-3 for some installations. the 168-3 doubled the size of system cache (vis-a-vis) 168-1 ... and used the "2k" address bit for indexing the additional cache lines.
however, this met that when running in 370 2k virtual page mode (as opposed to 4k virtual page mode) ... the machine only ran with half the cache (i.e. like a 168-1).
there were some number of installations that were running dos/vs and/or vs1 (under vm370) on 370/168 ... and not only didn't see any performance improvement with upgrade to 168-3 ... but actually saw a performance decrease. the issue was that normally vm370 ran with configuration set to 4k virtual page mode ... except when dispatching a virtual machine with 2k "shadow tables". This could result in constantly switching hardware configuration bit back and forth between 2k page mode and 4k page mode. Because the cache indexing used different mapping in the two modes ... the hardware had to also completely flush the cache every time the 2k/4k page mode configuration bit was changed (resulting in customer upgrade to 168-3 with double the cache size, seeing worse thruput).
past posts mentioning the problem
https://www.garlic.com/~lynn/99.html#7 IBM S/360
https://www.garlic.com/~lynn/2001.html#63 Are the L1 and L2 caches flushed on a page fault ?
https://www.garlic.com/~lynn/2001e.html#9 MIP rating on old S/370s
https://www.garlic.com/~lynn/2002c.html#37 VAX, M68K complex instructions (was Re: Did Intel Bite Off More Than It Can Chew?)
https://www.garlic.com/~lynn/2002l.html#51 Handling variable page sizes?
https://www.garlic.com/~lynn/2003d.html#69 unix
https://www.garlic.com/~lynn/2003m.html#41 Issues in Using Virtual Address for addressing the Cache
https://www.garlic.com/~lynn/2004f.html#38 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2005e.html#59 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005h.html#11 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005o.html#8 Non Power of 2 Cache Sizes
https://www.garlic.com/~lynn/2006l.html#15 virtual memory
https://www.garlic.com/~lynn/2006r.html#34 REAL memory column in SDSF
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Sun, 18 Feb 2007 09:07:45 -0700ref:
for a little additional (old email) drift:
Date: 03/15/85 09:22:19
From: wheeler
looks like XXXXXX will have to handle presentation to Bloch/NSF on
Tuesday. YYYYYY wants to hold a meeting all next week on vlsi
processor clusters in ykt. Packaging, systems, architecture, straight
370, 370/801 mixed, and dedicated 801 systems, etc.
... snip ... top of post, old email index, NSFNET email
as mentioned before Erich Bloch was director of NSF for much of the 80s.
somewhat related to this old email
https://www.garlic.com/~lynn/2007c.html#email841016
in this post
https://www.garlic.com/~lynn/2007c.html#50 How many 36-bit Unix ports in the old days?
part of this was I had written a series of papers starting nearly a
year earlier on the concept ... previously referenced here
https://www.garlic.com/~lynn/2004m.html#17 mainframe and microprocessor
and referenced in this recent post
https://www.garlic.com/~lynn/2007c.html#7 Miniature clusters
similar, but different to ha/medusa
https://www.garlic.com/~lynn/lhwemail.html#medusa
and of course, various old emails mentioning director of NSF,
NSFNET, etc.
https://www.garlic.com/~lynn/lhwemail.html#nsfnet
other old email mentioning 801
https://www.garlic.com/~lynn/lhwemail.html#801
and other posts about 801
https://www.garlic.com/~lynn/subtopic.html#801
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 18 Feb 2007 13:51:18 -0700Patrick Mulvany wrote:
old email that has been posted/archived ... some of which relates to vm
https://www.garlic.com/~lynn/lhwemail.html
for instance Melinda's paper talks about TSM (renamed ADSM)
originating as CMSBACK starting in 1983. However, by 1983,
CMSBACK was already into its 3rd or 4th version ... old email
about CMSBACK ... predating 1983
https://www.garlic.com/~lynn/lhwemail.html#cmsback
In fact, the two people mentioned for CMSBACK in Melissa's paper weren't even hired at the time CMSBACK was originally done.
another source of VM historical information is the VMSHARE archive
http://vm.marist.edu/~vmshare/
on online VM related online computer conferencing originated in the mid-70s
http://vm.marist.edu/~vmshare/
offered as a SHARE service by Tymshare corporation. Tymshare was a
commercial vm370-based online timesharing service bureau
... misc. past posts mentioning online vm370-based commercial
timesharing service operations
https://www.garlic.com/~lynn/submain.html#timeshare
also some old email specifically mentioning vmshare
https://www.garlic.com/~lynn/lhwemail.html#vmshare
if you want a little topic drift ... lots of past posts mentioning science center
https://www.garlic.com/~lynn/subtopic.html#545tech
which is where the original virtual machine operating system
originated (cp67, precursor to vm370). it is also where GML was
invented ... precursor to SGML and antecedent to HTML, XML, etc
https://www.garlic.com/~lynn/submain.html#sgml
and also where the internal network originated ... lots of past posts
observing that the internal network was larger than the
arpanet/internet from just about the beginning until sometime mid-85
https://www.garlic.com/~lynn/subnetwork.html#internalnet
and a derivative of the internal networking software was also used for BITNET/EARN
https://www.garlic.com/~lynn/subnetwork.html#bitnet
misc. old email with some mention of VNET
https://www.garlic.com/~lynn/lhwemail.html#vnet
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: certificate distribution Newsgroups: comp.security.misc Date: Sun, 18 Feb 2007 19:28:51 -0700Ertugrul Soeylemez <usenet@streitmacht.eu> writes:
Date: 05/06/81 13:45:20 To: wheeler .... 5. Security - VNET does not change this. ie Security can be breached with or without VNET. The favorate IBM watering hole is far less secure than VM/370 or VNET. eg There are NO read, write, or multi-write passwords on any mini-disk that I might have confidential info on. Yes, I know about global passwords, but I also know who has them and why. ( total of 4 individuals here including myself ). 6. Definite need for Crypt using public and private keys. Sender uses public key of individual which requires private key of individual to unlock. This solves the problem of unauthorized persons gaining access to unread mail files.... snip ... top of post, old email index
little drift, internal network (VNET) was larger than arpanet/internet
until sometime mid-85
https://www.garlic.com/~lynn/subnetwork.html#internalnet
misc. other old email mentioning public key
https://www.garlic.com/~lynn/lhwemail.html#publickey
including using CJNTEL on the internal network for public
key server ... recent post
https://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
other old email mentioning CJNTEL
https://www.garlic.com/~lynn/lhwemail.html#cjntel
past collected posts mentioning certificate-less public key
distribution
https://www.garlic.com/~lynn/subpubkey.html#certless
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Mon, 19 Feb 2007 13:48:19 -0700Andrew Swallow <am.swallow@btopenworld.com> writes:
past posts in this thread:
https://www.garlic.com/~lynn/2007d.html#41 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#43 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#44 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#45 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#47 Is computer history taugh now?
this particular aspect was also somewhat touched on in the posts
in this thread:
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007.html#13 "The Elements of Programming Style"
including comment in this old email about collections of "small"
processors eventually starting to impact glasshouse operation:
https://www.garlic.com/~lynn/2007.html#email801006
i've frequently claimed that where the major pc market segment developed was in huge commercial orders for dumb terminal 3270 replacement i.e. for about the same price as a 3270 terminal could get a machine with a single desktop footprint that did both mainframe terminal emulations and some amount of local computing. with that enormously growing install base ... it became much more attractive to write software applications for that install base ... as well significant incentive for competitive clone builders. the price competition from clone builders also helped accelerate its attractiveness for the home market. at some point it became positive feedback (snowball) effect, with the size of the install base fueling both application development and price competition ... and the growth in application development and price competition helping fuel the increase in the install base
one of the other initial market uptake silver bullets, besides terminal emulation, was spreadsheet application. an issue was reaching enuf market mass to creating effectively nearly self-sustaining market. at some point the market was large enuf that instead of having to borrow from other activities ... things were developed wholly based on that specific market.
the analogous scenario was the ignition of the consumer electronic market ... cdroms for PCs became highly attractive because of their enormous market position. i've commented before about in mid-80s, finding $300 consumer cdrom having better technology than a $20k device developed specifically for the computer market.
this was also somewhat the basis for the HDTV standards wars ... circa 1990 involving dept. of commerce and others ... there was fear that who ever won the HDTV market segment would have such an electronics development base ... that they would also be able to take over the whole computer market.
misc. past posts mentioning consumer electronic $300 cdrom from mid-80s:
https://www.garlic.com/~lynn/2001f.html#35 Security Concerns in the Financial Services Industry
https://www.garlic.com/~lynn/2001j.html#23 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2001n.html#77 a.f.c history checkup... (was What specifications will the standard year 2001 PC have?)
https://www.garlic.com/~lynn/2003o.html#54 An entirely new proprietary hardware strategy
https://www.garlic.com/~lynn/2004o.html#43 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2004o.html#44 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2005n.html#27 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2006.html#45 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006q.html#62 Cray-1 Anniversary Event - September 21st
misc. past posts mentioning hdtv and various perceive market implications
(including some overlap with the cdrom posts)
https://www.garlic.com/~lynn/2000e.html#11 Is Al Gore The Father of the Internet?^
https://www.garlic.com/~lynn/2001.html#73 how old are you guys
https://www.garlic.com/~lynn/2001b.html#2 FCC rulemakings on HDTV
https://www.garlic.com/~lynn/2001j.html#23 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2006.html#45 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006q.html#62 Cray-1 Anniversary Event - September 21st
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Mon, 19 Feb 2007 14:06:14 -0700Charles Mills wrote:
The stand-alone flavor two about 25 minutes to assemble and generate text deck. The option to run under os/360 took an additional 25 minutes to assemble because it had five DCB macros that needed to be expanded ... and it took approx. five minutes elapsed time for the assembler to expand each DCB macro (you could watch the 30's front panel lights and tell when the assembler was expanding DCB macro because the front panel light pattern was distinct).
Before i learned about "REP" cards, i got quite proficient at reading punch holes for the hex in "TXT" (binary) decks ... and being able to do code patches by doing card duplication on 026 keypunch ... and multi-punch the hole patterns for the hex patch (significantly faster than updating the assembler card source and getting a new clean assembly).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: CMS (PC Operating Systems) Newsgroups: alt.folklore.computers Date: Mon, 19 Feb 2007 14:26:25 -0700Peter Flass <Peter_Flass@Yahoo.com> writes:
when 360/67 machine became available, cp40 was ported and morphed into cp/67.
cms started out as "personal computing", single user operating system that ran in virtual machine (originally also could run stand alone on real machine). one might claim that cms could continue to evolve since the transition of cp40 to cp67 didn't (at least initially) significantly impact the cms operating environment/characteristics. In effect, there was a fairly clean separation between cp and cms ... with CP focused providing virtual machine support and management of resources in timesharing environment ... and cms focused on being a interactive (single) user computing environment (which originally could run on dedicated real hardware or in a virtual machine).
cp40, cp67, cms, etc have roots traced back to CTSS ... also discussed
in Melinda's paper. Some number of people from CTSS went to the
science center on 4th flr of 545 tech sq
https://www.garlic.com/~lynn/subtopic.html#545tech
while others from CTSS went to Multics on 5th flr of 545 tech sq.
Melinda's paper also discusses some amount of the other influences that were happening in the early and mid-60s timeframe leading up to cp40 and cp67.
misc. past posts making reference to Melinda's history paper
https://www.garlic.com/~lynn/98.html#10 OS with no distinction between RAM a
https://www.garlic.com/~lynn/98.html#13 S/360 operating systems geneaology
https://www.garlic.com/~lynn/99.html#126 Dispute about Internet's origins
https://www.garlic.com/~lynn/99.html#142 OS/360 (and descendants) VM system?
https://www.garlic.com/~lynn/99.html#177 S/360 history
https://www.garlic.com/~lynn/99.html#237 I can't believe this newsgroup still exists
https://www.garlic.com/~lynn/2000.html#1 Computer of the century
https://www.garlic.com/~lynn/2000.html#43 Historically important UNIX or computer things.....
https://www.garlic.com/~lynn/2000.html#52 Correct usage of "Image" ???
https://www.garlic.com/~lynn/2000.html#81 Ux's good points.
https://www.garlic.com/~lynn/2000.html#82 Ux's good points.
https://www.garlic.com/~lynn/2000.html#89 Ux's good points.
https://www.garlic.com/~lynn/2000b.html#61 VM (not VMS or Virtual Machine, the IBM sort)
https://www.garlic.com/~lynn/2000d.html#47 Charging for time-share CPU time
https://www.garlic.com/~lynn/2000f.html#30 OT?
https://www.garlic.com/~lynn/2000f.html#53 360 Architecture, Multics, ... was (Re: X86 ultimate CISC? No.)
https://www.garlic.com/~lynn/2000f.html#59 360 Architecture, Multics, ... was (Re: X86 ultimate CISC? No.)
https://www.garlic.com/~lynn/2000f.html#78 TSS ancient history, was X86 ultimate CISC? designs)
https://www.garlic.com/~lynn/2000g.html#2 TSS ancient history, was X86 ultimate CISC? designs)
https://www.garlic.com/~lynn/2001b.html#21 First OS?
https://www.garlic.com/~lynn/2001e.html#69 line length (was Re: Babble from "JD" <dyson@jdyson.com>)
https://www.garlic.com/~lynn/2001h.html#9 VM: checking some myths.
https://www.garlic.com/~lynn/2001h.html#10 VM: checking some myths.
https://www.garlic.com/~lynn/2001h.html#46 Whom Do Programmers Admire Now???
https://www.garlic.com/~lynn/2001h.html#57 Whom Do Programmers Admire Now???
https://www.garlic.com/~lynn/2001i.html#32 IBM OS Timeline?
https://www.garlic.com/~lynn/2001i.html#34 IBM OS Timeline?
https://www.garlic.com/~lynn/2001i.html#39 IBM OS Timeline?
https://www.garlic.com/~lynn/2001l.html#24 mainframe question
https://www.garlic.com/~lynn/2001m.html#44 Call for folklore - was Re: So it's cyclical.
https://www.garlic.com/~lynn/2001m.html#47 TSS/360
https://www.garlic.com/~lynn/2001n.html#67 Hercules etc. IBM not just missing a great opportunity...
https://www.garlic.com/~lynn/2002b.html#6 Microcode?
https://www.garlic.com/~lynn/2002b.html#45 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2002b.html#46 ... the need for a Museum of Computer Software
https://www.garlic.com/~lynn/2002c.html#39 VAX, M68K complex instructions (was Re: Did Intel Bite Off More Than It Can Chew?)
https://www.garlic.com/~lynn/2002c.html#44 cp/67 (coss-post warning)
https://www.garlic.com/~lynn/2002d.html#4 IBM Mainframe at home
https://www.garlic.com/~lynn/2002e.html#43 Hardest Mistake in Comp Arch to Fix
https://www.garlic.com/~lynn/2002e.html#48 flags, procedure calls, opinions
https://www.garlic.com/~lynn/2002f.html#36 Blade architectures
https://www.garlic.com/~lynn/2002g.html#73 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2002h.html#29 Computers in Science Fiction
https://www.garlic.com/~lynn/2002k.html#20 Vnet : Unbelievable
https://www.garlic.com/~lynn/2002n.html#0 additional pictures of the 6180
https://www.garlic.com/~lynn/2002n.html#27 why does wait state exist?
https://www.garlic.com/~lynn/2002o.html#31 Over-the-shoulder effect
https://www.garlic.com/~lynn/2002o.html#78 Newsgroup cliques?
https://www.garlic.com/~lynn/2002q.html#47 myths about Multics
https://www.garlic.com/~lynn/2003b.html#0 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003b.html#2 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003e.html#66 History of project maintenance tools -- what and when?
https://www.garlic.com/~lynn/2003g.html#31 Lisp Machines
https://www.garlic.com/~lynn/2003g.html#58 40th Anniversary of IBM System/360
https://www.garlic.com/~lynn/2003j.html#14 A Dark Day
https://www.garlic.com/~lynn/2003j.html#45 Hand cranking telephones
https://www.garlic.com/~lynn/2003k.html#48 Who said DAT?
https://www.garlic.com/~lynn/2003l.html#30 Secure OS Thoughts
https://www.garlic.com/~lynn/2003l.html#41 Secure OS Thoughts
https://www.garlic.com/~lynn/2003m.html#4 IBM Manuals from the 1940's and 1950's
https://www.garlic.com/~lynn/2003m.html#31 SR 15,15 was: IEFBR14 Problems
https://www.garlic.com/~lynn/2003m.html#34 SR 15,15 was: IEFBR14 Problems
https://www.garlic.com/~lynn/2004c.html#9 TSS/370 binary distribution now available
https://www.garlic.com/~lynn/2004c.html#11 40yrs, science center, feb. 1964
https://www.garlic.com/~lynn/2004c.html#61 IBM 360 memory
https://www.garlic.com/~lynn/2004d.html#9 IBM 360 memory
https://www.garlic.com/~lynn/2004d.html#33 someone looking to donate IBM magazines and stuff
https://www.garlic.com/~lynn/2004k.html#49 Xah Lee's Unixism
https://www.garlic.com/~lynn/2004k.html#51 Xah Lee's Unixism
https://www.garlic.com/~lynn/2004l.html#26 CTSS source online
https://www.garlic.com/~lynn/2004m.html#30 Shipwrecks
https://www.garlic.com/~lynn/2004n.html#4 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004o.html#45 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2004q.html#58 CAS and LL/SC (was Re: High Level Assembler for MVS & VM & VSE)
https://www.garlic.com/~lynn/2005.html#5 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005e.html#57 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005i.html#30 Status of Software Reuse?
https://www.garlic.com/~lynn/2005j.html#25 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005j.html#39 A second look at memory access alignment
https://www.garlic.com/~lynn/2005j.html#41 TSO replacement?
https://www.garlic.com/~lynn/2005k.html#5 IBM/Watson autobiography--thoughts on?
https://www.garlic.com/~lynn/2005k.html#8 virtual 360/67 support in cp67
https://www.garlic.com/~lynn/2005k.html#18 Question about Dungeon game on the PDP
https://www.garlic.com/~lynn/2005k.html#44 Book on computer architecture for beginners
https://www.garlic.com/~lynn/2005k.html#49 Determining processor status without IPIs
https://www.garlic.com/~lynn/2005m.html#9 IBM's mini computers--lack thereof
https://www.garlic.com/~lynn/2005n.html#45 Anyone know whether VM/370 EDGAR is still available anywhere?
https://www.garlic.com/~lynn/2005n.html#47 Anyone know whether VM/370 EDGAR is still available anywhere?
https://www.garlic.com/~lynn/2005o.html#4 Robert Creasy, RIP
https://www.garlic.com/~lynn/2005s.html#21 MVCIN instruction
https://www.garlic.com/~lynn/2005u.html#47 The rise of the virtual machines
https://www.garlic.com/~lynn/2006c.html#18 Change in computers as a hobbiest
https://www.garlic.com/~lynn/2006e.html#6 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#7 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#12 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#25 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#31 MCTS
https://www.garlic.com/~lynn/2006h.html#55 History of first use of all-computerized typesetting?
https://www.garlic.com/~lynn/2006i.html#22 virtual memory
https://www.garlic.com/~lynn/2006i.html#30 virtual memory
https://www.garlic.com/~lynn/2006k.html#9 Arpa address
https://www.garlic.com/~lynn/2006k.html#27 PDP-1
https://www.garlic.com/~lynn/2006k.html#29 PDP-1
https://www.garlic.com/~lynn/2006k.html#30 PDP-1
https://www.garlic.com/~lynn/2006k.html#32 PDP-1
https://www.garlic.com/~lynn/2006k.html#41 PDP-1
https://www.garlic.com/~lynn/2006m.html#21 The very first text editor
https://www.garlic.com/~lynn/2006m.html#25 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#42 Why Didn't The Cent Sign or the Exclamation Mark Print?
https://www.garlic.com/~lynn/2006m.html#54 DCSS
https://www.garlic.com/~lynn/2006q.html#45 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006s.html#18 IDC: Virtual machines taking over the world
https://www.garlic.com/~lynn/2006t.html#20 Why these original FORTRAN quirks?; Now : Programming practices
https://www.garlic.com/~lynn/2006t.html#23 threads versus task
https://www.garlic.com/~lynn/2006t.html#24 CMSBACK
https://www.garlic.com/~lynn/2006t.html#44 1960s railroad data processing on L&N
https://www.garlic.com/~lynn/2006t.html#49 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2006w.html#16 intersection between autolog command and cmsback (more history)
https://www.garlic.com/~lynn/2006w.html#22 Are hypervisors the new foundation for system software?
https://www.garlic.com/~lynn/2006w.html#42 vmshare
https://www.garlic.com/~lynn/2007d.html#48 IBM S/360 series operating systems history
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Tue, 20 Feb 2007 06:59:00 -0700Andrew Swallow <am.swallow@btopenworld.com> writes:
IBM 5100 Portable Computer
http://www.brouhaha.com/~eric/retrocomputing/ibm/5100/
from above:
Introduced in 1975, the 5100 was IBM's first production personal
computer (six years before the PC!). The 5100 has an integral CRT
display, keyboard, and tape drive. It was available with APL, BASIC,
or both, and with 16, 32, 48, or 64 Kbytes of RAM.
... snip ...
http://www.svec.org/hof/1994.html#friedl
from above:
Paul J. Friedl is known by many people as the 'Father of the Personal
Computer' He was the chief architect and inventor of the world's first
personal computer and also developed the predecessor of the modern
spreadsheet program in 1973, long before personal computers, as we
know them today, were introduced. He christened his computer
'BSCAMP'(Special Computer APL Machine Portable), and it became the
father of the IBM 5100 and the grandfather of the ubiquitous IBM PC,
which was introduced in August 1981, nearly eight years later The
original SCAMP is now in the Smithsonian Institute.
... snip ...
http://computermuseum.informatik.uni-stuttgart.de/dev/ibm_5110/technik/en/
from above:
The IBM 5100 series computers were aimed for small to medium business
and for those without or only small knowledge of computers but who
wanted to use their benefits. In 1975 the IBM 5100 was announced as
"Portable Personal Computer". Then follows the IBM 5110 in 1978 and
the IBM 5120 in 1980.
... snip ...
previous posts mentioning 5100 and/or scamp:
https://www.garlic.com/~lynn/2000.html#69 APL on PalmOS ???
https://www.garlic.com/~lynn/2000.html#70 APL on PalmOS ???
https://www.garlic.com/~lynn/2000d.html#15 APL version in IBM 5100 (Was: Resurrecting the IBM 1130)
https://www.garlic.com/~lynn/2000g.html#24 A question for you old guys -- IBM 1130 information
https://www.garlic.com/~lynn/2000g.html#46 A new "Remember when?" period happening right now
https://www.garlic.com/~lynn/2001b.html#45 First OS?
https://www.garlic.com/~lynn/2001b.html#56 Why SMP at all anymore?
https://www.garlic.com/~lynn/2001b.html#71 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2002b.html#39 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2002b.html#43 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2002b.html#45 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2002b.html#47 IBM 5100 [Was: First DESKTOP Unix Box?]
https://www.garlic.com/~lynn/2003b.html#42 VMFPLC2 tape format
https://www.garlic.com/~lynn/2003i.html#79 IBM 5100
https://www.garlic.com/~lynn/2003i.html#82 IBM 5100
https://www.garlic.com/~lynn/2003i.html#84 IBM 5100
https://www.garlic.com/~lynn/2003j.html#0 IBM 5100
https://www.garlic.com/~lynn/2003n.html#6 The IBM 5100 and John Titor
https://www.garlic.com/~lynn/2003n.html#8 The IBM 5100 and John Titor
https://www.garlic.com/~lynn/2004c.html#8 IBM operating systems and APL
https://www.garlic.com/~lynn/2004c.html#40 Microprocessor History Site
https://www.garlic.com/~lynn/2004l.html#32 Shipwrecks
https://www.garlic.com/~lynn/2005.html#44 John Titor was right? IBM 5100
https://www.garlic.com/~lynn/2005g.html#12 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005m.html#2 IBM 5100 luggable computer with APL
https://www.garlic.com/~lynn/2005m.html#3 IBM 5100 luggable computer with APL
https://www.garlic.com/~lynn/2005r.html#50 winscape?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Tue, 20 Feb 2007 08:02:45 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
early CATV broadband networking ...
Date: 02/01/82 16:22:20
From: xxxxxx
Subject: Datamation Article referred to by your netmail
What they're talking about is SBS's leasing of surplus frequency space
on many of the franchised cable TV systems around the country. This
is SBS's fond hope of reaching the end users in the large metro areas
over cable TV. There has been a field test going on for some time
using cables in San Francisco and Manhattan to distribute data coming
in over an SBS link between the two cities. Thus, there's no
connection with my world at this time.
... snip ... top of post, old email index
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Tue, 20 Feb 2007 08:39:45 -0700re:
and for even more network topic drift ...
Date: 02/02/82 16:16:55
To: wheeler
Per AT&T Long Lines... dedicated digital 56kbs link between SJ and
White Plains would be $11,764 per month.....
... snip ... top of post, old email index
and T1s were tariffed quite a bit higher than 56kbs ... trying to move
to T1 and higher rates infrastructures in this time-frame represented
something of a financial justification challenge.
Date: 02/08/82 07:28:42
To: wheeler
Hi from SRI in the Big Apple...
Lynn:
I forgot to ask for a seat at the ad tech meeting... are there any left?
Met with XXXXXX this morning re S/1-X.25 proposal. He estimates 25KLOC
of S/1 code (12 people, 1.5 years) to build an all-IBM X.25 network to
which SNA or non-SNA (like PVM and RSCS line drivers) users could
attach. He is talking to YKT about using NIL (Network Language,
similar in concept to FAPL) and dynamic routing work done in YKT and
blessed architecturally by Raleigh as an integral part of the new
network.
XXXXXX is already getting flack from Raleigh, and will probably get much
more if he pushes hard on this. Possible sources of manpower are
Research, SPP Tampa, and DP (via creating a demand from SEs on top 100
accounts). I agree with XXXXXX that if the work was done, VNET would
be an ideal place to demonstrate it.
I originally thought his proposal was to use existing X.25 networks
(like Telenet). This is much bigger than that... it's really an
attempt to do the SNA job, only better (and stay compatible with SNA).
... snip ... top of post, old email index
I had put together a corporate advanced technology conference ... first
in several years ... old post with reference here:
https://www.garlic.com/~lynn/96.html#4a
Some years earlier, earlier, my wife had coauthored AWP39, "peer-to-peer network architecture" with "XXXXXX".
random piece of information, "APPN" was originally AWP164.
misc. past posts mentioning AWP39:
https://www.garlic.com/~lynn/2004n.html#38 RS/6000 in Sysplex Environment
https://www.garlic.com/~lynn/2004p.html#31 IBM 3705 and UC.5
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
https://www.garlic.com/~lynn/2005p.html#15 DUMP Datasets and SMS
https://www.garlic.com/~lynn/2005p.html#17 DUMP Datasets and SMS
https://www.garlic.com/~lynn/2005q.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005u.html#23 Channel Distances
https://www.garlic.com/~lynn/2006h.html#52 Need Help defining an AS400 with an IP address to the mainframe
https://www.garlic.com/~lynn/2006j.html#31 virtual memory
https://www.garlic.com/~lynn/2006k.html#9 Arpa address
https://www.garlic.com/~lynn/2006k.html#21 Sending CONSOLE/SYSLOG To Off-Mainframe Server
https://www.garlic.com/~lynn/2006l.html#4 Google Architecture
https://www.garlic.com/~lynn/2006l.html#45 Mainframe Linux Mythbusting (Was: Using Java in batch on z/OS?)
https://www.garlic.com/~lynn/2006o.html#62 Greatest Software, System R
https://www.garlic.com/~lynn/2006r.html#4 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006r.html#9 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006t.html#36 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2006u.html#28 Assembler question
https://www.garlic.com/~lynn/2006u.html#55 What's a mainframe?
https://www.garlic.com/~lynn/2007b.html#9 Mainframe vs. "Server" (Was Just another example of mainframe
https://www.garlic.com/~lynn/2007b.html#48 6400 impact printer
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Tue, 20 Feb 2007 13:21:21 -0700Andrew Swallow <am.swallow@btopenworld.com> writes:
the big desktop market penetration silver bullet was terminal emulation ... mainframe terminals were already an understood and mature market. The local desktop computing was than almost a freebie side-effect .... and didn't really require independent financial justification (solely for local desktop computing function) i.e. several million could be bought within existing corporate budgets and financial operations.
later this large install base (related to terminal emulation)
represented an inhibitor to further advances with local desktop
computing ... i.e. client/server and 3-tier was starting to obsolete
the terminal emulation function ... and there appeared lots of
corporate resistance attempting to maintain the status quo.
https://www.garlic.com/~lynn/subnetwork.html#emulation
an example of the resulting turf warfare was my periodic reference to
the talk given by senior person from the disk division at the annual
(internal) world-wide communication group's conference ... where he
started the talk by claiming the communication group was going to be
responsible for the demise of the (mainframe) disk division. The
difficulty (that customers with evolving desktop applications) were
having attempting to deal with data in the glasshouse via the terminal
emulation paradigm was resulting in ongoing migration of corporate
data to platforms outside the glasshouse. Efforts by the disk division
to bring out new products that addressed the problems were constantly
being blocked by the communication group (as part of efforts
attempting to preserve their terminal emulation install base).
previous posts mentioning the talk:
https://www.garlic.com/~lynn/2001j.html#16 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2003p.html#39 Mainframe Emulation Solutions
https://www.garlic.com/~lynn/2004f.html#39 Who said "The Mainframe is dead"?
https://www.garlic.com/~lynn/2005j.html#59 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005r.html#8 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2005t.html#30 AMD to leave x86 behind?
https://www.garlic.com/~lynn/2006k.html#25 Can anythink kill x86-64?
https://www.garlic.com/~lynn/2006l.html#38 Token-ring vs Ethernet - 10 years later
https://www.garlic.com/~lynn/2006r.html#20 50th Anniversary of invention of disk drives
https://www.garlic.com/~lynn/2007b.html#9 Mainframe vs. "Server" (Was Just another example of mainframe
we also fell afoul of these protectionist efforts ("attempting to
stuff the client/server genie back into the bottle") when were out
pitching 3-tier architecture to customer executives
https://www.garlic.com/~lynn/subnetwork.html#3tier
it possibly could also be claimed that our efforts with NSFNET also
had run afoul of these forces ... and contributed to situation where
they started calling up and canceling our meetings with outside
organizations. misc. old email on NSFNET subject:
https://www.garlic.com/~lynn/lhwemail.html#nsfnet
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Which is the Fastest (Secure) Way to Exchange 256-bit Keys? Newsgroups: sci.crypt Date: Wed, 21 Feb 2007 08:06:15 -0700Andrew Swallow <am.swallow@btopenworld.com> writes:
and of course, old, frequently referenced security proportional to
risk posting
https://www.garlic.com/~lynn/2001h.html#61
this was one of the threat/attack models looked at in the mid-90s when
the x9a10 financial standards working group was given the requirement
to preserve the integrity of the financial infrastructure for all
retail payments
https://www.garlic.com/~lynn/x959.html#x959
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Wed, 21 Feb 2007 08:08:43 -0700Andrew Swallow <am.swallow@btopenworld.com> writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Wed, 21 Feb 2007 08:47:18 -0700Andrew Swallow <am.swallow@btopenworld.com> writes:
previous post:
https://www.garlic.com/~lynn/2007d.html#56 Is computer history taugh now?
one of the (PCs) sales dynamics was that the 3270 dumb terminals tended to be quite a bit more expensive than ascii glass teletypes.
however that characteristic made it a lot easier to justify a PC as a 3270 terminal replacement ... since the prices were in the same range.
by comparison, ascii glass teletypes were tending to the same price range as a PC monitor. "upgrading" a glass teletype to a PC could require actually coming up with a justification for the cost differential ... compared to the 3270->PC ... which could be nearly a no-brainer.
this might be classed as one of those cases where being more expensive aided transition to new technology.
there would have been some dynamics of the internal 3270 "real terminal" product group being in competition with the emerging PC product group. However, for corporate sales reps ... they were already under pressure loosing 3270 dumb terminal sales to cheaper clones. Early on, the PC could be positioned as 3270 dumb terminal with additional features.
Rather than viewing PC early-on attempting to reach large volume sales by expanding into a brand-new (retail) market ... it could be sold as a same-cost replacement into the (corporate) 3270 dumb terminal market that was already tens of millions.
It wasn't that it didn't sell into any of the retail markets ... but early critical mass was much easier in the corporate terminal replacement market. This would have also created some dynamics that employees might be influenced to buy something for the home that was the same as they were already using at work. One might even claim that was behind the infamous mac superbowl advertisement ... trying to counter any tendency for people to buy something (for personal use) that they were already familiar from work.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: SLL Certificate Newsgroups: microsoft.public.security Date: Wed, 21 Feb 2007 10:43:23 -0700Patrick D. <PatrickD@discussions.microsoft.com> writes:
reason for ssl cryptography is to hide information during transmission
reason for ssl certificates is to prove that you are really who you claim to be. "security" in terms of ssl certificates is primarily an "authentication" issue (in contrast to encryption being privacy/confidentiality issue).
for an ssl certificate to be "secure" ... means that it correctly authenticates you (or at least something) ... i.e. are you really who you claim to be. in order to establish authentication security, the certification authority issuing such a certificate has to do some amount of due diligence ... in order to establish that you are who you claim to be ... before they certify it as part of issuing a digital certificate asserting to that fact (aka a digital certificate is nominally a representation that the certifying authority has certified some piece of information).
there have been some suggested changes that would improve the integrity/security of the certification process ... which at the same time significantly reduces the certification complexity and costs ... potentially leading into reduced digital certificate prices.
the catch-22 for the industry is that the general public might start
using the same processes ... eliminating the need for 3rd party
certification authorities ... and their digital certificates. collected
past posts mentioning the catch-22 for the ssl certification industry
https://www.garlic.com/~lynn/subpubkey.html#catch22
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: ISA Support for Multithreading Newsgroups: comp.arch,comp.arch.embedded Date: Wed, 21 Feb 2007 14:16:52 -0700Bill Todd <billtodd@metrocast.net> writes:
it basically moved part of the virtual machine dispatcher and interrupt handler into the microcode. the status for the virtual machine was already being kept ... so it required two queues ... one of available stuff to execute ...and one of stuff that had finished execution (and needed something from the kernel for one reason or another). how many different real processors and therefor concurrently executing virtual machines was somewhat transparent to the kernel code. this is similar in concept to what was later done by 432i.
misc. past posts mentioning the project
https://www.garlic.com/~lynn/submain.html#bounce
later there was the "SIE" instruction ... which wasn't particularly queue or multiprocessor oriented ... just packaged all the stuff needed to start/stop process operation into a single instruction.
SIE was somewhat part of migration of more and more support for
virtual machine operation into hardware of the machine. Major part of
that was virtual machine subset that appeared as "LPARS" (logical
partitions) ... where a subset of virtual machine operation was
provided directly by the hardware ... w/o requiring virtual machine
operating system. for a little drift ... post with old email discussing
some philosophy differences between SIE implementation on the 3081
and 3090
https://www.garlic.com/~lynn/2006j.html#27 virtual memory
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cycles per ASM instruction Newsgroups: comp.lang.asm370 Date: Wed, 21 Feb 2007 19:47:44 -0700"Gerard Schildberger" <Gerard46@rrt.net> writes:
+---------------------------------------------+----------+ | CPU family | approx. | | vendor model model name | MIPS | +---------------------------------------------+----------+ | IBM 2065 360/65 | .70 | | IBMrpq 2067 360/67 | .98 | | IBMrpq 2067 mp 360/67 | 1.96 | | IBM 2075 360/75 | .89 | | IBM 2085-1 360/85 | 1.92 | | IBM 2085-2 360/85 | 2.40 | | IBM 2090 360/90 | 5.00 | | IBM 2091 360/91 | 5.00 | | IBM 2092 360/92 | 5.00 | | IBM 2095 360/95 | 5.00 | +---------------------------------------------+----------+weird?
360/67-1 was supposedly identical to 360/65 (when running in non-DAT mode) ... i.e. 750ns memory cycle, 8 byte i-fetch. part of instruction timing formulae ... includes amortized part of 8byte i-fetch ... i.e. 2byte instructions includes 1/4th of 750ns double-word instruction fetch, 4byte instructions includes 1/2 of 750ns double-word instruction fetch.
A four byte instruction with one storage operand access would effectively have 1.5*750ns related to storage access (prorated i-fetch plus one instruction operand) ... plus whatever the actual instruction timing is.
in fact, looking at the functional characteristics document for both machines (off bitsaver) appears to give identical timing values for every instruction.
turning on dynamic address translation in 360/67 ... added 150ns to ever memory access ... effectively making it a 900ns memory access machine instead of 750ns (and all the instruction timings change appropriately). that makes 67-1 identical to 65 in performance ... except when dynamic translation is turned on ... when 67-1 effectively is about 20percent slower.
360/67-2 is little more complicated ... as part of multiprocessor support ... they put in multi-ported memory ... which slows down every memory access ... by about 20percent ... approx. 900ns instead of 750ns (for base hardware, running with dynamic address translation on then slows it down another 150ns).
The functional characteristics gives instruction timings for 67-1 and 67-2 with DAT off. The actual times for 67-1 with DAT turned on ... would be approx the same as the timings for 67-2 (with DAT turned off).
However, 67-2 under heavy I/O load could have actual higher thruput than 67-1 ... the multi-porting memory cutting down on processor stalls contending for memory bus with i/o activity; i.e. heavy i/o load for 65/67-1 probably means more like effective .5mips (and 67-1 running in virtual memory mode, i.e. DAT turned on, would be slower still).
documents at:
http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/
65 and 67 functional characteristics
http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A22-6884-3_360-65_funcChar.pdf
http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/GA27-2719-2_360-67_funcChar.pdf
more weird:
| IBM 2091 360/91 | 5.00 | | IBM 3168-3 370/168 | 2.74 | | IBM 3158-3 370/158 | 1.00 | | IBM 4341-1 370/4341 | .88 |here is benchmarks that i did on 158, 3031, and an early engineering model 4341-1 (machine cycle time was running about 10-15percent slower than what shipped to customers):
158 3031 4341 Rain 45.64/47.42 | 37.03/37.77 | 36.21/37.57 Rain4 43.90/44.80 | 36.61/36.89 | 36.13/36.51 also times approx; 370/145 370/168 360/91 145 secs. 9.1 secs 6.77 secs... snip ...
4341 rather than about ten percent slower than 158-3 ... was closer to 25percent faster (and customer production machines would have been faster still)
misc. past posts with old email from days working with 4341
https://www.garlic.com/~lynn/lhwemail.html#4341
158 and 3031 had effectively the same microcode engine. the biggest change from 158 to 3031 was that the 158 had integrated channel microcode shared on same engine executing 370 microcode ... and for the 303x machines they took the 158 integrated channel microcode and packaged it as a separate box called a channel director (i.e. a single processor 3031 was actually two 158 microcode engines ... one dedicated to channel function and one dedicated to 370 instructions).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cycles per ASM instruction Newsgroups: comp.lang.asm370 Date: Wed, 21 Feb 2007 20:30:29 -0700Steve Myers <noone@nowhere.com> writes:
it wasn't that shared memory slowed the 67MP down ... it was that the 67-2 had multi-ported memory delay ... even when you are only talking about a single processor (half-duplex) 67-2. The delay of the multi-ported memory (compared to 65 or 67-1) mitigated memory contention ... both when there was heavy i/o and/or multiprocessor operation. two-processor 67-2 might actually have twice the aggregate effective MIP rate of single 67-1 in heavy i/o workloads.
multiprocessor 370 cache machines were slightly different. For two processor operations the cache machine cycle was slowed down by ten percent (to allow for cross-cache chatter) ... making each processor effectively .9 processing rate of a single processor machine (two processors were 1.8 of a single processor machine).
The processing of actual cross-cache chatter, for things like cache-line invalidates, would slow the running hardware down even further ... then there is the overhead of kernel multiprocessor software ... resulted in two-processor 370s thruput being rated at 1.4-1.5 times that of single processor 370.
However, I did some fiddling in some early vm370 multiprocessor support that effectively provided for some cache affinity. For some workloads on a two processor 158-3 ... the aggregate mip rate of the two processors were sometimes slightly better than same workload on a single processor operation; aka some games being able to take advantage of two caches and improvement cache hit ratio running the workload ... could more than make up for the degraded processor cycle (and other MP overhead).
for some real topic drift ... posting of the old MIP Envy article
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
in the early 80s (during the 3081 product cycle), both MVS and VM kernels had work to optimize kernel storage allocation to minimize cross-cache trashing ... kernel storage was reworked to be aligned on cache-line boundaries ... and be in units of cache-lines. The resulting reduction in cross-cache thrashing supposedly increased overall system thruput between 5-10 percent.
a couple recent posts mentioning cache hit ratios and/or cross-cache
chatter
https://www.garlic.com/~lynn/2007.html#44 vm/sp1
https://www.garlic.com/~lynn/2007c.html#47 SVCs
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Thu, 22 Feb 2007 09:07:34 -0700Joe Pfeiffer <pfeiffer@cs.nmsu.edu> writes:
Also a common application was like implementation of T-E-A (travel expense account) forms. I have some vague recollection that there was a subsequent implementation done in REXX.
re:
https://www.garlic.com/~lynn/2007d.html#54 Is computer history taugh now?
the IBM 5100 shipped as product in '75 went out with both APL and BASIC support
and IBM 5100 reference
http://www.brouhaha.com/~eric/retrocomputing/ibm/5100/
from above:
Predecessor: The 5100 was based on the design of an earlier
proof-of-concept system called SCAMP, for "Special Computer, APL
Machine Portable". SCAMP was also based on the PALM processor, but
used a Norelco (Philips) compact cassette drive instead of the 3M
cartridge. SCAMP emulated an IBM 1130 minicomputer in order to run
APL\1130. SCAMP is in the Smithsonian Institution.
... snip ...
and
http://www.svec.org/hof/1994.html#friedl
from above:
Paul J. Friedl is known by many people as the 'Father of the Personal
Computer' He was the chief architect and inventor of the world's first
personal computer and also developed the predecessor of the modern
spreadsheet program in 1973, long before personal computers, as we
know them today, were introduced. He christened his computer 'SCAMP'
(Special Computer APL Machine Portable), and it became the father of
the IBM 5100 and the grandfather of the ubiquitous IBM PC, which was
introduced in August 1981, nearly eight years later The original SCAMP
is now in the Smithsonian Institute.
Dr. Friedl's 32-year career with the IBM Palo Alto Scientific Center
as a senior engineer and manager included pioneering work in
industrial process control, laboratory automation, knowledge-based
expert systems, distributed computing, and computer conferencing
systems. He also authored many technical papers and patent
disclosures. He invented the IBM People Sharing Information Network
(PSInet) Computer Conferencing System, which is being used by
kindergarten through 12th-grade educators throughout the country.
... snip ...
I've made numerous posts before about cambridge science center initially doing a port of apl\360 to cms ... which was released as cms\apl. Later palo alto science center did a lot of work and it was released as apl\cms. palo alto science center also did the apl microcode assist for the 370/145 (apl\cms running on 370/145 with the assist got about the same performance as apl\cms running on 370/168 w/o the assist).
lots of past posts mentioning APL and/or HONE ... HONE was the
internal vm370-based timesharing service that provided online
applications to sales, marketing, and field people world-wide ... and
majority of the applications were implemented in APL (originally
cms\apl ... but migrated thru the evolution of apl\cms, apl\sv,
vs\apl, etc)
https://www.garlic.com/~lynn/subtopic.html#hone
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Thu, 22 Feb 2007 09:17:10 -0700Ken Brick wrote:
"E" ... i.e. "e" for vs1 and dos/vs
past posts in this thread:
https://www.garlic.com/~lynn/2007d.html#48 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007d.html#51 IBM S/360 series operating systems history
for other (SIE) topic drift ... recent cross-over post
https://www.garlic.com/~lynn/2007d.html#61 ISA Support for Multithreading
lots of other old email discussing 43xx boxes
https://www.garlic.com/~lynn/lhwemail.html#4341
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taugh now? Newsgroups: alt.folklore.computers Date: Thu, 22 Feb 2007 13:04:39 -0700Walter Bushell <proto@panix.com> writes:
this was also one of the themes of the mainframe disk division in the late 80s and early 90s ... the proliferation of sensitive corporate information on platforms that were inadequately secured and protected ... making them vulnerable to numerous kinds of exploits.
part of that theme was sensitive corporate information that was inadequately backed up. some study claimed that half of the companies that had failed disk (containing significant unbacked-up corporate data) declared bankruptcy within 30 days (aka loosing stuff like accounts billable file)
previous posts in this thread
https://www.garlic.com/~lynn/2007d.html#41 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#43 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#44 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#45 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#47 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#50 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#53 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#54 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#55 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#55 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#58 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#59 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#64 Is computer history taugh now?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: SLL Certificate Newsgroups: microsoft.public.security Date: Fri, 23 Feb 2007 08:03:37 -0700"S. Pidgorny <MVP>" <slavickp@yahoo.com> writes:
lots of past posts mentioning ssl certificates ... including referring
to them as "comfort" certificates ... i.e. with a lot of PR and hype
to convince people that they should feel good when they see a
ssl certificate
https://www.garlic.com/~lynn/subpubkey.html#sslcert
going back to when we were asked to consult with this small client/server
startup that wanted to do payment transactions on their server ... and
they had this technology they wanted to used called SSL
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
and had to figure out how to apply the SSL technology to specific business processes
various recent threads/posts about SSL, weaknesses, vulnerabilities,
etc
https://www.garlic.com/~lynn/2007c.html#51 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/aadsm26.htm#25 EV - what s the reason, again?
https://www.garlic.com/~lynn/aadsm26.htm#26 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#27 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#28 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#30 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#31 man in the middle, SSL
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Fri, 23 Feb 2007 08:35:55 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
latest update:
Chip and pin fails to halt card fraud rise
http://edinburghnews.scotsman.com/edinburgh.cfm?id=291732007
from above:
SHOPS have seen a massive rise in credit and debit card crime since
the introduction of chip and pin technology, according to a report
published today.
The new system was hailed as virtually fraud-proof but a survey by the
Scottish Grocers' Federation (SGF) suggests card crime has soared by
more than 50 per cent since 2005.
... snip ...
other recent posts in this thread:
https://www.garlic.com/~lynn/2007c.html#51 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#52 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#53 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#0 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#5 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#11 Securing financial transactions a high priority for 2007
collected posts on related subjects:
https://www.garlic.com/~lynn/subintegrity.html#yescard
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 23 Feb 2007 11:03:10 -0700kbrick@ibm-main.lst (Ken Brick) writes:
and 360/30 functional characteristics
http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/GA24-3231-7_360-30_funcChar.pdf
lists timing instructions for all the 360 instruction ... so I assume they were supported ... including ..
instruction FORMAT MNEMONIC TIME Edit SS ED 38+7N1+9N2 Edit and Mark SS EDMK 45+7N1+9N2 Translate SS TR 31+6N Translate and Test SS TRT 39+6N N: total number of bytes in field N1: total number of bytes in 1st operand N2: total number of bytes in 2nd operand... snip ..
other posts in this thread:
https://www.garlic.com/~lynn/2007d.html#48 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007d.html#51 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007d.html#65 IBM S/360 series operating systems history
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Fri, 23 Feb 2007 11:44:00 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
and then there is
Plans to cut card fraud 'too complex'
http://www.itnews.com.au/newsstory.aspx?CIaNID=46197&src=site-marq
Plans to cut card fraud 'too complex'
http://www.itweek.co.uk/vnunet/news/2183738/plans-cut-card-fraud-slammed
Plans to cut card fraud 'too complex'
http://www.whatpc.co.uk/vnunet/news/2183738/plans-cut-card-fraud-slammed
Warnings over 'complicated' anti-fraud card systems
http://www.tuvps.co.uk/news/articles/warnings-over-complicated-anti-fraud-card-systems-18065845.asp
in the mid-90s (in the same time-frame as numerous of these other efforts
were being initially worked on), the X9A10 financial standard working
group was given the requirement to preserve the integrity of the financial
infrastructure for ALL retail payments (internet, point-of-sale, credit,
debit, stored-value, check, face-to-face, non-face-to-care, i.e. ALL).
the result was the X9.59 financial standard
https://www.garlic.com/~lynn/x959.html#x959
it looked at being KISS and also addressing a wide range of threats and
vulnerabilities, including stuff like data breaches, security breaches,
skimming, and other forms of harvesting
https://www.garlic.com/~lynn/subintegrity.html#harvest
as well as various things turned up related to the yes card exploits,
https://www.garlic.com/~lynn/subintegrity.html#yescard
including replay attacks and man-in-the-middle attacks
https://www.garlic.com/~lynn/subintegrity.html#mitm
other recent posts in this thread:
https://www.garlic.com/~lynn/2007c.html#51 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#52 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#53 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#0 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#5 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#11 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#26 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cycles per ASM instruction Newsgroups: comp.lang.asm370 Date: Fri, 23 Feb 2007 09:21:44 -0700"John W. Kennedy" <jwkenne@attglobal.net> writes:
115 was rated at 80kips 370 ... that met that the microprocessor executing the 370 microcode load ... emulated 370 instructions at approx. 80,000 instructions per second. the 370 microcode load had an avg. of ten microcode instructions per 370 instructions (of course more complex 370 instructions would require significantly more microcode instructions to execute). all the other microprocessors in the machine were identical but got microcode loads to perform other types of functions, communication controller, disk controller, etc. the microcode engine ... to make 80kips 370 ... executing an avg. of ten microcode instructions per 370 ... had an engine that ran just under a mip "native".
the 125 was identical to 115 except the microprocessor engine that executed 370 microcode load was about 50percent faster than the other microprocessor engines (rather than about 800kips native ... it was more like 1.2mips native).
in many respects ... 115/125 were SMP multiprocessors ... with up to nine processors in a configuration ... executing different application (micro)code.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers,IBM-MAIN@BAMA.UA.EDU Date: Fri, 23 Feb 2007 14:32:32 -0700Patrick O'Keefe wrote:
modulo a m'code bug .... recent cross-over post discussing some 115 &
125 characteristics
https://www.garlic.com/~lynn/2007d.html#71 Cycles per ASM instruction
I had originally done "pageable kernel" support in cp67 ... to help cut down on fixed real-storage requirements ... this was never shipped in cp67 product ... but was picked up as part of vm370 kernel. however, over a period ... the standard fixed vm370 kernel storage requirements grew ... even having implemented pageable kernel support.
I was asked to look at vm370 on a customer's 256kbyte s370/125 (even tho vm370 hadn't been announced for 125). One of the things i did was do about 40kbyte trimming on the fixed vm370 kernel requirements ... getting it down into the 80kbyte range. I could do this (in virtual machine) before actually touching a real 125.
When I went to real 125 ... and had problem getting vm370 to actually boot. The problem was how the "long" instructions (clcl/mvcl) instructions were originally/implemented on 125. all the 360 instructions would check starting and ending address of operands before starting instruction execution (i.e. if both starting and ending didn't check out, it wouldn't even start the instruction execution). That was changed for "long" instructions ... where only the operand addresses were checked as they were processed .... ignoring the precheck on ending operand address.
The 125 mvcl implementation had a "bug" ... it would precheck ALL operand ending addresses before starting the instruction (even the long instructions) ... and if there was a problem not continue. vm370 boot had some code that would setup mvcl instruction with maximum length (16mbytes) for the "to" operand and zero length for "from" ... effectively clear all of storage and terminate with the address of end of real storage. The 125 mcode "bug" resulted in not even starting the instruction ... so vm370 boot thot there was effectively no real storage and aborted.
misc. past posts mentioning the 125 long instruction mcode problem
https://www.garlic.com/~lynn/2000g.html#8 360/370 instruction cycle time
https://www.garlic.com/~lynn/2001f.html#69 Test and Set (TS) vs Compare and Swap (CS)
https://www.garlic.com/~lynn/2002i.html#9 More about SUN and CICS
https://www.garlic.com/~lynn/2003j.html#27 A Dark Day
https://www.garlic.com/~lynn/2006.html#12 Zeroing core
https://www.garlic.com/~lynn/2006n.html#46 Why is z series so CPU poor?
https://www.garlic.com/~lynn/2006q.html#49 Was FORTRAN buggy?