Date: Sun, 14 May 2000 10:28:21 -0700 To: ietf@ietf.org From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: re: Financial Stnadards Work group?Musandu writes:
The electronic commerce payments working group (X9A10) has a draft standard for all electronic retail payments (debit, credit, pre-paid, electronic cash, etc) .. X9.59.
misc. ref
http://www.x9.org/
http://www.x9.org/main_organization.html
http://www.x9.org/subcomms/x9a/general/public/general.html
http://www.tc68.org/
http://www.x9.org/n20.html
https://www.garlic.com/~lynn/
https://www.garlic.com/~lynn/99.html#224
https://www.garlic.com/~lynn/8583flow.htm
https://www.garlic.com/~lynn/draft-wheeler-ipki-aads-01.txt
& of course my rfc index is also at:
https://www.garlic.com/~lynn/rfcietff.htm
as well as ietf, payments, security, X9F, and financial glossaries
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A note on the culture of database Newsgroups: alt.folklore.computers Date: Sun, 21 May 2000 04:53:53 GMTehrice@his.com (Edward Rice) writes
The indexing schema is large ... running to over hundred thousand terms with extremely complicated inter-term relationships. A valent effort got maybe half the terms into a partial relational schema ... but most of the data sat around in totally unnormalized tables ... and even at that the attempted "normalization" efforts were falling behind in real-time ... nine months of new articles and publications with new terms and categorization ... was impacting schedule by more than 29=18 months (delay).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Date: Sat, 20 May 2000 23:28:06 -0700 To: ietf@ietf.org Subject: re: Financial Stnadards Work group?X9.59 is a financial industry standard for all account-based electronic retail transactions.
In the AADS strawman chip scenerio for X9.59 ... whether debit, credit, prepaid, etc. , the chip would sign a X9.59 transaction and work identical whether it was at person's PC or at point-of-sale (it works the same whether any ietf internet infrastructure is involved or existing financial network infrastructure)
Such an AADS strawman chip scenerio for X9.59 would work the same regardless of internet, no-internet, point-of-sale, debit, credit, pre-paid, bank, subscriber, isp. (the AADS strawman chip scenerio also works the same for non-X9.59 AADS scenerios like AADS radius, ISP authenticated access, webserver authenticated access, VPN authentication operation, etc).
There are some issues for the AADS strawman chip scnerio for X9.59, like contact or contactless. Contact would be standard existing chipcard standard and would be usable in existing chipcard contact readers. The contactless standards are less well accepted ... but establishing a contactless accepted standard would free up the AADS strawman chip to become form-factor agnostic (i.e. an AADS strawman chip could imbedded into almost any shape and be able to operate).
The AADS chip strawman scenerio for X9.59 not only proposes that it is the same regardless of whether it is Internet or non-internet, but also whether it is credit, debit, pre-paid, authenticated access, existing financial infrastructure, point-of-sale, who the bank is, face-to-face physical, who the service provider is, as well as what country that it might operate in
At 08:06 AM 5/16/2000 +0300, Musandu wrote:
I do not quiet agree with the current standards, they are a pain in the
neck. E.g ( Just one example ) I want the internet debit card and the
devices for charging them to be standard hardware available in any computer
store. This will allow one to chose any bank or service provider ( instead
of your money going proprietory ): imagine buying a new modem or router
every time you change ISPs or buying different kinds of printers for
printing from different web sites. That is the position of debit card
recharging buying a new device each time you change the service provider.
The IETF can help or do you hold alternative views ( give me some
recharging devices that allow change overs )??
Yours sincerely,
Nyagudi Musandu
At 10:28 14/05/00 -0700, you wrote:
>Musandu writes
>
> >It may just be time for the IETF to develop a financial standards
> >work group separate from the applications work group. I can even >forsee
>a Simple Cash Transfer Protocol? any objections?
>
>There is an ANSI Financial Standards body (X9) which is also chair of the
>ISO Financial Standards group.
>
>The electronic commerce payments working group (X9A10) has a draft standard
>for all electronic retail payments (debit, credit, pre-paid, electronic
>cash, etc) .. X9.59.
>
>
>misc. ref
>
>http://www.x9.org/
>http://www.x9.org/main_organization.html
>http://www.x9.org/subcomms/x9a/general/public/general.html
>http://www.tc68.org/
>https://www.garlic.com/~lynn/
>https://www.garlic.com/~lynn/99.html#224
>https://www.garlic.com/~lynn/8583flow.htm
>https://www.garlic.com/~lynn/draft-wheeler-ipki-aads-01.txt
>
>& of course my rfc index is also at:
>
>https://www.garlic.com/~lynn/rfcietff.htm
>
>as well as ietf, payments, security, X9F, and financial glossaries
>
>--
>Anne & Lynn Wheeler lynn@garlic.com
> https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
--
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https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: RISC Reference? Newsgroups: comp.arch Date: Sun, 21 May 2000 14:14:32 GMTeugene@cse.ucsc.edu (Eugene Miya) writes
misc. 801 ref;
https://www.garlic.com/~lynn/95.html#5
https://www.garlic.com/~lynn/95.html#11
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: TF-1 Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Mon, 22 May 2000 18:14:54 GMT"Al Grant" writes:
One thing I consider big difference between ROMP/RIOS & POWERPC ... was POWERPC allowed for cache consistency (aka SMP). all the ROMP/RIOS designs (that I know of) had no provisions for cache consistency operation (ROMP/RIOS would be involved in various parallel machine designs ... in part because they couldn't be used in cache consistency SMP machines ... aka if all you have is a hammer, then everything is a nail?).
random references:
https://www.garlic.com/~lynn/2000.html#49
https://www.garlic.com/~lynn/99.html#129
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: TF-1 Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Mon, 22 May 2000 21:27:21 GMTpontius@btv.MBI.com.invalid (Dale Pontius) writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: TF-1 Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Mon, 22 May 2000 21:41:08 GMTa URL for references to both GF11 and RP3
with respect to RP3 comment:
https://www.garlic.com/~lynn/99.html#136a
my wife had been assigned the task to review RP3 to decide whether it should continue to receive funding.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A most delicious (non-folkloric) thought. Newsgroups: alt.folklore.computers Date: Tue, 23 May 2000 18:33:35 GMTTJ Edmister writes
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM Linux Newsgroups: alt.folklore.computers Date: Wed, 24 May 2000 00:06:37 GMTjones@cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) writes:
posted here a month ago ... from a posting that had been originally
made to ibm mainframe group in Feb. of this year ... the number of
separate, distinct copies of Linux running simultaneously on a single
mainframe.
My test LPAR finally ran out of gas (no resources available) at:
41,400
separate Linux images. Yes, FORTY-ONE THOUSAND WWW servers on a single
physical system. The last few hundred were painful as CP was fighting for
resources against a LPAR cap, but it did it. I finally ran out of storage
at 41K and change.
a LPAR is a physical resource partitioning of the real mainframe into
multiple logical partions/machines (i.e. a LPAR ... or logical
partition is a subset of the total machine resources).
there were ports of Unix to ibm mainframes prior the gold port (aka Amdahl unix, or Au) ... including the telco port to TSS/370 platform and various university ports. There were also non-standard unix ports like the Locus port ... for aix/370.
misc. other URLs
https://www.garlic.com/~lynn/99.html#2
https://www.garlic.com/~lynn/2000.html#64
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cache coherence [was Re: TF-1] Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Thu, 25 May 2000 12:56:20 GMTnmm1@cus.cam.ac.uk (Nick Maclaren) writes
was big mainframes crammed into a box w/o cross-cache signaling for consistency. we did some slight of hand with virtual memory and simulated messaging to support a broad range of applications. the business problem was getting people that were accustom to very strong memory consistency to put it out as a standard product.
when my wife & I were doing cluster scale-up for RIOS ... we didn't
make that mistake ... but created a couple of other problems. the
interconnect fabric we were using ... not only supported
processor-to-processor messaging ... but also processor-to-device, so
instead of confining ourselves to only doing processor to processor
message solutions ... we also looked at using the same fabric in other
ways for device interconnect also, misc. ref:
https://www.garlic.com/~lynn/96.html#15
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM 1460 Newsgroups: alt.folklore.computers Date: Sat, 27 May 2000 06:15:47 GMTjmaynard@thebrain.conmicro.cx (Jay Maynard) writes
misc. ref:
https://www.garlic.com/~lynn/94.html#18
https://www.garlic.com/~lynn/2000.html#13
https://www.garlic.com/~lynn/2000.html#55
https://www.garlic.com/~lynn/2000.html#76
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM 1460 Newsgroups: alt.folklore.computers Date: Sat, 27 May 2000 15:47:02 GMTNick Spalding writes
The 360/30 could be run in 1401 emulation mode ... and the original MPIO (multiprogramming input/output?) program could be run w/o needing a port. The source for my 360 assembler implementation ran to about 2500 cards (slightly larger than would fit in a card box ... but still small enuf to fit in a card tray) ... this included both the ability to run "stand-alone" (i.e. my own monitor, interrupt handler, storage allocation, scheduling, i/o supervisor, etc) and under os/pcp-6 (with DCB & get/put macros).
misc. ref:
https://www.garlic.com/~lynn/93.html#15
https://www.garlic.com/~lynn/93.html#17
https://www.garlic.com/~lynn/97.html#21
https://www.garlic.com/~lynn/98.html#9
and for 360 similar (but more generalized UR not specific 70xx
front-end)
https://www.garlic.com/~lynn/98.html#15
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cache coherence [was Re: TF-1] Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Sat, 27 May 2000 16:08:08 GMTJohn McCalpin writes
part of the issue was that we could demonstrate 16-way and quick path to 128-way (and above) using standard existing chips & motherboards with interconnect fabric (even demonstrate interconnect fabric on existing workstations in racks ... but some additional manufacturing cost savings by packaging standard mother boards for high-density rack mounting ... racks had to have some cooling characteristics to achieve the high-density packaging of the mother boards).
even tho oak had a lot of similarities with the mid-70s effort with ibm mainframe ... points on the trade-off curves regarding commodity standard parts were different between the mid-70s and late 80s/early 90s (in part, oak was stuck with non-standard chip part and memory bus)
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Gif images: Database or filesystem? Newsgroups: comp.databases Date: Sat, 27 May 2000 17:00:08 GMT"Adam Ruth" writes:
most often dbms transactions have been compared to batch processing ... where they both (in effect) have had single set of file open/close operations for the whole set of transactions. The web scenerio tends to be transaction oriented ... with file open/close per operation (that pathlength nominally is greater than a dbms single transaction pathlength).
dbms has some additional fixed cost ... both in terms of program setup and ongoing maint. this has tended to be recovered as activity scales up ... including infrastructure overhead for better update&change control & shorter aggregate pathlength for peak/saturated cpu operation.
In any event, there tends to be a cross-over point where the additional upfront complexity of dbms is net benefit to environment.
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: thread scheduling and cache coherence traffic Newsgroups: comp.programming.threads Date: Mon, 29 May 2000 18:32:07 GMTJan Hoogerbrugge writes:
related discussion ... where lock-out interval (duration that thread
might be dedicated to a processor) was selected for processor type based
on trade-off benefits of cache locality & cache locality loss.
https://www.garlic.com/~lynn/99.html#98
--
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From lynn@adcomsys.net Sat Jun 03 21:03:39 2000 From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Hard disks, one year ago today Newsgroups: comp.arch Date: Tue, 30 May 2000 13:56:01 GMT"Stephen Fuld" writes:
--misc. ref
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key https://www.garlic.com/~lynn/ From lynn@adcomsys.net Sat Jun 03 21:03:42 2000 From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Hard disks, one year ago today Newsgroups: comp.arch Date: Tue, 30 May 2000 14:36:03 GMT
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: write rings Newsgroups: alt.sys.pdp10,alt.folklore.computers Date: Wed, 31 May 2000 14:29:12 GMTTom Van Vleck writes
misc. ref:
https://www.garlic.com/~lynn/99.html#71
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM 1460 Newsgroups: alt.folklore.computers Date: Wed, 31 May 2000 14:47:36 GMTnospam@nowhere.com (Steve Myers) writes:
When storage protection was supported ... it was no longer possible (easy) to just create supervisor/kernel intercept just modifying certain storage locations. System did support a "customer" defined SVC (supervisor call) ... it was possible to build a system with a customer defined/added SVC which did execute with kernel authority. HASP shipped a SVC call that the customer installed into the system library as part of the HASP installed. HASP then executed that SVC at startup ... which validated that it was being called by HASP ... and then did the appropriate things to create the interrupt intercepts.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Hard disks, one year ago today Newsgroups: comp.arch Date: Wed, 31 May 2000 14:51:58 GMT"Stephen Fuld" writes:
original report motivated large effort to show it wasn't true ... but detailed evaluations eventually supported the idea as well as other innovative uses of disk technology to improve overall system thruput.
the other activity was activity monitoring (& disk access traces) for 1) load-balance the high-activity stuff across available actuators 2) clustering for large block transfers and 3) recognizing that access patterns (as mentioned) wasn't actually homogeneous and judicious combination of high activity and low activity data allocation across available actuators. many of these infrastructures ran 30-300 actuators.
all of that was different from more recent migration of dedicated "big iron" disk implementations to implementations that could share a lot of commodity volume parts.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM 1460 Newsgroups: alt.folklore.computers Date: Fri, 02 Jun 2000 14:38:10 GMTjsaum@world.std.com (Jim Saum) writes:
& others:
https://www.garlic.com/~lynn/93.html#14
https://www.garlic.com/~lynn/94.html#2
https://www.garlic.com/~lynn/94.html#18
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cache coherence [was Re: TF-1] Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Fri, 02 Jun 2000 15:24:40 GMTGreg Pfister writes:
yes it was live oak ... jsut finger abbreviation.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cache coherence [was Re: TF-1] Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Date: Fri, 02 Jun 2000 15:42:47 GMTAnne & Lynn Wheeler writes:
Fabric interconnect was based on cascaded ancor 64way non-blocking switch (replicated fabric infrastructure to the pair of fiber-channel connectors on each motherboard). Relatively few racks would house 128 processors with associated interconnect switches and associated disk drives.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: optimal cpu : mem <-> 9:2 ? Newsgroups: comp.arch Date: Sat, 03 Jun 2000 21:13:04 GMT"Bill Todd" writes
turns out for system thruput ... something similar might be stated for disk access latencies ... a side drift in the "hard disks" thread
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Hard disks, one year ago today Newsgroups: comp.arch Date: Sat, 03 Jun 2000 21:17:23 GMTBernd Paysan writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Hard disks, one year ago today Newsgroups: comp.arch Date: Sun, 04 Jun 2000 17:13:14 GMTEdward Wolfgram writes
To some extent the degree of backup sophistication is proportional to the value of the data ... one value factor may be the number of users sharing it ... but there are also instances of very valuable unique data residing on single PC/workstations (justifying advanced backup technology).
There was some statistic published that 50% of the companies that had a disk crash w/o backup went backrupt within a month after the crash (i.e. typically this includes small-to-medium PC-based businesses .. with things like computerized invoices & billing operations where the information wasn't replicated anywhere else; loosing a month or more of cash flow can be very debilitating).
home/personal use machines (using the same hardware) are less likely to contain unique data that might have significant value. The justified backup costs is not necessarily proportional to the cost of the PC hardware ... but proportional to the value of the data that could be lost.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The first "internet" companies? Newsgroups: alt.folklore.computers Date: Mon, 05 Jun 2000 17:08:49 GMTChris Baird writes
MCI also formed a number of organizations that were directed at providing internet related-services (one of them was the first involved with Mosiac ... aka Netscape in something that would be referred to today as electronic commerce server).
misc. organizations that had acceptable use policies
ans.policy barrnet.policy cerfnet.policy cicnet.policy cren.policy farnet.policy fricc.policy jvnc.policy los-nettos.policy michnet.policy nearnet.policy northwestnet.policy nsfnet.policy nysernet.policy oarnet.policy onet.policy prepnet.policy uninet.policy actual text of some of the policies ACCEPTABLE USE POLICY of Advanced Network & Services, Inc. Preamble. Advanced Network & Services, Inc. ("ANS") is a not-for-profit corporation dedicated to the advancement of education and research in the interest of improving competitiveness and productivity in the global economic environment. Accordingly, ANS' objectives are to help expand access toand interchange of information technology resources among academic, government and industry users, provide state-of-the-art high speed data networks and related services, engage in related research and development work, and improve the ways that information is created and used for education and research purposes. ANS aims to support the academic and research communities, enhance education and research at all levels, and contribute to improving the quality of education and research. NYSERNet, Inc. ACCEPTABLE USE POLICY NYSERNet, Inc. recognizes as acceptable all forms of data communications across its network, except where federal subsidy of connections may require limitations. In such cases use of the network should adhere to the general principle of advancing research and education through interexchange of information among research and educational institutions in New York State. In cases where data communications are addressed to recipients outside of the NYSERNet regional network and are carried across other regional networks or the Internet, NYSERNet users are advised that acceptable use policies of those other networks apply and may, in fact, limit use. The President of NYSERNet, Inc. and his designees may at any time make determinations that particular uses are or are not consistent with the purposes of NYSERNet, Inc. which determinations will be binding on NYSERNet users. CERFnet - ACCEPTABLE USE POLICY Purpose of CERFnet The purpose of the California Education and Research Federation is to advance research and education in general by assisting in the interchange of information among research and educational institutions by means of high speed data communications and related telecommunications techniques. NORTHWESTNET ACCEPTABLE USE POLICY NorthWestNet is a regional data communications network serving a consortium of universities and research groups in the northwest- ern part of the United States. Its goals are summarized in the Articles of Incorporation for the Northwest Academic Computing Consortium, Inc. All use of NorthWestNet facilities must be consistent with the goals and purposes of NorthWestNet. The intent of this statement is to describe certain uses which are consistent with the purposes of NorthWestNet, not to exhaustively enumerate all such possible uses. Los Nettos Acceptable Use Guidelines ------------------------------------ A member may send any type of data over the Los Nettos network. If data from any source leaves Los Nettos and enters another network that data must follow the acceptable use rules of the entered network (including member networks, regional, or backbone networks). It is the responsibility of the member where this traffic enters Los Nettos to meet this requirement. Any traffic which is disruptive from any source is prohibited. NEARnet - ACCEPTABLE USE POLICY This statement represents a guide to the acceptable use of NEARnet for data communications. It is only intended to address the issue of NEARnet use. In those cases where data communications are carried across other regional networks or the Internet, NEARnet users are advised that acceptable use policies of those other networks apply and may limit use. NEARnet member organizations are expected to inform their users of both the NEARnet and the NSFnet acceptable use policies.--
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The first "internet" companies? Newsgroups: alt.folklore.computers Date: Mon, 05 Jun 2000 19:03:12 GMT"David E. Fox" writes
misc. refs:
https://www.garlic.com/~lynn/97.html#26
https://www.garlic.com/~lynn/99.html#39
https://www.garlic.com/~lynn/99.html#112
https://www.garlic.com/~lynn/99.html#113
https://www.garlic.com/~lynn/2000.html#74
https://www.garlic.com/~lynn/internet.htm
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The first "internet" companies? Newsgroups: alt.folklore.computers Date: Mon, 05 Jun 2000 19:11:27 GMTAnne & Lynn Wheeler writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The first "internet" companies? Newsgroups: alt.folklore.computers Date: Mon, 05 Jun 2000 23:23:32 GMTJim Thomas writes
misc. ref:
https://www.garlic.com/~lynn/97.html#26
https://www.garlic.com/~lynn/99.html#39
https://www.garlic.com/~lynn/99.html#112
https://www.garlic.com/~lynn/99.html#113
https://www.garlic.com/~lynn/2000.html#74
https://www.garlic.com/~lynn/internet.htm
The internal corporate network exceeded 2000 hosts about the same time the "internet" exceeded 1000 hosts ... but the internet saw very rapid growth in the '84 to '87 timeframe.
also from (gone 404, but lives on at wayback machine):
https://web.archive.org/web/20010413162206/http://www.pbs.org/internet/timeline/
1974 - 1981
The general public gets its first vague hint of how networked computers can be used in daily life as the commercial version of the ARPANET goes online. The ARPANET starts to move away from its military/research roots.
1974 - Bolt, Beranek & Newman opens Telenet, the first commercial version of the ARPANET.
1976 - Queen Elizabeth goes online with the first royal email message.
1979 - Tom Truscott and Jim Ellis, two grad students at Duke University, and Steve Bellovin at the University of North Carolina establish the first USENET newsgroups. Users from all over the world join these discussion groups to talk about the net, politics, religion and thousands of other subjects.
1981 - ARPANET has 213 hosts. A new host is added approximately once every 20 days.
1982 - 1987
Bob Kahn and Vint Cerf are key members of a team which creates TCP/IP, the common language of all Internet computers. For the first time the loose collection of networks which made up the ARPANET is seen as an "internet", and the Internet as we know it today is born. The mid-80s marks a boom in the personal computer and super-minicomputer industries. The combination of inexpensive desktop machines and powerful, network-ready servers allows many companies to join the Internet for the first time. Corporations begin to use the Internet to communicate with each other and with their customers.
1982 - The term "Internet" is used for the first time.
1984 - William Gibson coins the term "cyberspace" in his novel "Neuromancer." The number of Internet hosts exceeds 1,000.
1986 - Case Western Reserve University in Cleveland, Ohio creates the first "Freenet" for the Society for Public Access Computing.
1987 - The number of Internet hosts exceeds 10,000.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: internal corporate network, misc. Newsgroups: alt.folklore.computers Date: Tue, 06 Jun 2000 01:16:48 GMTJim Thomas writes
One of the applications that was developed on this platform was HONE (for Hands-On Network Environment) that provided online support mostly to salesman and customer support ("field") people.
In 1977, the various US HONE sites were consolicated to Palo Alto onto eight SMP processors (network id, NONE1, HONE2, ..., HONE8) and a large disk farm. At that time of the consolidation, Palo Alto HONE supported something like 40,000 people (total accounts, not logged on simultaneously). One of the major applications (besides email, document preparation, word processing, GML document printing, etc) was called configurator. Starting with the 370/125 (in the early '70s), it was no longer possible to order a processor straight from the sales manual w/o the salesman running the order thru the configurator so that all feature codes were specified correctly (configurator also could supply lot of boiler plate for customer contract).
There were other HONE sites in europe, canada, japan, etc (I did initial hone installs in Europe and Japan in the early '70s). HONE in Palo Alto was for US support.
The Palo ALto complex also supported a large terminal and network front-end that included single system image and load balancing (i.e. if processor complex went down, things were automatically configured and login was routed to available processors, email and network activity had a lot of transparency).
The Palo Alto HONE complex was then replicated in Dallas (hone20, hone21, hone22, etc) to handle things like disastrous earthquake in Cal. (sites operated concurrently but either could "fall-over" to the other). Later this was extended to three sites: Palo Alto, Dallas, and Boulder.
misc. refs:
https://www.garlic.com/~lynn/94.html#47
https://www.garlic.com/~lynn/95.html#3
https://www.garlic.com/~lynn/96.html#23
https://www.garlic.com/~lynn/97.html#4
https://www.garlic.com/~lynn/98.html#16
https://www.garlic.com/~lynn/98.html#23
https://www.garlic.com/~lynn/99.html#38
https://www.garlic.com/~lynn/99.html#149
https://www.garlic.com/~lynn/99.html#150
https://www.garlic.com/~lynn/2000.html#1
https://www.garlic.com/~lynn/2000.html#8
https://www.garlic.com/~lynn/2000.html#75
https://www.garlic.com/~lynn/2000.html#82
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The first "internet" companies? Newsgroups: alt.folklore.computers Date: Tue, 06 Jun 2000 15:19:59 GMTAnne & Lynn Wheeler writes:
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Request for review of "secure" storage scheme Newsgroups: sci.crypt Date: Wed, 07 Jun 2000 16:24:37 GMTBaruch Even writes:
some misc. discussion excerpted from financial standards retail
payments mailing list (merchant comfort certificates):
https://www.garlic.com/~lynn/aepay4.htm
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What level of computer is needed for a computer to Love? Newsgroups: alt.folklore.computers Date: Wed, 07 Jun 2000 19:11:41 GMTglass2 writes:
One of the things I did was to go thru all pending operations and re-assign them to the "SYSTEM".
I then did further cleanup when I was fixing things for the disk engineering lab and stuck in missing interrupt handler ... and I/O recovery code (on 370 i/o doing short HDV/CLRIO loop .. which clear both the channel UCW, controller and device, except for something like contingent connection on error).
For malfunctioning controllers ... there was also convention that if you hit every subchannel address on a controller in tight loop with HDV/CLRIO ... the controller would IMPL (re-boot).
misc. ref:
https://www.garlic.com/~lynn/93.html#0
https://www.garlic.com/~lynn/94.html#2
https://www.garlic.com/~lynn/95.html#1
https://www.garlic.com/~lynn/97.html#15
https://www.garlic.com/~lynn/99.html#198
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What level of computer is needed for a computer to Love? Newsgroups: alt.folklore.computers Date: Thu, 08 Jun 2000 14:43:56 GMTab528@FreeNet.Carleton.CA (Heinz W. Wiggeshoff) writes:
A typical disk EXCP (svc 0) CCW string would be taken by the OS supervisor and prefixed with seek, set filemask, tic ... and then a SIO would be issued pointing to the supervisor's seek. The (supervisor's) seek command would do the arm/head positioning, the set filemask would limit the applicatin's program ability to reposition the arm/head, and the tic would branch to the application program's CCW string (as specified by the EXCP). The typical disk EXCP would then be a seek, search, tic -8, read/write. The seek would be repeat of the supervior's arm/head position command, the search would do a compare on the track/cylinder for the record desired, the tic -8 would repeat the search command, and then there would be the data transfer. The search command could either be a single or multitrack search. It would a compare to see if the record currently under the head met the application criteria, if not it would "branch" to the following CCW (a tic which would branch back to the search command), if the compare was successful, the search would "branch" to the CCW after the tic. If the search reached end-of-track (or end-of-cylinder) w/o a successful compare, the CCW program would terminate abnormally.
I have some recollection of being in POK 705 3rd shift in the early '70s where Don Ludlow(?) was cobbling together/testing a version of MVT & (CP/67's) CCWTRANS for AOS aka SVS (precursor to MVS) to run on 370s.
SVS was single virtual storage ... basically MVT laid out in a single 16mbyte virtual memory (with supervisor in the first 8mbyte of virtual memory, andthe 2nd 8mbytes used for all application programs). MVS .. multiple virtual storage ... reworked that so that there could be a separate (16mbyte) address space for each application (although the supervisor continued to be shared in common as the first 8mbyte of each address apace).
performance issue with CKD disks (even w/RPS)
https://www.garlic.com/~lynn/94.html#35
misc. other ref:
https://www.garlic.com/~lynn/93.html#18
https://www.garlic.com/~lynn/94.html#4
https://www.garlic.com/~lynn/94.html#7
https://www.garlic.com/~lynn/94.html#20
https://www.garlic.com/~lynn/94.html#49
https://www.garlic.com/~lynn/95.html#2
https://www.garlic.com/~lynn/97.html#23
https://www.garlic.com/~lynn/97.html#26
https://www.garlic.com/~lynn/98.html#11
https://www.garlic.com/~lynn/98.html#12
https://www.garlic.com/~lynn/98.html#28
https://www.garlic.com/~lynn/99.html#7
https://www.garlic.com/~lynn/99.html@204
https://www.garlic.com/~lynn/2000.html#68
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What level of computer is needed for a computer to Love? Newsgroups: alt.folklore.computers Date: Thu, 08 Jun 2000 16:27:46 GMTjmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
However, this really hosed the implicit LRU-nature of the overall page replacement concept. It wasn't until way into MVS releases that they finally realized that (high-use) LPA (shared, R/O, program pages commonly used by all applications) were being selected for replacement before private, modified, application-specific (changed) data pages.
"Common" was a big problem and kept getting bigger and bigger (CICS, JES, etc). cross-memory services (special multi-address space hardware instructions, i think initially seen on 3033s) was start that allowed subsystems (like JES) to access data in application memory locations w/o having to actually reside in the same address space.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Interdata, Perkin-Elmer, et al. Newsgroups: alt.folklore.computers Date: Thu, 08 Jun 2000 16:37:31 GMTWill Jennings writes:
Later this was enhanced to be serveral Interdata/3s in the same box with a Interdata/4 (effectively interdata/3s dedicated to line-scanner functions and the overall control moved to the interdata/4).
Within the past five years or so ... I had a chance to visit a machine room where there was a large perkin-elmer box still being used in this mode.
Also had a chance to talk to somebody that had been installing Perkin-Elmer boxes at some NASA installation in the early '80 ... and his comment was that the channel attachment board was still wire-wrap and could very well have been the same design/implementation that we had done in the '60s.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Interdata, Perkin-Elmer, et al. Newsgroups: alt.folklore.computers Date: Sun, 18 Jun 2000 03:56:46 GMTother misc. references to early interdata
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Thu, 22 Jun 2000 21:45:15 GMT"Simon Bowring" <sbowring+nospam@mpc-data.co.uk> writes:
in the long distant past there was some documentation on distinction between calling something 195/370 (even if it wasn't quite all of 370) vis-a-vis 195/360 ... the distinction was the "370" had a lot more instruction retry for soft errors ... supposedly going from something like a couple hrs mean time between soft error failure (given the total number of components in a large 195 & the failure rate per component) to weeks or months mean time between soft error failure.
there are also service related issues ... like discussed in mainframe
thread
https://www.garlic.com/~lynn/99.html#137
where every error on every machine is logged and evaluated. The reference in the thread was a particular scenerio involving huge concern about there being 15 total errors (of a particularly kind) over a 12 month period across several thousand installed machines ... not per machine over 12 month period .. but 15 total aggregate errors for all machines in 12 month period (many non-mainframe don't even bother to collect every error that has occurred on every machine built).
misc. references to prior "mainframe" threads here in
alt.folklore.computers over the past 5-6 years:
https://www.garlic.com/~lynn/subpubkey.html#mainframe
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: WHAT IS A MAINFRAME??? Newsgroups: alt.folklore.computers Date: Wed, 21 Jun 2000 18:17:57 GMTSteve O'Hara-Smith writes:
we tried to interest ibm in it for a museum ... but finally sold it for scrap. guy that bought it, installed it in a barn and placed larger blower fans at the barn doors ... and would operate it when it when outside temp. was cool enuf.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Domainatrix - the final word Newsgroups: comp.arch Date: Thu, 22 Jun 2000 22:03:32 GMT"David Mitchell" writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Domainatrix - the final word Newsgroups: comp.arch Date: Thu, 22 Jun 2000 22:17:24 GMT"Al Grant" writes:
The goal of the debug re-implementation was to do it in under 6weeks of my time and have it run 10 faster and have 5-10 more function. In approximately 4weeks of my time I had a REX(X) re-implementation of the VM/CMS kernel debug tool that had 2 the function and ran 10 faster than the assembler version. The next couple months, I spent a day or two off & on writing pattern analysis (in REXX) for VM/CP kernel storage abend dumps (i.e. analysing & looking for patterns of kernel failures). These kernel failure pattern analysis applications ... didn't run 10 faster than the original tool ... since they provided significantly more function.
Part of the pattern analysis was an additional set of PLI programs that analyzed VM kernel assembler listings for program code flow looking for possible register assignment problems as well as things like dead code.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Domainatrix - the final word Newsgroups: comp.arch Date: Fri, 23 Jun 2000 03:12:14 GMTjonathan@DSG.Stanford.EDU (Jonathan Stone) writes:
That work had little or no effect on CMS thruput. For CMS I did a hack
on making the simulated CMS virtual disk I/O "synchronous" rather than
"asynchronous" ... discussed at:
https://www.garlic.com/~lynn/99.html#95
that showed up in CP/67-CMS release 3.1 ... but done as "diagnose" I/O for reasons discussed in the above reference. CMS still had a "switch" and would test for running on a real machine or a "virtual" machine ... and based on the switch would use diagnose I/O or SIO. In the migration of CMS for VM/370 release ... the ability to execute real disk SIO was removed (for non-virtual/real machine operation).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Any Series/1 fans? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 02:49:24 GMT"George R. Gonzalez" writes:
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: WHAT IS A MAINFRAME??? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 15:02:26 GMToptcamel@ix.netcom.com (Howard and Kelly Lute) writes:
In spring of '76 there was a great deal of consternation created when one of the large financial institutions in Hartford decided to replace one its many existing mainframes with an Amdahl (i believe it was consisered to be the first incursion at a "true-blue" customer). I don't think it was even a technical decision ... there was something going around about the customer being truely miffed by something the local branch manager had said or done.
I got involved when somebody dreamed up the idea that the resource manager (first charged for "kernel" add-on piece of software, up until then there were charges for application software like compilers ... but the resource manager was the first kernel software to have a price-tag ... at $999/month license)) might not run as well on an Amdahl machine.
Since the resource manager replaced existing kernel code with truely dynamic adaptive stuff ... it was hard to make the case that it faired better or worse on any hardware.
An example was the unmodified, base kernel had a table of valid processor identifiers that was used at boot time to adjust various operating system parameters. The resource manager replaced the table with some code that timed sequences of instructions ... and operated based on the observed results.
AMH=AMDAHL 70-10 AMDAHL CORP. STARTS BUSINESS AMH V/6 75-04?75-06 02 FIRST AMDAHL MACHINE, FIRST PCM CPU AMH V6-2 76-10 77-09 11 (1.05-1.15)V6 WITH 32K BUFFER IBM 3033 77-03 78-03 12 VERY LARGE S/370+EF INSTRUCTIONS AMH V7 77-03 78-09 18 AMDAHL RESP. TO 3033 (1.5-1.7) V6... PCM -- plug compatible machine
I remember a seminar that Gene gave at MIT circa '73 or so. He was roundly bashed by a lot of the audience for where he was getting a lot of his funding & manufacturing.
misc. ref:
https://www.garlic.com/~lynn/99.html#2
https://www.garlic.com/~lynn/99.html#188
https://www.garlic.com/~lynn/99.html#190
https://www.garlic.com/~lynn/99.html#191
There was another down=s9de to the dynamic nature ... that it could
stick around for years and years as new machines were being introduced
(automagically doing all its dynamic adaptive stuff). misc. ref.
https://www.garlic.com/~lynn/95.html#14
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 15:37:27 GMTkragen@dnaco.net (Kragen Sitaker) writes:
this turned out to a problem for IMS hot-standby since even tho the dbms was replicated in case of failure & was instantly took-over, terminal session re-establishment would take (relatively) forever in large configurations.
misc. refs:
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/98.html#35a
https://www.garlic.com/~lynn/98.html#40
https://www.garlic.com/~lynn/99.html#71
part of the following refs was targeted at maintain session state
replication that was critical for infrastructures like ims hot-standby
https://www.garlic.com/~lynn/99.html#67
https://www.garlic.com/~lynn/99.html#70
in the case of VM/CMS, CMS users tend to be pretty heavy weight since they are both an address space & thread (as well as the type of work performed).
there is the 68/83 comparison that I've posted here several times,
from:
https://www.garlic.com/~lynn/93.html#31
which basically showed that between 68 & 83 the processer and memory capacity increased by factor of 50-60 times ... but the number of concurrent CMS users typically only increased by a factor of four times. the basic conclusion was that typical disk farm thruput between 68 & 83 only increased by a factor of four ... which was the correlation factor with the number of concurrent users. It was necessary to start changing disk i/o paradigms in order compensate for the relatively different rates of change in the different technologies.
other large complex vm/cms configurations:
https://www.garlic.com/~lynn/2000c.html#30
https://www.garlic.com/~lynn/2000c.html#31
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 17:51:24 GMTcbh@REMOVE_THIS.teabag.demon.co.uk (Chris Hedley) writes:
the source code that the PROFS group used for email was VMSG version 0.9 (effectively a test version before general release ... although in this case general release was internal corporate ... not for "customers" ... but since the internal network at the time was larger than the arpanet/internet ... still a reasonably large population ... and it was nearly all VM/CMS).
there was actually a dispute with the PROFS group where they picked up the assembler source code ... claiming it wasn't VMSG. However, it turned out that the primary author of VMSG had placed his initials in an administrative field on every piece of email handled. His initials could be found in every email originated by VMSG and every email originated by PROFS (including those in customer shops anywhere in the world). My small contribution to VMSG was a little of the CC & mailing list code; at one point I kept a small nickname file with 25,000 or so names ... before we did the corporate telephone book stuff (there was an incident where i accidentally invoked the whole nickname file).
Another thing that was done was the internal telephone book support. There had been a project with dedicated data processing center and 40-50 people that would provide an "internal telephone book" client/server support function (annual budget of something like $5m/annum). A couple of us designed an infrastructure that had a goal of being able to respond to a telephone book lookup in .25 secs elapsed (with a employee population of several hundred thousand) ... and that it would take less than 1/2 time person for keeping the data current ... and no dedicated data processing services.
This function was also made available in PROFS (PROFS group wrappered PROFS around several feature/functions ... not just VMSG/email).
with regard to assembler code & VM/CMS thread over in comp.arch ... VMSG was all 360 assembler while the phone book stuff was mostly PLS.
random refs:
https://www.garlic.com/~lynn/2000c.html#40
https://www.garlic.com/~lynn/2000c.html#41
https://www.garlic.com/~lynn/2000c.html#42
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 19:41:13 GMTAnne & Lynn Wheeler writes:
configurations today would possibly be expected to handle thruput well over an order of magnitude larger.
misc. HONE configurator ref:
https://www.garlic.com/~lynn/2000c.html#30
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: WHAT IS A MAINFRAME??? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 21:11:23 GMTjsaum@world.std.com (Jim Saum) writes:
there has also been claims that a lot of the characteristics of 3705s, NCP, and VTAM came about because of the appearance of that box and market.
random refs:
https://www.garlic.com/~lynn/96.html#30
https://www.garlic.com/~lynn/96.html#37
https://www.garlic.com/~lynn/99.html#12
https://www.garlic.com/~lynn/99.html#63
https://www.garlic.com/~lynn/2000c.html#36
https://www.garlic.com/~lynn/2000c.html#37
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 21:46:31 GMT"GerardS" writes:
multiple byte 360 instructions and the majority of the 370 instructions were defined as testing the starting and ending address boundaries and not executing or nullifying the instruction if any of the address portions violated something (memory not available, protected, page fault, etc ... also instruction was interruptable for i/o and other types of interrupts ... storing the updated values for the portion of the operation not yet performance).
MVCL (& CLCL, aka compare logical character long) 370 instuction was defined to incrementally perform the operation and update address pointers and residual length of unexecuted portion. MVCL also allowed definition of padding character if target length was longer than origin length.
In any case, 370/125 (and 370/115) as originally shipped to customers mis-implemented the MVCL (& CLCL) instructions ... prechecking the ending address (start+length) and not executing the instruction at all if there was a problem (like exceeding available real storage). This resulted in a failure of the boot image setup routine (i.e. VM/370 could be booted on a 125 machine if the boot image had been built on a non-125 machine ... it just wasn't possible to build on a kernel on a 370/125 ... until they shipped a hardware fix for the bug).
Possibly the largest used application of 16mbyte virtual address space under CP/67 was numerous APL applications (after cambridge had ported APL/360 to CMS/APL). All APL/360 installations that I was aware of (at the time) limited APL workspaces to at most 64kbytes ... and commonly 32kbytes.
With CMS/APL there was something of an explosion in financial modeling applications, performance modeling applications, configuration modeling applications, etc (and to some extent gave rise to some of the origins of data processing capacity planning).
This gave rise to large use of CMS/APL by corporate financial planning people, product planning people, product forecasting people and competitive analysis people (filling at least the niche served by a lot of spreadsheet applications that are seen today).
It also formed the basis for the majority of the applications delivered to field/customer support people on HONE.
misc ref:
https://www.garlic.com/~lynn/2000c.html#30
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 24 Jun 2000 22:09:48 GMTjsaum@world.std.com (Jim Saum) writes:
The VM/370 work for ECPS and vs/1 handshaking (basically originally targetted for 370/138 & 370/148 market place; individual installations had done earlier "CP sensitivity" work on MVT & VS/1, but it wasn't being shipped in products) was one of the first major efforts for production operation of operating systems under CP (and could also be considered an precursor to existing mainframe LPAR support).
random refs:
https://www.garlic.com/~lynn/94.html#21
https://www.garlic.com/~lynn/94.html#27
https://www.garlic.com/~lynn/94.html#28
https://www.garlic.com/~lynn/94.html#35
https://www.garlic.com/~lynn/97.html#26
https://www.garlic.com/~lynn/99.html#74
https://www.garlic.com/~lynn/2000.html#8
https://www.garlic.com/~lynn/2000.html#63
https://www.garlic.com/~lynn/2000.html#86
https://www.garlic.com/~lynn/2000b.html#50
https://www.garlic.com/~lynn/2000b.html#52
https://www.garlic.com/~lynn/2000b.html#61
https://www.garlic.com/~lynn/2000b.html#62
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: WHAT IS A MAINFRAME??? Newsgroups: alt.folklore.computers Date: Sun, 25 Jun 2000 02:47:00 GMTkragen@dnaco.net (Kragen Sitaker) writes:
the (referenced) implementation on S/1 had a lot more added value (than straight-forward 37xx PCM) since it did both pu4/ncp & pu5/vtam and used cross-domain protocol to talk to the mainframe (providing significant availability and performance improvements)
misc. ref
https://www.garlic.com/~lynn/99.html#70
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sun, 25 Jun 2000 03:37:51 GMTkragen@dnaco.net (Kragen Sitaker) writes:
this is somewhat analogous (but different) to http web server problems in the mid-90s ... most TCP implementations had linear finwait lists (i.e. prior to http ... telnet, ftp, etc. had long running sessions ... even some larger configurations with 5,000 concurrent sessions ... number of session terminations in the finwait interval was very small ... so number of items on the finwait list was trivial). tcp has minimum 7 packet exchange ... with dangling finwaits for session termination. typical http might add a couple more packets to a tcp session but web servers doing 50-100 http hits per second sometimes built finwait list with a couple thousand entries and 98% of the available cpu sometimes were lost to running finwait list.
does anybody remember when netscape added ftp20.netscape.com, what it was, and why (compared to ftp1.netscape.com thru ftp?.netscape.com)?
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Any Series/1 fans? Newsgroups: alt.folklore.computers Date: Sun, 25 Jun 2000 06:19:02 GMTbbreynolds@aol.comskipthis (Bruce B. Reynolds) writes:
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Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: WHAT IS A MAINFRAME??? Newsgroups: alt.folklore.computers Date: Mon, 26 Jun 2000 20:12:57 GMTAnne & Lynn Wheeler writes: someplace there is old article crediting the origins of the 360 PCM controller market with a project I had worked on as an undergraduate to replace a 2702 telecommunications with an interdata/3 and a wire-wrap channel attach board (that then grew into a box with an interdata/4 with multiple interdata/3s). tape & disk PCMs came later (lots of guys from san jose plant site went off and started them, similar to gene doing CPU PCM).
there has also been claims that a lot of the characteristics of 3705s, NCP, and VTAM came about because of the appearance of that box and market.
random refs:
https://www.garlic.com/~lynn/96.html#30
https://www.garlic.com/~lynn/96.html#37
https://www.garlic.com/~lynn/99.html#12
https://www.garlic.com/~lynn/99.html#63
https://www.garlic.com/~lynn/2000c.html#36
https://www.garlic.com/~lynn/2000c.html#37
misc. more references on sna, pcm, CICS, some from previous threads
& some repeats
https://www.garlic.com/~lynn/93.html#15 unit record & other controllers
https://www.garlic.com/~lynn/93.html#16 unit record & other controllers
https://www.garlic.com/~lynn/94.html#52 Measuring Virtual Memory
https://www.garlic.com/~lynn/94.html#54 How Do the Old Mainframes
https://www.garlic.com/~lynn/95.html#14 characters
https://www.garlic.com/~lynn/96.html#30 interdata and perkin/elmer
https://www.garlic.com/~lynn/96.html#37 interdata & perkin/elmer machines
https://www.garlic.com/~lynn/96.html#39 Mainframes & Unix
https://www.garlic.com/~lynn/96.html#9 cics
https://www.garlic.com/~lynn/97.html#15 OSes commerical, history
https://www.garlic.com/~lynn/98.html#33 cics ... from posting from another list
https://www.garlic.com/~lynn/98.html#34 cics ... from posting from another list
https://www.garlic.com/~lynn/98.html#49 Edsger Dijkstra: the blackest week of his professional life
https://www.garlic.com/~lynn/99.html#106 IBM Mainframe Model Numbers--then and now?
https://www.garlic.com/~lynn/99.html#12 Old Computers
https://www.garlic.com/~lynn/99.html#63 System/1 ?
https://www.garlic.com/~lynn/99.html#64 Old naked woman ASCII art
https://www.garlic.com/~lynn/99.html#66 System/1 ?
https://www.garlic.com/~lynn/99.html#67 System/1 ?
https://www.garlic.com/~lynn/99.html#189 Internet Credit Card Security
https://www.garlic.com/~lynn/99.html#195 Anti trust suits--IBMs' compared to Microsoft
https://www.garlic.com/~lynn/99.html#234 Computer of the century
https://www.garlic.com/~lynn/2000.html#16 Computer of the century
https://www.garlic.com/~lynn/2000.html#50 APPN vs TCP/IP
https://www.garlic.com/~lynn/2000.html#90 Ux's good points.
https://www.garlic.com/~lynn/2000b.html#0 "Mainframe" Usage
https://www.garlic.com/~lynn/2000c.html#36 Interdata, Perkin-Elmer, et al.
https://www.garlic.com/~lynn/2000c.html#37 Interdata, Perkin-Elmer, et al.
--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key
https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Java and Multos Newsgroups: alt.technology.smartcards Date: Wed, 28 Jun 2000 15:38:07 GMTthe issue of java doing binding time authentication has been brought up before ... and also techniques date back even earlier.
slightly related postings
https://www.garlic.com/~lynn/95.html#5
https://www.garlic.com/~lynn/2000.html#15
--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key
https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 01 Jul 2000 15:50:14 GMTkragen@dnaco.net (Kragen Sitaker) writes:
random refs.
https://www.garlic.com/~lynn/99.html#71
https://www.garlic.com/~lynn/99.html#77
https://www.garlic.com/~lynn/99.html#100
https://www.garlic.com/~lynn/2000.html#13
another part of the roadmap presentation was ficon ... this I haven't looked at in nearly 10 years. It appeared to be the work that some people were doing on FC-4 (fiber-channel standard) level mapping synchronous half-duplex channel protocol on top of asynchronous dual-simplex (i.e. dedicated fiber for transmission in each direction, aka full-duplex) fiber-channel.
another bullet for the s/390 roadmap was high speed queued I/O ... which also brought back memories. I don't know if anything was done with it but at the time we were doing fiber-channel cluster scale-up ... another person and I wrote up patent application for high speed queued I/O. When I mentioned that, the person doing the presentation commented that sometimes it takes decades for technology to show up in mainframes.
random refs:
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/99.html#145
https://www.garlic.com/~lynn/2000c.html#12
https://www.garlic.com/~lynn/2000c.html#21
https://www.garlic.com/~lynn/2000c.html#22
... misc. posting from fiber channel standard mailing list
Date: Tue, 09 Jul 91 16:52:54 PDT
To: fibre-channel-ext@Think.COM
Subject: Revisting Bi-Directional Sequences
I've been looking at what it would take to map (CCWs) Channel Command
Words (Block Mux to Dal) onto FC-PH and have hit the same restriction
found some time ago. The problem is that CCW operations are
necessarily bi-directional in nature, and require simultaneous
bi-directional transport mechanisms to be supported within FC-PH.
....
The sentiment of the working group was that FC-PH already provides a
dual-exchange solution to this problem. However, there is no way to
relate or control dual-exchanges in FC-PH currently. In addition,
there are several other reasons not to use dual-exchanges:
1. Operations requiring dual-exchanges may not be initiated if two
exchanges are not available.
2. Twice the number of exchanges are used up. This will likely result
in a costlier implementation.
3. Dual-exchange use will affect operation recovery.
4. An exchange is the wrong level (too-high) to provide support for
bi-directional transfer.
I propose that the FCS working group fully investigate the issue of
supporting bi-directional Sequences within an Exchange as soon as
possible since FC-PH may be impacted. I don't believe that full
reverse direction Sequence support is required as I'm assuming that
traffic in the reverse direction is minimal. This is certainly true
of CCW operations and should be explored for IPI, SCSI, and other
FC4s. This limitation may result in a fairly simple change to FC-PH
while providing effective simultaneous bi-directional operation
support.
I'd like to discuss this issue in more detail next week while we're
discussing other FC-4 to FC-PH mapping issues.
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Definitive SSL explanation please... Newsgroups: alt.security,comp.security.misc Date: Sat, 01 Jul 2000 21:00:07 GMT"James Butler" writes:
select RFCs listed by Term (term->RFC#)
and from the Acronym fastpath in RFCs by Term/Keyword select TLS for a list of related IETF RFCs (which then can be selected).
also see
http://www.openssl.org/
http://www2.psy.uq.edu.au/~ftp/Crypto/
http://www.drh-consultancy.demon.co.uk/pkcs12faq.html
somewhat related discussions.
https://www.garlic.com/~lynn/2000.html#45
https://www.garlic.com/~lynn/2000.html#47
https://www.garlic.com/~lynn/2000.html#48
https://www.garlic.com/~lynn/2000b.html#40
https://www.garlic.com/~lynn/aepay4.htm#comcert8
https://www.garlic.com/~lynn/aepay4.htm#comcert15
https://www.garlic.com/~lynn/aepay4.htm#comcert16
https://www.garlic.com/~lynn/aepay4.htm#dnsinteg2
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Disincentives for MVS & future of MVS systems programmers Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 02 Jul 2000 02:06:13 GMT"John S. Giltner, Jr." writes:
random refs.
https://www.garlic.com/~lynn/2000.html#51
https://www.garlic.com/~lynn/2000.html#53
https://www.garlic.com/~lynn/2000.html#85
https://www.garlic.com/~lynn/2000.html#90
https://www.garlic.com/~lynn/2000c.html#51
https://www.garlic.com/~lynn/2000c.html#52
https://www.garlic.com/~lynn/2000c.html#54
https://www.garlic.com/~lynn/2000c.html#56
https://www.garlic.com/~lynn/99.html#201
https://www.garlic.com/~lynn/99.html#202
https://www.garlic.com/~lynn/internet.htm
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sun, 02 Jul 2000 03:12:24 GMTsomething else in the s/390 roadmap was outboard TCP protocol handler.
one of the problems with one of the mainframe channel attach boxes in the 80s was that it basically was a bridge ... not a real router; the mainframe had to not only do the tcp & ip header stuff inboard, but fragmentation & MAC headers before passing it to the outboard box ... which then just had to drop the packet on enet or t/r (which the mainframe also had to handle).
The box i used for rfc1044 implementation was full router ... could pass it a ip packet ... and it would handle fragmentation & MAC stuff (outboard). Later boxes ... about time of T3/NSFNET2 activity included additional outboard protocol processing (including large packets support ... fragmentation for outbound, re-assembly for inbound). Later objective was to pass a TCP packet & have it do both IP & MAC layer processing.
random refs:
https://www.garlic.com/~lynn/96.html#14
https://www.garlic.com/~lynn/96.html#17
https://www.garlic.com/~lynn/98.html#49
https://www.garlic.com/~lynn/98.html#50
https://www.garlic.com/~lynn/99.html#36
other work on outboard processing in 80s w/XTP (a lot of testing done
w/100mbit FDDI)
https://www.garlic.com/~lynn/99.html#0
https://www.garlic.com/~lynn/99.html#164
https://www.garlic.com/~lynn/99.html#207
https://www.garlic.com/~lynn/2000b.html#5
.... a reply (from somebody else) regarding CCWs on FCS.
Subject: Reply to Revisiting Bi-Directional Seque
Date: 10 Jul 91 16:55:14 EDT
To: fc <fiber-channel-ext@Think.COM>
...
I guess that the basic question that you still have to answer, at
least for me, is why you need a fully bidirectional Sequence (or
Exchange) in FC when the OEMI (or FIPS-60 or whatever) that the CCWs
run over today only operates in half-duplex mode exactly like the
current FC exchange definition!! If you can explain that in some
detail we might even be able to have a sensible discussion on the
subject - no guarantees of course!
My view at the moment is that the architecture of Fiber Channel
utterly collapses if true bidirectional Sequences are required i.e. we
can throw away FC-2 completely and start again. The replacement
protocol would need to be tightly synchronized and would require that
frames be completely processed in real-time upon reception. The reason
for this time-sensitivity is that in order to be able to accurately
decode the "return direction information", the receiver needs to be
able to recreate the status of the link that the generator saw at the
time of transmitting that information e.g. had it started to receive
the Sequence that is "in flight" towards it etc.
I will be presenting Mark 2 of my FC-4 Paradigm next week in Valley
Forge, along with an updated FC-4 for IPI. That work has convinced me
that, far from requiring bidirectional Sequences, IPI-3 CANNOT be made
deadlock-free if bidirectional operation is allowed.
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Disincentives for MVS & future of MVS systems programmers Newsgroups: bit.listserv.ibm-main Date: Sun, 02 Jul 2000 08:34:22 GMTldw@BEST.COM (Leonard Woren) writes:
random ref:
https://www.garlic.com/~lynn/99.html#112
with respect to UCLA (from rfc1251)
https://www.garlic.com/~lynn/2000.html#72
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: TF-1 Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers Followup-To: yes Date: Sun, 02 Jul 2000 18:32:32 GMTAnne & Lynn Wheeler writes:
In June of '86, the IBM Kingston Engineering & Science Center had 20 x64 FPS "attached processors" configured with range of memories between 32mbyte to 512mbyte that had peak of 1.5gflop.
... also from apr '87 CNSF (cornell national supercomputer facility) announcement (note the FPS disk subsystem was RAID with 40mbyte/sec transfer):
The CNSF provides a configuration consisting of an IBM 3090-400 with
four vector facilities and five attached scientific computers from
Floating Point Systems, giving a peak throughput of over 600 megaflops.
The IBM 3090-400 VF has a peak performance of 432 megaflops, with 128
megabytes of memory, 512 megabytes of expanded storage, and 105 gigabytes
of disk storage. Each application may use up to 1 gigabyte of memory.
Software support exists for vectorization, including a vectorizing
compiler and vector libraries, and for parallelization. VM/XA SF (CMS)
is the operating system; both interactive and batch modes are provided.
The five FPS 264 scientific computers each have 650 megabytes of disk
storage and 38 megaflops peak speed. Four of the FPS processors have
36 megabytes of memory each, and one has 16 megabytes of memory. These
processors are connected by a high-speed bus for parallel processing.
An IBM 4381 and two additional FPS 164 processors provide a development
environment. All the IBM and FPS systems fully support ANSI-standard
FORTRAN-77.
... & from s-comput sep. 86
List of Supercomputers on Bitnet/Netnorth/Earn ============================================== Bitnet Center 1985-1986 1987 Nodename name (tentative) == ======== ===================== ================ ================ 1 JVNC - Princeton Cyber 205 ETA-10 2 ASUACAD Arizona State IBM 3090-200/VF 3 BOSTONU Boston University IBM 3090-200/VF Same 4 CORNELLD/ Theory - Cornell IBM 3084/QX128, IBM 3090/400, CORNELLF FPS 264's FPS 264's 5 CPWPSCA/ Pittsburgh Cray X-MP/?? Same CPWPSCB 6 CSU205 Colorado State Cyber 205 Same 7 DB0ZIB21 Berlin - Germany Cray 1M Same 8 DFVLROP1 German Aerospace Cray 1S Same 9 DGAIPP1S Max Planck - Germany Cray X-MP/14 Cray X-MP/24 10 DJUKFA11 Juelich - Germany Cray X-MP/22 Same 11 DKAUNI46 Karlsruhe - Germany Cyber 205 Same 12 DS0RUS1I Stuttgart - Germany Cray 1M Cray 2 13 FSUSUP Florida State Cyber 205 ETA-10 14 HASARA5 Amsterdam U - Neth. Cyber 205 Same 15 ISUMVS Iowa State NAS/AS 9160VPF Same 16 NCSAVMSA/ NCSA - Illinois Cray X-MP/24 Cray X-MP/48 NCSAVMSB 17 SDSC San Diego Cray X-MP/48 Same 18 UCBLYNX U C Berkeley Cray X-MP/12 Cray X-MP/14 19 UCBCMSA U C Berkeley IBM 3090-200/VF same 20 UCLAMVS UCLA IBM 3090-200/VF Same 21 UGA205 Univ of Georgia Cyber 205 Same 22 UNCACDC Univ of Calgary, CAN Cyber 205 Same 23 UTORONTO U of Toronto Cray X-MP/22 Same 24 VSP1 Boeing Data Services Cray X-MP/24 Same 25 VTVM1 Virginia Polytech IBM 3090-200/VF Same--
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: ANSI X9.62 and X9.63 Newsgroups: sci.crypt Date: Mon, 03 Jul 2000 04:06:20 GMTTAY YUE WENG writes:
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 14:51:49 GMTjmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
There were 327x controllers that talked bisynch telecommunication protocol (instead of direct channel attach) ... and later SDLC telecommuncation protocol (& "LU2").
327x had a problem with repeat key being way too slow and also if you happened to be typing at the moment the screen was written to ... the keyboard would lock up.
there was a hack on the 3277 where you could patch a resister inside the 3277 keyboard and change the repeat key delay and rate (frequently used for moving the cursor around the screen in full screen operations, the resister values determined the repeat delay and rate). A slight human factors in this was that if you made it too fast, it was "higher" than the screen refresh rate i.e. in the case of repeat on cursor movement key, the cursor would continue to move after you lifted the key ... it just a little while to get used to the cursor coasting and be able to raise the key at the right moment so it stopped coasting under the correct position.
For the keyboard locking, a FIFO box was built that fit where the 3277 keyboard plugged into the head (unplug the keyboard, plug in the FIFO box into the head and plug the keyboard into the FIFO box).
3278, 3279, etc moved all that logic back into the 3274 controllers (reducing per terminal cost) and it was no longer possible to improve on the human factors. I kept a modified 3277 around well into the late '80s.
random urls:
https://www.garlic.com/~lynn/98.html#49
https://www.garlic.com/~lynn/99.html#28
https://www.garlic.com/~lynn/99.html#69
https://www.garlic.com/~lynn/99.html#108
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 15:22:53 GMTjcmorris@jmorris-pc.MITRE.ORG (Joe Morris) writes:
it basically measured perception of "instantaneous response" threshold (i.e. couldn't tell if there was delay) ... which turned out to vary from person to person (from about .1 second to about .25 second).
there was joint report written around 1980 by some YKT research people and a San Jose GPD person about effect of system delays on people productivity (we had been working on system responses at .1 second versis a lot of people saying 1.0 seconds was good enuf). The research found that there was measurably increased productivity for system response down to .2 seconds ... and then there was less good correlation (possibly explained by the 1970 research).
The research did find that variable system response had bad effect on people ... productivity was effected by approx. two times the variation. If the avg. response was .5 seconds and there was specific response that was 1.5 seconds ... then the person's attention would continue to wonder 1.5-0.5=1.0 seconds after the system responded. This not only applied to interactive activity but also things like batch compiles. If a compile would nominally take a minute ... but sometimes took 5 minutes ... a person's attention would continue to wonder for several minutes after the compile finished.
That report may have been contorted into supporting agendas regarding not having to support better than 1.5 second system response. However the original research about attention wondering was with regard to variability & people's expectations ... aka if people expected system to respond in 0.5 seconds and it periodically took 1.5 seconds ... then their attention started to drift after the system didn't respond at the expected time and would continue to drift for period after the system did respond.
It was still possible to have productivity improvement with .2 second response if the frequency of variability was kept to a tolerable level.
random refs:
https://www.garlic.com/~lynn/98.html#2
https://www.garlic.com/~lynn/98.html#46
https://www.garlic.com/~lynn/2000b.html#20
https://www.garlic.com/~lynn/2000b.html#25
guy from San Jose GPD had an article in IBM Systems Journal, v20n4, 1981, "Interactive User Productivity".
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 15:58:22 GMTjata@aepiax.net (Julian Thomas) writes:
At the time, they ran a WAN using a T3 collins digital radio from bldg 12 on the main plant site to bldg. 90 (STL) ... there was a repeater tower on a hill between 12 & 90. It also ran between bldg 12 and bldg 29 (Los Gatos VLSI lab) ... again with repeater tower on the hill above the san jose dump. Microwave was put in between bldg. 12 and the rented bldg. that the IMS group moved into.
Because of the response issues, "remote 3270s" were not considered adequate for the IMS developers (i.e. 3274 controllers with 32 terminals running over 19.2 SDLC link).
HYPERchannel was selected for the project. Basically A220 channel attach adapters, A510 remote device adapters, and A710 link adapters driving a T1 channel thru the campus WAN facility.
A HYPERchannel A510 remote device adapter simulated a 370 channel and allowed attachments of 370 controllers. A HYPERchannel A220 was a 370 control box and attached to a real 370 channel. HYPERchannel ran a protocol over a 50mbit/sec. LAN. A HYPERchannel A710 link adapter would drive T1/T2 links and act as a bridge between HYPERchannel LANs.
I wrote the support at the 370 end that "packaged" up 370 device channel programs and transmitted them to a remote A510 ... where they were executed remotely in the A510 remote device adapter (driving real 370 control units).
This support provided subsecond response on "local" 3270 terminals for 300 people ... multiplexed over a single T1 (1.5mbit/sec link).
There was a couple bugs encountered along the way. While I could handle the speed mismatch between multiple 640kbyte/sec 3270 controllers and the 1.5mbit/sec (approx. 150kbytes/sec) link ... it turns out that A710s had a bug and weren't really "full-duplex" controllers. The A710s really only operated in "half-duplex" mode and having outboard traffic from the 370 mainframes to the remote side at the same time as inbound traffic from controllers cause problems. They eventually built a real full-duplex link adapter, the A715 to address the problems.
This configuration was replicated in Boulder when they moved the IMS field support team to a bldg. on the other side of I70. Because of regulations weren't able to use microwave between the roofs of the two buildings and so instead installed T1 infrared modems on poles on the two buildings. There was concern about signal quality with the infrared modems because of rain fade. However, the worst it got was a half dozen bit errors during a white-out snow storm when nobody was able to get into work. We did have a problem with the alignment of the infrared modems as the sun progressed across the sky during the day and heating different sides of the building resulting in building uneven building expansion which affected the modem alignment.
random urls:
https://www.garlic.com/~lynn/94.html#23
https://www.garlic.com/~lynn/94.html#24
https://www.garlic.com/~lynn/94.html#43
https://www.garlic.com/~lynn/94.html#55
https://www.garlic.com/~lynn/96.html#14
https://www.garlic.com/~lynn/96.html#27
https://www.garlic.com/~lynn/99.html#119
turns out that there was a side-effect of remoting the channel attached 3270s with HYPERchannel. After getting the 3270 controllers removed from directly attachment to the real 370 channels ... the thruput of the overall mainframe system increased by approx. 10% (in addition to showing to measurable degradation in system response). It turns out that the 3270 controllers (which operated at 640kbbyte/sec and also had slow cchannel bus handshake overhead) were sharing channels with disk controllers (which operated at 3mbytes/sec). Routing all 3270 traffic thru the A220 channel adapter significantly reduced 3270-related channel busy ... allowing measurable additional channel capacity for doing disk i/o.
more random urls:
https://www.garlic.com/~lynn/93.html#27
https://www.garlic.com/~lynn/96.html#15
https://www.garlic.com/~lynn/96.html#17
https://www.garlic.com/~lynn/98.html#34
https://www.garlic.com/~lynn/98.html#49
https://www.garlic.com/~lynn/98.html#50
https://www.garlic.com/~lynn/99.html#36
https://www.garlic.com/~lynn/99.html#123
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 16:32:02 GMTAnne & Lynn Wheeler writes:
side-benefits of remoting local 3274 & 3272 over T1 HYPERchannel was that getting those boxes directly off local 370 channels and improving aggregate system thruput by 10-15% because of increase disk i/o thruput (because local 3274 & 3272 controllers were no longer responsible for high channel busy interference).
part of the problem at the time was you could only get 16 channels on a 370. there just weren't enuf available channels to dedicate specific channels to specific device types.
there was a report for customers that did come out sometime after the HYPERchannel experience that did recommend (if the customer had available channels) to separate channels with disk controller attachments and 327x controller attachments.
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 16:48:33 GMTAnne & Lynn Wheeler writes:
we found a trick ... that if you executed a HDV/CLRIO instruction sequence in a tight loop against every device (address) on a local attached 3274 ... it would reboot itself w/o requiring manual operater intervention.
--
Anne & Lynn Wheeler | lynn@garlic.com
https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 17:25:24 GMTAnne & Lynn Wheeler writes:
The 370 115/125 were done by the Boeblingen Germany lab. It was actually a shared memory bus with up to 9 microprocessors. The 115 had all microprocessors the same ... all with different microcode loads depending on the dedicated controller function ... telecommunication, disk, etc ... and one of the microprocessors had the 370 instruction set microcode load. The 125 was identical to the 115 except the microprocessor with the 370 microload was not the same as the others ... but something that ran about 50% faster.
VAMPS was to build a 370/125 where there were between two to five microprocessors running the 370 instruction set microcode load in a shared memory configuration.
To simplify development for a SMP VM/370 configuraiton, I dropped most of the SMP support into microcode engine ... and ran the remaining reduced function CP kernel on a single processor. This is somewhat analogous to the current LPAR/PRSM support.
The reduced function CP kernel would place virtual machines on a pending dispatch queue ... and when it had no more work it went to the microcode dispatcher. For virtual machine work that couldn't be handled in the microcode, it would place an element on the pending work queue and attempt to enter kernel mode. If another processor was already in kernel mode, the processor would just go off and look for work on the dispatch queue. Basically this was a high-speed queued dispatch support.
Since I also had the disk controller microcode, created a high speed queued I/O interface for the disk interface as well. Basically the abbreivated kernel put work requests on the disk controller queue. The disk controller pulled things off the queue (potentially out of order), did the work, and put the result on a pending queue. Interrupt in the abbreviated kernel could occur ... if there wasn't already a processor executing the abbreviated kernel. This was the original high speed queued I/O interface that I worked on.
When VAMPS got killed, basically a "software" version of the VAMPS implementation was built for 158/168 SMP "attached processor" machines. This didn't have the high-speed queued i/o interface ... but did have work queue for running virtual machines ... and when a processor was no longer able to handle a virtual machine it attempted to get the global kernel lock. If it failed to get the global kernel lock, it queued the work request and attempted to run some other virtual machine.
random refs:
https://www.garlic.com/~lynn/94.html#21
https://www.garlic.com/~lynn/94.html#27
https://www.garlic.com/~lynn/94.html#28
https://www.garlic.com/~lynn/95.html#3
https://www.garlic.com/~lynn/2000c.html#30
A little bit of the high-speed queued i/o showed up in the HYPERchannel work ... although the hyperchannel was able to do out-of-order processing very well ... but since the CCW "package" was being loaded into the remote A510/A515 remote device adapters for channel simulation ... it was possible to do a little bit with I/O package operations on the A51x
random refs:
https://www.garlic.com/~lynn/94.html#23
https://www.garlic.com/~lynn/94.html#24
https://www.garlic.com/~lynn/96.html#14
https://www.garlic.com/~lynn/96.html#27
The VAMPS high-speed queued i/o, the HYPERchannel experience, and the HSDT project experience (High-speed data transport) all contributed to the work on the high speed queued i/o interface for fiber channel adapters.
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 21:57:48 GMTjcmorris@jmorris-pc.MITRE.ORG (Joe Morris) writes:
I was doing a bullet proof i/o supervisor for the disk engineering lab. they had all these test cells (disk stuff inside steel cages ... about 4' sq & 7' high ... with combination padlocks ... inside a secure room, inside a secure building, etc). since they were stuff under development the boxes didn't alwas behave as specified in the manual ... but they still needed to do testing connected to a mainframe. A room might have 2-3 different mainframes and a dozen or so test cells that were undergoing development & test.
At the time, if MVS was ipl'ed on one of the mainframes while test cells were connected and doing anything ... mean-time-between mvs crash was about 15 minutes. As a result, the guys on the test cells needed dedicated machine time ... running a small, dedicated real-time monitor.
The objective of making the I/O supervisor absolutely bullet proof ... so no matter what I/O things happened ... the I/O supervisor wouldn't contribute to any sort of system failure. This would allow the various mainframes to all be run with operating systems ... performing a number of useful services while concurrently supporting testing of multiple test cells.
other components had similar reboot features. It was possible to get a 303x channel director to reboot if all six channels were hit in a tight loop with CLRCH instruction.
random refs:
https://www.garlic.com/~lynn/95.html#3
https://www.garlic.com/~lynn/96.html#18
https://www.garlic.com/~lynn/96.html#27
https://www.garlic.com/~lynn/97.html#15
https://www.garlic.com/~lynn/99.html#31
https://www.garlic.com/~lynn/99.html#98
https://www.garlic.com/~lynn/2000.html#78
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Mon, 03 Jul 2000 23:11:19 GMTkragen@dnaco.net (Kragen Sitaker) writes:
the channel, controller & device architecture was tightly controlled and including specifications about things like short busy, interrupts in specific sequences, error indicators stored in specific ways.
flaky devices could present "short busy" ... where the prescribed processor was to immediately retry the operation ... however the short busy might never clear ... and the processor might go into a tight loop retrying the operation.
a flacky device also might forget to provide an interrupt at all.
a standard device was prescribed at only presenting an error interrupt in conjunction with on ongoing operation. a flaky device might present an error interrupt out of the blue ... not in conjunction with anything else.
operating system could hang because of tight loop or missing interrupts (not real crash ... but something requiring manual reboot to clear the conditionq). Another situation was hot interrupts which could exhaust system resources and lead to system failure because of running out of storage (similar but different to some of the internet denial of service attacks which exhausted system resources and resulted in system crash). Hot interrupts might need both device and channel fencing to get the system back under control.
Other situations were simple software logic bugs in the kernel where the device specifications had the software design operating in a specific way because the device alwas worked in a specific way. When the device operated in a very anomolous manner ... it would expose a software bug in the kernel. There could be hundreds of these conditions every day that had never been seen in a production data processing operation (or possibly less than once or twice per year across the whole machine install base of thousands & thousands of mainframes). the situation was slightly aggravated by the fact that the mainframe operating system had extensive error retry and error recovery routines ... in some cases 10-100 times the amount of error retry & recovery code compared to typical non-mainframe operating systems. As a result there was a lot more code that could have possible logic failures when exposed to extremely anomolous & unanticipated modes of operation.
These weren't production devices ... they were engineering hardware in the process of development and test. There were hundreds of anomolous conditions that never had been experienced in normal production operation. Rather than a controlled, data processing environment operating according to some standard ... the disk engineering development and test environment was an extremely hostile data processing opreation where severe error and anomolous operation was the rule instead of the exception.
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Fri, 07 Jul 2000 16:02:15 GMTseebs@plethora.net (Peter Seebach) writes:
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Wed, 05 Jul 2000 16:16:01 GMTjmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
a lot of isolation was at the controller level ... first hit every address on the controller with hdv/clrio ... then hit every address on the channel with hdv/clrio and then clrch.
the development & test labs had all the test cells on channel switches (I don't have reference at the moment so can't double check the model number) some number of the older 2919(?) with rotary switches, and a couple 3919(?). it was possible to dedicate a channel per test cell (still a significant improvement over having dedicated mainframe per machine).
the development & engineering was on the 2nd floor in bldg. 14 ... before moving to bldg. 86. The product test lab was in bldg. 15. Product test lab was a separate organization from development and engineering and had authority to not release a product for first customer ship if it failed produuct test. Product test lab had some rather interesting boxes ... including a rather large environmental test chamber (humidity, air pressure, temperature, etc) and various kinds of error injection boxes.
one of the things about mainframe ... both hardware & software ... after development, alpha tests, beta tests, etc ... was all done ... then there was a six month (elapsed) product test & Q/A cycle before first customer ship (FCS). there seem to be a lot of stuff these days that ship alpha or beta test as product (as soon as development finishes).
random urls:
https://www.garlic.com/~lynn/94.html#15
https://www.garlic.com/~lynn/95.html#3
https://www.garlic.com/~lynn/96.html#18
https://www.garlic.com/~lynn/99.html#31
https://www.garlic.com/~lynn/99.html#54
--
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https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Wed, 05 Jul 2000 16:21:31 GMTAnne & Lynn Wheeler writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Sat, 08 Jul 2000 16:16:27 GMTjmfbahciv writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Does the word "mainframe" still have a meaning? Newsgroups: alt.folklore.computers Date: Wed, 05 Jul 2000 22:43:05 GMT.... 3880/3830 reference
above ref. was situation where i got initial blame for very poor performance in the product test lab (bldg. 15). They had a 3033 with operating system providing a lot of online services as well as product testing services on a dozen channels.
at the time of the mentioned incident they had a 3830 disk controller with 16 3330-II disks drives supporting online services. the 3880 disk controller was starting product test and they appeared to have one that was reasonably far along & passed all the functional & error handling tests. One weekend they decided to swap the 3880 for their production 3830 to see what happened.
that monday their online performance went all to pieces and I started getting calls. Turns out that product test had a rather simple performance acceptance test ... it was basically a single stream VS1 jobstream that ran on 3330-ii and compared elapsed time with 3830 controller and 3880 controller. the 3880 had already passed this performance test.
the problem was rather more complex. the 3830 was a fast horizontal microcoded machine that handled all operations. The 3880 was a JIB-prime (vertical) microprocessor with hardware assist to handle actual data-movement. While 3830 only need to handle 1.5mbytes/sec data movement and the 3880 needed to handle 3mbyte/sec data streaming mode ... the old 1.5mbytes/sec was a byte at a time channel transfer ... while data streaming was 8bytes at a time channel transfer (i.e. channel handshaking was occurring 1/8th as often).
In any case, while 3880 supported higher peak data transfer ... the rest of the 3880 processing was much slower than the 3830. One of these areas was in controller "house-keeping" after a disk operation completes. In the 3830 case, this was effectively instantaneously but it the 3880 case, it was taking 1mills to 1.5mills longer. In order to have the 3880 pass the VS1 performance acceptance test, they modified the way the controller operates so that end-of-operation interrupt was presented to the channel/processor before the controller had completed housekeeping.
In the VS1 case, this resulted in posted an interrupt to the operating system, waking up some application/subsystem, the application/subsystem doing some processing and then initiating the next I/O operation. Effectively the controller house-keeping overhead was being overlapped with VS1 processing.
However, in the online service case with lots of concurrent tasks going on, thee were almost alwas requests waiting for the controller. When the controller signaled end-of-operation to the channnel/processor ... the operating system took the interrupt and then checked the queue of pending requests and would immediately "redrive" the controller &/or device with a new request. This would typically happen within tens of microseconds ... and find the controller still busy with house-keeping duties from the previous operation. The processor then was presented with, CC1, csw stored, control unit busy (i.e. status modifier plus busy; SM+BUSY in the channel status word). The operating system then had to mark the controller busy and wait until it freed itself up. Any time a controller presents SM+BUSY, it then has to present a later interrupt to indicate that it was now free.
While the VS1 workload almost never experienced the problem, the online service was doing double START I/O operations, seeing double I/O interrupts, and having a large percentage of operations being delayed by 1.5mills (for the 3880 compared to the 3830). This wasn't happening in the VS1 performance test case because it was effectively single-thread, not doing multiple concurrent operations, and effectively overlapping application/subsystem processing with the control unit housekeeping overhead.
Fortunately this incident occurred nearly 6 months before scheduled first customer ship of the 3880 ... discovering the problem at this point allowed it to be addressed before the boxes being deployed in customer installations. In general, the switch from stand-alone engineering, development and test to working in an operating system environment allowed for a lot of problems to be flushed out before first customer shipment (that otherwise wouldn't have been encountered until after the boxes were at customers).
Another problem that the post-interrupt house-keeping resulted in was finding problems during the house-keeping (not directly related to the actual data transfer) that needed to be reported to the operating system. The standard process for reporting problem is adding the unit check flag to the status stored when the interrupt occurs. Since the final interrupt on the process has already occurred ... there was no process for presenting the unit check error flag as part of the post-interrupt house-keeping.
The engineers decided to solve this problem was by presenting an unsoliccted unit check. This turns out to be a violation of the mainframe channel architecture (it is possible to do it ... but the specification that the mainframe operating system is written to ... effectively makes unsolicited unit check interrupt an invalid operation). I spent three months playing middle man between the san jose controller engineers and the POK channel engineers.
random refs:
https://www.garlic.com/~lynn/2000.html#9
--
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https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is a VAX a mainframe? Newsgroups: alt.folklore.computers Date: Sat, 08 Jul 2000 00:05:36 GMTTerry Kennedy writes:
the next in the series was 4361/4381. somewhat random piece of information was that the "service processor" for the 3090 was actually a pair of 4361s running a highly modified version of VM/SP-CMS release 6. The "service processor" panels (screens providing access to 3090 "hardware" functions) were done originally in IOS3270 running on CMS.
The ECPS functions and the use of VM/SP as the mainframe service processor could be considered part of the precursor the current PR/SM-LPAR mainframe functionality
random urls:
https://www.garlic.com/~lynn/2000.html#8
https://www.garlic.com/~lynn/2000.html#63
https://www.garlic.com/~lynn/2000.html#86
https://www.garlic.com/~lynn/2000b.html#50
https://www.garlic.com/~lynn/2000b.html#51
https://www.garlic.com/~lynn/2000b.html#52
https://www.garlic.com/~lynn/2000b.html#62
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM's "ASCI White" and "Big Blue" architecture? Newsgroups: alt.folklore.computers Date: Sat, 08 Jul 2000 16:26:17 GMTDouglas Weber writes:
random other pieces of information:
https://www.garlic.com/~lynn/2000c.html#12
https://www.garlic.com/~lynn/2000c.html#21
https://www.garlic.com/~lynn/2000c.html#22
--
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https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Free RT monitors/keyboards Newsgroups: alt.folklore.computers Date: Sat, 08 Jul 2000 16:33:42 GMTMark Wogahn writes:
i know that NSFNET1 backbone locations had racks & racks of RTs as the routers for the NSFNET1 precursor to the Internet.
Each NSFNET1 backbone site had multiple T1 links connecting it to other sites. Each T1 (1.5mbit/sec) was connected to IDNX(?) multiplexor which translated a T1 circuit into three 440kbit/sec circuits.
A RT would have a link adapter card that drive a 440kbit/sec circuit, LAN card and running NSFNET1 router software.
I remember being in the NSFNET1 backbone room at NCAR (boulder) and there was two walls of open shelf racks with a whole lot of RTs on the shelves.
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Unisys vs IBM mainframe comparisons Newsgroups: bit.listserv.ibm-main Date: Thu, 06 Jul 2000 16:02:18 GMTjbroido@PERSHING.COM (Jeffrey Broido) writes:
Cambridge Scientific Center added a Blea(sp?) box to a 360/40 in 65 which did address translation. Cambridge Scientific Center then wrote CP/40 and CMS for the box.
360/67 in 66 was a product (basically a 360/65 with 8-way associative address translation box that supported both 24-bit & 32-bit addressing (not 31-bit). Standard product was TSS/360 ... although CSC ported CP/40 to the '67 for CP/67. The 360/67 multiprocessor also had multi-ported memory (independent memory for each processor and the channel controller). On the 360/67 multiprocessor the "channel controller" which allowed all processors access to all channels in the configuration.
random refs:
https://www.garlic.com/~lynn/94.html#2
https://www.garlic.com/~lynn/98.html#10
https://www.garlic.com/~lynn/99.html#126
https://www.garlic.com/~lynn/2000.html#1
http://www.bryant.edu/~history/h364proj/fall_99/tobia/atlas.htm
http://www.sci.sdsu.edu/classes/bio595/timeline.html
https://web.archive.org/web/20021018225708/http://www.sci.sdsu.edu/classes/bio595/timeline.html
http://www.computer50.org/kgill/mark1/lav.html
https://web.archive.org/web/20001006224749/http://www.computer50.org/kgill/mark1/lav.html
--
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https://www.garlic.com/~lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Unisys vs IBM mainframe comparisons Newsgroups: bit.listserv.ibm-main Date: Thu, 06 Jul 2000 18:07:57 GMTjimkeo@lockstar.com (Jim Keohane) writes:
did work with interdata 3s/4s earlier in buiding 360 PCM control unit (someplace it is attributed as originating the 360 PCM control unit business).
random URLs:
https://www.garlic.com/~lynn/2000c.html#36
https://www.garlic.com/~lynn/2000c.html#37
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Unisys vs IBM mainframe comparisons Newsgroups: bit.listserv.ibm-main Date: Thu, 06 Jul 2000 18:55:06 GMTAnne & Lynn Wheeler writes:
misc. refs:
http://www.geocities.com/SiliconValley/Sector/3784/
http://home.t-online.de/home/Johannes.Groener/typen.htm
http://www.de.freebsd.org/de/ftp/article/rt3.htm
https://web.archive.org/web/20041115125758/wolfram.schneider.org/bsd/ftp/article/rt3.htm
--
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Unisys vs IBM mainframe comparisons Newsgroups: bit.listserv.ibm-main Date: Fri, 07 Jul 2000 06:25:54 GMTthere have been threads on alt.folklore.computers recently on some of the virtual memory issues ... misc. ref from pieces:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is a VAX a mainframe? Newsgroups: alt.folklore.computers Date: Mon, 10 Jul 2000 19:53:18 GMTLars Poulsen writes:
nominal supervisor services were in the kernel ... in the same address space as the application code and function calls passed address parameters requiring accessing of data in the application virtual memory space. to move some of these supervisor services out of the kernel into their own virtual address space (like JES) ... required that the services have some method for reaching between the services address space and into the application address space. this function introduced on the 3033 was "cross-memory services". Later versions of MVS required this hardware support in order to operate.
Also introduced on the 3033 was the ability to have up to 64mbyte of real storage (even tho only 24bit virtual & 24bit real addressing modes were available). The 370s had 4kbyte pages (12 bits). The 370 "page table entries" were 16bits, a 12bit page number (supporting 12+12=24 bit address), two defined flags, and two unused bits. For the 3033 64mbyte real storage feature, the two unused bits were included in defining a page number ... this allowed 12bit+2bits worth of page numbers.
In any case, the 4341 didn't have cross-memory services support for running MVS.
A person that I worked with on HONE had just transferred from HONE to a branch office to become SE (systems engineer) on a large commercial account. The customer put in an order for four hundred 4341s running MVS. This required upgrading the microcode on 4341 to support cross-memory services. The SE spent his first several months on the job working with Endicott getting 4341 microcode support for cross-memory services.
random refs:
https://www.garlic.com/~lynn/2000c.html#30
https://www.garlic.com/~lynn/2000c.html#76
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is a VAX a mainframe? Newsgroups: alt.folklore.computers Date: Tue, 11 Jul 2000 01:39:29 GMTglass2 writes:
Cross memory mode. Cross memory mode exists when at least one of the
following conditions are true:
The current primary address space (PASN) and the current home
address space (HASN) are different address spaces.
The current secondary address space (SASN) and the current home
address space (HASN) are different address spaces.
The ASC mode is secondary.
misc. urls:
http://www.s390.ibm.com:80/bookmgr-cgi/bookmgr.cmd/BOOKS/CMX00001/1%2e1?SHELF=CMX00001
http://www.s390.ibm.com:80/bookmgr-cgi/bookmgr.cmd/BOOKS/CMX00001/CCONTENTS?SHELF=CMX00001
http://www.telesend.com/univercd/cc/td/doc/product/software/ioss390/ios39aac/acconcpt.htm
http://www.hpl.hp.com/features/bill_worley_interview.html
https://web.archive.org/web/20000816002838/http://www.hpl.hp.com/features/bill_worley_interview.html
http://www.rs6000.ibm.com/doc_link/en_US/a_doc_lib/aixprggd/kernextc/ls_kern_svcs.htm
http://devsup.novell.de/ndk/doc/nwsaa/cpicref/cpic68.htm
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: V-Man's Patton Quote (LONG) (Pronafity) Newsgroups: alt.folklore.military Date: Tue, 11 Jul 2000 02:01:51 GMTvelovich@aol.com.CanDo (V-Man) writes:
the following ref. claims a kill ratio of 10:1
http://www.valourandhorror.com/DB/SPEC/tank/German_tank_2.htm
Even with air superiority and tank killers like the Firefly, the
German tanks were far superior to anything the Allies had and enjoyed
a kill ratio of 1:10. In 1943-44 the US produced 47,000
tanks. Germany produced 29,600 tanks and assault guns. Britain
produced only 5,000 tanks in 1944. Because of this the British
depended on the American Sherman as their main battle tank.
misc. other refs:
http://www.armyradio.co.uk/publish/Articles/William_Howard_German/German_Tank_Radios.htm
http://www.acu.edu/academics/history/12ad/714atbx/1stpg714.htm
https://web.archive.org/web/20050205072354/http://www.acu.edu/academics/history/12ad/714atbx/1stpg714.htm
http://library.thinkquest.org/16650/table.htm
https://web.archive.org/web/20001202064700/http://library.thinkquest.org/16650/table.htm
http://members.home.net/zhukov/tankguns.html
http://valourandhorror.com/DB/SPEC/GM_tank_killers.htm
http://pslab11.polsci.wvu.edu/students/jconners/conners.html
https://web.archive.org/web/20010224042853/http://pslab11.polsci.wvu.edu/students/jconners/conners.html
https://www.garlic.com/~lynn/94.html#8
https://www.garlic.com/~lynn/99.html#120
--
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https://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/