From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Resolved: There Are No Programs With >32 Bits of Text Newsgroups: comp.arch Date: Tue, 11 Mar 2003 03:05:54 GMThack@watson.ibm.com (hack) writes:
if i compare 370 to romp .... a 370/168 had a sto-associative (aka address space) tlb. it had a seven entry sto-stack (3bit) ... to identify which address space a tlb entry was associated with. basically a address space was identified by its segment table origin (aka STO) address. when switching address spaces, it would look to see if the STO was in the stack ... if not, it would scavanage an entry and invalidate all the associated TLB entries.
801 used inverted tables ... so there was no STO to identify which address space was being worked in. 801 went to segment associtive (rather than address space) and used a 12bit logical identifier to indicate which segment was being used. instead of a segment table origin address loaded into a control register ... romp had 16 segment registers that each got a 12bit logical identifier loaded. when resolving a tlb entry ... a 32bit virtual address would be translated into the first four bits to select a segment register ... and the 12bit logical segment identifier would be combined with the low 28 address bits to form a 40 bit associative value for tlb.
I've asserted that just because the associative bit structure was exposed to program didn't make the associative bits part of the virtual address. The equivalent logic would say that 370 had addressing that included the maximum possible number of different address space (segment) tables that could be created/built. While, 360/67 had both 24-bit and 32-bit address, the transition to 370 went back to only 24-bit addresses. 31-bit (rather than 32-bit) didn't reappear to 370/xa with the 3081. The minimum requirement for a segment table was 64bytes ... or 64 segment tables per 4kbytes of real storage. I would claim that I could reasonably create 16,384 unique/different segment tables (2**16) in one megabyte of real storage. Using the romp logic, 2**16 unique tables plus 2**24 virtual addressing should give 370 also 40-bit virtual addressing as well.
The explanation of 40-bit addressing in ROMP was somewhat justified based on the original design point of an non/unprotected execution/run-time environment ... where in-line application code could change address-space values as trivially as floating point register and address/general purpose register values (could be changed). To some extent the logic was that if application code could load different address-space value into a register and point to a different address space .... as easily as a different address pointer could be loaded into a general register ... then the application true address space was the size of each individual address space times the maximum number of different address spaces.
rios kept the romp/801 segment register logic, but doubled the size of unique identifier from 12 bits to 24 bits. The resulting 28bit virtual address plus 24bit segment/address-space identifier yields the 52bit.
So, if I built a kernel for 370 that always ran all code in supervisor mode ... and never switched into problem mode for application execution, then in-line application code could also change address space register value as easily as they could change general purpose registers ... and romp/801 and 370 would have the same number of virtual address bits ... 40-bits.
Did 370 have 24-bit virtual address ... based on number of bits in single address space .... or for 370/168 with 3-bit associative sto, did the 370/168 have a 27-bit virtual address (aka 24-bit virtual address per address space, plus the 3-bit address-space associative indiciator), or did it have 40-bit virtual address ... 24-bit virtual address per address space ... plus possibly 16,384 (16-bit) unique segment tables (address spaces).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 13:54:20 GMT"Russ Holsclaw" writes:
cp/67 already had logic to dynamically determine terminal type between 1052, correspondence 2741 and PTTC 2741. When I added tty/ascii support to cp/67, I rewrote the dynamic terminal type code to also be able to distinguish tty. I even demo'ed the code showing being able to dial-up 2741 and tty terminals on the same address. The ibm field engineer then told me that it wasn't spec'ed to actually work and I never did enough testing to find that out; that while the 2702 supported dynamically assigning the line-scanner to different lines ... that they took some short cuts in the implementation and that specific oscillators where hardwired to specific lines ... fixing their baud rate.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 14:00:18 GMT"Russ Holsclaw" writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 14:30:07 GMTjmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
first was that 360 had timer in location 80/x'50'. the machine would "red-light" (hardware failure/stop) if there was a pending timer update to location 50 and the timer tic'ed again. Holding the channel, tied up the memory bus (preventing access to memory). The "normal" timer tic'ed bit eight 1/300 second, every 3.3mills. The 360/67 had high resolution timer which tic'ed the low bit position approx every 13microseconds. some early testing would red-light the cpu and the channel board had to be reworked so that it released the channel at frequent intervals (and the memory bus) so location 80/x'50' timer could be updated.
past discussions of location 80 timer
https://www.garlic.com/~lynn/96.html#30 interdata and perkin/elmer
https://www.garlic.com/~lynn/96.html#37 interdata & perkin/elmer machines
https://www.garlic.com/~lynn/96.html#39 Mainframes & Unix
https://www.garlic.com/~lynn/2000d.html#40 360 CPU meters (was Re: Early IBM-PC sales proj..
https://www.garlic.com/~lynn/2003.html#21 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#24 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#25 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#26 vax6k.openecs.org rebirth
the other problem was bit order. it turns that ascii standard transmits the leading bit first. the ibm linescanners take in the leading bit of a byte and place it in the low-order bit position. when ascii data is transferred from the controller to the 360 memory, each byte is in bit-reversed format. all of the ibm official translate tables for ascii->ebcdic took into account that 360 memory copies were bit-reversed bytes (and the reverse happens with outgoing bytes). for some reason that was overlooked and tty data was arriving in 360 memory in non-bit-reversed format. that required a quick fix.
past discussion of bit-reversed ascii
https://www.garlic.com/~lynn/93.html#16 unit record & other controllers
https://www.garlic.com/~lynn/95.html#14 characters
https://www.garlic.com/~lynn/96.html#30 interdata and perkin/elmer
https://www.garlic.com/~lynn/96.html#37 interdata & perkin/elmer machines
https://www.garlic.com/~lynn/96.html#39 Mainframes & Unix
https://www.garlic.com/~lynn/98.html#34 ... cics ... from posting from another list
https://www.garlic.com/~lynn/99.html#99 The Translate (TR) instruction
https://www.garlic.com/~lynn/99.html#133 EBCDIC binary Conversion Question
https://www.garlic.com/~lynn/2001f.html#78 HMC . . . does anyone out there like it ?
https://www.garlic.com/~lynn/2001h.html#50 Flip the bits in a byte
https://www.garlic.com/~lynn/2001h.html#52 Flip the bits in a byte
https://www.garlic.com/~lynn/2001j.html#46 Big black helicopters
https://www.garlic.com/~lynn/2001n.html#44 PC/370
https://www.garlic.com/~lynn/2002n.html#51 History of HEX and ASCII
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 14:47:55 GMTjmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
When FS was canceled (folklore has the amount sunk into FS would have bankrupted any other computer company, probably the largest computer project of the time, at least on par with 360 and effectively unkown) ... the CPD response could possibly be characterized by substituting complicated integration (aka the pu5/pu4 interface between vtam and 3705ncp) for sophisticated integration.
Later in HSDT, we had a project that attempted to deliver a product that would have obsoleted much of the san vtam/ncp stuff by taking an implementation done at one of the babybells on S/1 (that remapped all of the vtam RUs and layered them on a distributed control, peer-to-peer packet network infrastructure) and ported it to RIOS.
minor refs:
https://www.garlic.com/~lynn/99.html#66 System/1 ?
https://www.garlic.com/~lynn/99.html#67 System/1 ?
https://www.garlic.com/~lynn/99.html#70 Series/1 as NCP (was: Re: System/1 ?)
https://www.garlic.com/~lynn/2002h.html#12 Why did OSI fail compared with TCP-IP?
https://www.garlic.com/~lynn/2003c.html#28 difference between itanium and alpha
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 15:14:26 GMTBen Hutchings <ben-public-nospam@decadentplace.org.uk> writes:
minor side observations .... controllers actually tended to have computer processors of one sort or another. I would guess that thru the '70s, that the PCM industry shipped more computer processors than just about any other manufacter (except ibm itself).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When using SSL, are the GET arguments (QueryString in asp) also encrypted? Newsgroups: comp.security.misc Date: Tue, 11 Mar 2003 15:34:26 GMTUlrich Boche writes:
in standard HTTP, the TCP connection is established (w/o any SSL encryption stuff) and the HTTP protocol starts flowing. With SSL, the encryption stuff is established before any HTTP protocol starts.
also as part of the ssl protocol ... the browser will check that the host name from the URL matches the domain name in the SSL certificate returned from the webserver (during initial SSL negotiation).
the webserver, based on convention established for the port address being connected to (aka 80 or 443) knows whether or not SSL negotiation is required before starting HTTP.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 17:49:50 GMT"Russ Holsclaw" writes:
about the same month, i had week of 2nd shift test time at an ibm datacenter. i was at loose ends during 1st shift and found an os/360 control block and debugging class in the building. after correcting the instructor a number of times, i was asked to leave.
later when hanging around bldgs 14 and 15 for san jose disk
engineering ... i had to pick up some more channel interface. There
were some wierd conference calls that i was asked to attend to mediate
between the pok channel engineers and the san jose disk controller
engineers (the excuse was that most of the senior san jose engineers
who normally handled this sort of stuff had wandered off over a period
of time to various startups)
https://www.garlic.com/~lynn/subtopic.html#disk
Somewhere along the way, I did manage to successfully acquire an CE tool briefcase. I had to submit the order 3-4 times ... apparently nobody out of field engineering is suppose to have them. It happens to be sitting right here ... some number of pieces have disappeared over the years. It has some of these hook things that I remember seeing service people use on the innards of 2741s. It has misc. other things like "IBM FIRST AID KIT, IBM P/N 453693", "IBM MINIPROBE ECN NO. REV. O", a sharpening stone made in India with no other designation,
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 18:17:20 GMT"Russ Holsclaw" writes:
it must have been a reasonably good job. I ran into somebody that was selling perkin-elmer machines into the federal government in the '80s ... and he commented that the channel interface wirewrap board looked like it came out of the 60s (aka perkin-elmer had bought up interdata).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 18:24:41 GMTAnne & Lynn Wheeler writes:
that i was working 1st shift in bldg. 28
https://www.garlic.com/~lynn/submain.html#systemr
2nd shift in bldgs 14/15
https://www.garlic.com/~lynn/subtopic.html#disk
3rd shift in bldg 90
https://www.garlic.com/~lynn/2001g.html#33 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2001g.html#34 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2002g.html#55 Multics hardware (was Re: "Soul of a New Machine" Computer?)
https://www.garlic.com/~lynn/2002o.html#69 So I tried this //vm.marist.edu stuff on a slow Sat. night,
https://www.garlic.com/~lynn/2002q.html#44 System vs. application programming?
https://www.garlic.com/~lynn/2003b.html#29 360/370 disk drives
and weekends at the hone complex in palo alto:
https://www.garlic.com/~lynn/subtopic.html#hone
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 'Boyd': A military Strategist's Emphasis on Speed Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 20:30:49 GMTjohn_bailey@rochester.rr.com (john bailey) writes:
as an aside, look on the web for john warden, i've talked to him a couple times ... he is much better known in the air force than boyd. there have been some papers comparing warden & boyd strategies ... but the recent attention to leakage via the web, many of the URLs have gone 404 (aka try "warden", "boyd", and "air force" in a search engine; also look for some of chuck spinney's articles).
https://www.garlic.com/~lynn/subboyd.html#boyd
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: PDP10 and RISC Newsgroups: alt.folklore.computers Date: Tue, 11 Mar 2003 20:53:32 GMT"Charlie Gibbs" writes:
effectively demons and the majority of servers (oltp, web, database, etc) are batch programs. one of the major characteristics of interactive platforms and interactive applications have been that they expected to interact with a person (including when things went wrong .... frequently just exiting with error code and expecting the human to figure it out).
most of the batch platforms have evolved automagic facilities for correcting for various types of life's unpleasantness. one of the hardest things in the 90s was trying to convince some of the people doing webservers ... that it would really be nice if servers could run in large "lights out" datacenters for weeks at a time w/o human intervention. unfortunately ... it wasn't just a question of the application programming paradigm for implementing the webservers ... but frequently the platforms they were being run on lacked the industrial strength, lights out facilities.
i had a trivial case in the mid-90s of a production korn shell on unix platform .... involving sort piped to critical report generation. For some reason the sort filled up disk space and stopped w/o any error indication. imagine something like this happening for a large corporate or gov. payroll ... being in the 50 percent of the people that aren't getting their checks.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Resolved: There Are No Programs With >32 Bits of Text Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 11 Mar 2003 22:00:31 GMThack@watson.ibm.com (hack) writes:
original 370 architecture allowed for TLBs that were either STO associative (address space) or STE associative (segment ... or page table). there were also PTLB (purge look aside table), ISTO (invalidate sto), ISTE (invalidate segment table entry), and IPTE (invalidate page table entry) instructions. Because of some technical difficulty on engineering upgrade to add virtual memory hardware to 370/165 ... all but the PTLB instruction was dropped. Later the IPTE instruction was introduced with 3033.
on cp/67 and then migrated to vm/370, I had done page mapped file
system for cms (basically minimum mods to the cms old & then edf
filesystems layered on 4k paging paradigm). One of the changes
included creating program images (MODULES) with shared segment
specification ... aka when CMS went to load the program ... it would
not only use a api to the cp kernel page i/o system .... but the api
supported shared segment specification (a little slight of hand to
guarantee unique shared segment names). An example is that the APL
interpreter could be generated as a "shared" module out on the CMS
system disk ... and then everybody invoking that APL interpreter would
share the same (appropriate segments) memory image ... as an aside
this was also deployed for hone (extremely apl intensive):
https://www.garlic.com/~lynn/subtopic.html#hone
https://www.garlic.com/~lynn/submain.html#mmap
and it was do'able w/o any of the SAVESYS or DMKSNT definition gorp (and anybody that could execute the GENMOD command could specify shared segments ... and modulo resident on page-image filesystem and some parameter checking it all worked).
that api provided CMS capability of updating segment entries analogous to any kernel api provided on ROMP to update one of its segment register value. There could be an arbritrary large number of "shared" segments .... mapped into any number of segment table entry values (aka pointer to unique page table) ... exactly equivalent to unique segments IDs in the 801/ROMP architecture.
Now if the kernel had been running CMS w/o protection and allowed a CMS application to address its own segment (address space) table and make arbitrary changes to segment table entries ... is exactly analogous to original 801 design point of allowing applications to directly change 801 segment register values. The effect is the same ... a (segment) section of a specific address space is changed from one virtual segment defintion to a totally different virtual segment definition.
Had there been 370 hardware implemented with STE-associative TLB (as allowed for in the architecture) ... then the 370 hardware would have been using the contents of the segment table entry for two distinct purposes: 1) uniquely identify the segment (exactly equivalent to the 801 logical segment id) and 2) as a address pointer to a page table (not done in 801) ... just because they are the same value doesn't make the different & distinct uses any less true.
I assert that given number #1 (equivalence between 370 segment table entry value as unique segment identifier and 801 logical segment id as unique segment identifier) then if the number of bits in the 801 logical segment id can be construed as additive to the number of virtual address bits .... then I can construe that some number of the bits in the 370 segment table entry are also additive to the the number of virtual address bits.
There is two ways of looking at this .... given a specific instruction at a specific instant in time .... what is the maximum number of different addresses directly available to that instruction. The other is that given any virtual memory mapping infrastructure .... what is the maximum number of different things that can be mapped into any single address space. If the memory mapped infrastructure supports 64k different memory mapped objects ... are those 16bits additive to the number of bits in a single address space.
370 was slightly constrained by having the unique segment identifier
also a pointer to page table ... and page tables needing to occupy
unique real storage locations. however, since I did get things like
some page'able tables shipped in the resource manager ... ref
(includes text of announcement letter):
https://www.garlic.com/~lynn/2001e.html#45 VM/370 Resource Manager
the actual number of definable shared segment/objects that could be supported in the system then was significantly larger than the number of pagetables that could be created in real storage at any moment (just had to have judicious use of TLB invalidation). then the only practical limitation was the amount of disk storage that could be attached to the machine.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 15:17:43 GMTbdc@world.std.com (Brian 'Jarai' Chase) writes:
there is possibly some study showing that the cost of developing an operating system and associated software infrastructure is significantly larger (possibly by at least order of magnitude) than the cost of developing a processor. If you are in a market that effecitvely provides the most expensive components for free (operating system, et al)... I would guess that eventually some number of people might eventually realize there is a market niche for somebody to just develop clone-hardware w/o incurring the expense of developing the rest of a computing infrastructure. Such clone-developers should have significantly larger ROI .... compared to somebody paying to develop both the hardware and software ... and only charging for hardware. They would only have to develop the hardware .... and get their software for free.
Simplified, you have a market environment that all the players are paying 1N to develop hardware and 10N to develop all the associated software infrastructure. Their total development costs are 11N and say are charging 15N for the hardware product and effectively providing the software as unlicensed for free. Somebody comes along and realizes that he can create a market-niche by only paying 1N for hardware development and sells the product for 10N. This is somewhat parasitic ... since if the players that actually were paying for software development went out of business a lot of software development stops, modulo some number of software developers who don't need money, food, housing, etc.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 15:24:13 GMTJoe Morris writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 15:46:14 GMTAnne & Lynn Wheeler writes:
so part of Amdahl's presentation was that even if ibm stopped producing 370 and switched to a totally different kind of machine ... what would happen to 370-clone business? (remember he is out raising money from investors and they would ask such a question, no direct reference to FS ... just what-if). So Amdahl presents some numbers about the size of the customer software application install base in 360/370 software (aka software developed by customers). Memory is little foggy ... but I believe he used a number of well over $100 (maybe $200) billion. In any case, his conclusion was that even if IBM switched to totally different processor architecture that day ... it would take at least another 30 years before all that software was replaced (disappeared). In the mean time, there would be a reasonably profitable market-niche for him (maybe a small $5-$10 billion a year) even if ibm totally walked away from it.
of course, FS was canceled and ibm kept producing 360/370 compatible machines and customers continued investing in developing 370 platform software.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 18:09:11 GMTbdc@world.std.com (Brian 'Jarai' Chase) writes:
however (effectively given the size of the opportunity) there were other pcm controller efforts ... as well as pcm processor efforts.
some acorn drift:
https://www.garlic.com/~lynn/2002g.html#79 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2003c.html#31 difference between itanium and alpha
https://www.garlic.com/~lynn/2003d.html#9 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003d.html#19 PC history, was PDP10 and RISC
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 20:15:11 GMTbdc@world.std.com (Brian 'Jarai' Chase) writes:
it was actually a little more complicated .... including getting told that never, ever in my career would i get a promotion.
random other Amdahl refs:
https://www.garlic.com/~lynn/99.html#2 IBM S/360
https://www.garlic.com/~lynn/99.html#188 Merced Processor Support at it again
https://www.garlic.com/~lynn/99.html#190 Merced Processor Support at it again
https://www.garlic.com/~lynn/99.html#191 Merced Processor Support at it again
https://www.garlic.com/~lynn/99.html#209 Core (word usage) was anti-equipment etc
https://www.garlic.com/~lynn/2000c.html#8 IBM Linux
https://www.garlic.com/~lynn/2000c.html#48 WHAT IS A MAINFRAME???
https://www.garlic.com/~lynn/2000d.html#61 "all-out" vs less aggressive designs (was: Re: 36 to 32 bit transition)
https://www.garlic.com/~lynn/2000e.html#21 Competitors to SABRE? Big Iron
https://www.garlic.com/~lynn/2000e.html#58 Why not an IBM zSeries workstation?
https://www.garlic.com/~lynn/2000f.html#11 Amdahl Exits Mainframe Market
https://www.garlic.com/~lynn/2000f.html#12 Amdahl Exits Mainframe Market
https://www.garlic.com/~lynn/2000f.html#68 TSS ancient history, was X86 ultimate CISC? designs)
https://www.garlic.com/~lynn/2000f.html#69 TSS ancient history, was X86 ultimate CISC? designs)
https://www.garlic.com/~lynn/2001.html#18 Disk caching and file systems. Disk history...people forget
https://www.garlic.com/~lynn/2001.html#63 Are the L1 and L2 caches flushed on a page fault ?
https://www.garlic.com/~lynn/2001b.html#12 Now early Arpanet security
https://www.garlic.com/~lynn/2001b.html#28 So long, comp.arch
https://www.garlic.com/~lynn/2001b.html#56 Why SMP at all anymore?
https://www.garlic.com/~lynn/2001b.html#67 Original S/360 Systems - Models 60,62 70
https://www.garlic.com/~lynn/2001b.html#73 7090 vs. 7094 etc.
https://www.garlic.com/~lynn/2001d.html#35 Imitation...
https://www.garlic.com/~lynn/2001d.html#70 Pentium 4 Prefetch engine?
https://www.garlic.com/~lynn/2001e.html#19 SIMTICS
https://www.garlic.com/~lynn/2001g.html#35 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2001j.html#23 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2001l.html#17 mainframe question
https://www.garlic.com/~lynn/2001l.html#18 mainframe question
https://www.garlic.com/~lynn/2001l.html#47 five-nines
https://www.garlic.com/~lynn/2001n.html#22 Hercules, OCO, and IBM missing a great opportunity
https://www.garlic.com/~lynn/2001n.html#83 CM-5 Thinking Machines, Supercomputers
https://www.garlic.com/~lynn/2001n.html#85 The demise of compaq
https://www.garlic.com/~lynn/2001n.html#90 Buffer overflow
https://www.garlic.com/~lynn/2002.html#24 Buffer overflow
https://www.garlic.com/~lynn/2002.html#44 Calculating a Gigalapse
https://www.garlic.com/~lynn/2002.html#50 Microcode?
https://www.garlic.com/~lynn/2002d.html#3 Chip Emulators - was How does a chip get designed?
https://www.garlic.com/~lynn/2002d.html#4 IBM Mainframe at home
https://www.garlic.com/~lynn/2002d.html#14 Mainframers: Take back the light (spotlight, that is)
https://www.garlic.com/~lynn/2002e.html#48 flags, procedure calls, opinions
https://www.garlic.com/~lynn/2002e.html#51 IBM 360 definition (Systems Journal)
https://www.garlic.com/~lynn/2002e.html#68 Blade architectures
https://www.garlic.com/~lynn/2002g.html#0 Blade architectures
https://www.garlic.com/~lynn/2002h.html#73 Where did text file line ending characters begin?
https://www.garlic.com/~lynn/2002i.html#12 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002i.html#17 AS/400 and MVS - clarification please
https://www.garlic.com/~lynn/2002i.html#19 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002j.html#20 MVS on Power (was Re: McKinley Cometh...)
https://www.garlic.com/~lynn/2002j.html#45 M$ SMP and old time IBM's LCMP
https://www.garlic.com/~lynn/2002j.html#46 M$ SMP and old time IBM's LCMP
https://www.garlic.com/~lynn/2002j.html#75 30th b'day
https://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
https://www.garlic.com/~lynn/2002o.html#14 Home mainframes
https://www.garlic.com/~lynn/2002p.html#40 Linux paging
https://www.garlic.com/~lynn/2002p.html#44 Linux paging
https://www.garlic.com/~lynn/2002p.html#48 Linux paging
https://www.garlic.com/~lynn/2002p.html#54 Newbie: Two quesions about mainframes
https://www.garlic.com/~lynn/2002q.html#31 Collating on the S/360-2540 card reader?
https://www.garlic.com/~lynn/2003.html#9 Mainframe System Programmer/Administrator market demand?
https://www.garlic.com/~lynn/2003.html#36 mainframe
https://www.garlic.com/~lynn/2003.html#37 Calculating expected reliability for designed system
https://www.garlic.com/~lynn/2003.html#56 Wild hardware idea
https://www.garlic.com/~lynn/2003.html#65 Amdahl's VM/PE information/documentation sought
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 23:36:02 GMT"Charlie Gibbs" writes:
the gov. changed all that with the litigation and unbundling for ibm; it took quite a while for both ibm and customers to adjust to separate pricing and packaging for hardware, software, services, etc
the idea that you could get a computer from one company and the operating system from some other company was pretty radical. the concept that one company's operating system would even boot on another company's computer was extremely radical.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: cp/67 35th anniversary Newsgroups: alt.folklore.computers Date: Wed, 12 Mar 2003 23:46:46 GMT"Charlie Gibbs" writes:
later I used to do similar to that at the science center ... there were all these MIT and BU (probably some others from harvard, tufts, etc .... I just remember some MIT and BU now) students that had access to the system (which was a real challenge since some of the corporations most sensitive data also lived on that machine).
they would periodically come up with something of interest ... and the tack was then assign them responsibility for it. It was also somewhat wierd that these kids (at least early on) ... were all older than me.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Thu, 13 Mar 2003 00:11:15 GMT"Charlie Gibbs" writes:
ibm had significant higher R&D costs .... looking back at some of the things 30, 40 years later .... it may not seem all that apparent that possibly hundreds of person years went into arriving at some of the things ... which were then picked up nearly for free by some of the clones.
i don't think that even Amdahl believed that there was long term viability for specific cloning activity ... they could take advantage of temporary niche and make some bucks (possibly several billion a year) for a short window (maybe 20-30 years) of time.
also (at the mit auditorium presentation in the early '70s) there was some accusation that Amdahl's effort was being underwritten as a market penetration study from another country (he didn't have to make them money ... relatively inexpensive experiment testing the opposition on what worked and what didn't work).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch Date: Thu, 13 Mar 2003 23:42:38 GMTJoseph Seigh writes:
a mentioned before, the boyd scenario that the US going into WW-II had few highly skilled warriors .... the training window was to turn out large numbers of warriers with minimum skills as quickly as possible ... which then fit into a tightly controlled infrastructure to maximize the few skilled warriors managing large numbers of minmally skilled warriors as effeciently as possible. the thesis then was that the officers that got their training in managing large organizations in ww-II ... started coming of age as executives in commercial companies by the '70s ... with tightly controlled/structured top-down management with large numbers of replaceable, identically skilled workers.
he somewhat used this in the contrasts presented in his talk, organic design for command and control.
nytimes had recent book review of his latest biography.
https://www.garlic.com/~lynn/subboyd.html#boyd
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 14 Mar 2003 14:18:10 GMTTerje Mathisen writes:
with respect to micromamanagement ... as stated, boyd's thesis was it was a left-over characteristic from ww-II ... where a few commanders (with any experience) had to tightly control hundreds of thousands of troops that had no idea what they were doing ... and large numbers of young officers were given this indoctrination as being the best example of how to run an organization.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 14 Mar 2003 15:43:04 GMTPete Fenelon writes:
but notice that i was wearing my red wool hiking shirt ... not a jacket.
and from vm/370 30th b'day party at Share in san fran last aug.
https://www.garlic.com/~lynn/LynnWheeler023.jpg
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch Date: Fri, 14 Mar 2003 16:45:51 GMTeugene@cse.ucsc.edu (Eugene Miya) writes:
boyd, the fighter pilot who changed the art of war, coram, 2002
refs:
https://www.garlic.com/~lynn/subboyd.html#boyd
also
war, chaos, and business, modern business strategy
http://www.belisarius.com/
https://web.archive.org/web/20010722050327/http://www.belisarius.com/
defense and the national interest
http://www.d-n-i.net/
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A Speculative question Newsgroups: alt.os.multics,alt.folklore.computers Date: Fri, 14 Mar 2003 18:55:59 GMT"Charlie Spitzer" writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 14 Mar 2003 22:09:56 GMTAnne & Lynn Wheeler writes:
trivia from the above.
if DataHub project hadn't been canceled and the ip/work allowed to to to the subcontracting company ... they may have been one less pc company .... starts with an N ...
if the decision at the referenced PASC meeting had gone differently, they would have been called IBM workstations ... instead of ....
the conference was 21 years ago last week ....
one of the things being looked at was 370 simulators on different kinds of processors (sort of antecedent to current crop of '86-based 370 simulators)
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: shirts Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 15 Mar 2003 13:45:38 GMTCharles Richmond writes:
but no actual reference to berlekamp riding unicycle
http://math.berkeley.edu/~berlek/
http://math.berkeley.edu/~berlek/cyclo.html
http://www.ishipress.com/berlekam.htm
we also had former grad student of reed's from jpl/caltech on the
project (and stranger still, he remembered having taken class from
anne's father at mit) ... yes, it had something to do with
reed-solomon encoding
https://www.garlic.com/~lynn/93.html#28 Log Structured filesystems -- think twice
https://www.garlic.com/~lynn/99.html#115 What is the use of OSI Reference Model?
https://www.garlic.com/~lynn/99.html#210 AES cyphers leak information like sieves
https://www.garlic.com/~lynn/2001b.html#80 Disks size growing while disk count shrinking = bad performance
https://www.garlic.com/~lynn/2001k.html#71 Encryption + Error Correction
https://www.garlic.com/~lynn/2002e.html#53 Mainframers: Take back the light (spotlight, that is)
https://www.garlic.com/~lynn/2002p.html#53 Free Desktop Cyber emulation on PC before Christmas
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A Speculative question Newsgroups: alt.os.multics,alt.folklore.computers Date: Sat, 15 Mar 2003 13:55:39 GMTbdc@world.std.com (Brian 'Jarai' Chase) writes:
random past:
https://www.garlic.com/~lynn/2000e.html#46 Where are they now : Taligent and Pink
https://www.garlic.com/~lynn/2001b.html#6 Java as a first programming language for cs students
https://www.garlic.com/~lynn/2001j.html#32 Whom Do Programmers Admire Now???
https://www.garlic.com/~lynn/2002j.html#76 Difference between Unix and Linux?
https://www.garlic.com/~lynn/2002m.html#60 The next big things that weren't
https://www.garlic.com/~lynn/2003d.html#45 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch,alt.folklore.computers Date: Sun, 16 Mar 2003 04:12:30 GMT"del cecchi" writes:
original cms edit (possibly back to ctss?) semantics had line up/down (up towards the top of the file and down towards the bottom of the file) ... and then used page up/down in similar manner.
edgar moved the file up (so the view was towards the end of the file) and the file down (so the view was towards the top of the file).
random ref: historical manuals ...
http://ukcc.uky.edu/~ukccinfo.391/cmsref.html
Fifth Edition, February 1984
· This edition replaces the UKCC CJS Reference and the UKCC CMS Programming Supplement. · Numerous changes have been made to reflect the new features available with Release 3 of VM/SP. · The default settings of PF10, PF11, and PF12 under XEDIT have changed. · XEDIT no longer supports EDGAR simulation mode, and the EDGAR and ECOMMAND commands are no longer available.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch,alt.folklore.computers Date: Sun, 16 Mar 2003 04:23:40 GMTpart of the issue was that positioning commands .... tended to move the current position (cursor) ... as to the current position in the file. if i'm just moving the current position within a screen ... moving the postion/cursor up tends to move the position/cursor towards the start of the file, and moving the position/cursor down tends to move the position/cursor towards the end of the file.
so program centric that scrolled/paged up/down ... was with respect to moving the file ... would tend to have the "page up" move the file up ... and the cursor (current position) moved down towards the end of the file. however if it was just cursor (current position) within the screen ... you now are faced with moving the current position (aka cursor) "up" actually means to move it down on the screen.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: comp.arch,alt.folklore.computers Date: Sun, 16 Mar 2003 16:43:24 GMTjmfbahciv writes:
for full screen edit ... the simplest comparison is start with a file that completely displays on one screen. a person-centric view moving the current position "up", moves towards the beginning of the file and "down", moves towards the end of the file (bottom of the screen).
a program/file centric view moving the current position "up" moves towards the bottom of the screen and the end of the file.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A Speculative question Newsgroups: alt.os.multics,alt.folklore.computers Date: Mon, 17 Mar 2003 17:08:51 GMTwestinnospam@graphics.cornell.edu (Stephen H. Westin) writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A Speculative question Newsgroups: alt.os.multics Date: Mon, 17 Mar 2003 17:27:51 GMTwestinnospam@graphics.cornell.edu (Stephen H. Westin) writes:
a total unrelated scaling example is the finwait list for unix's of the mid'90s. there was trivial, small code for the tcp/ip finwait list for checking on dangling finwaits.
http was basically a transaction protocol but built using tcp anyway
... previously tcp were long running sessions ... even with a large
number, the finwait list never was of a significant issue. With the
huge rate of tcp setup/teardown introduced with http ... some unixes
saw the finwait list grow to thousands and even tens of thousands and
for a time, some had over 90 percent of the CPU time spent in the
small, simple finwait scan.
I believe one of the first to fix this was sequent ... for a time it seemed like netscape was adding unix servers every couple weeks ... and there was no front-end load-balance ... people were manually selecting different "netscape1", "netscape2", etc. Somewhere along the way, they replaced all the multiple servers with a single large-scale sequent server.
in any case, scale-up issues can bite you unexpectedly ... trivial, simple, efficient linear scans that use to work ... suddenly become a major problem.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Use of SSL as a VPN Newsgroups: sci.crypt Date: Mon, 17 Mar 2003 22:25:46 GMTdaw@mozart.cs.berkeley.edu (David Wagner) writes:
the earlier definition was private internet with direct private
line between two known parties ... aka
https://web.archive.org/web/20030526143206/http://ksi.cpsc.ucalgary.ca/archives/WWW-TALK/www-talk-1994q3/0439.html
san jose meeting:
http://www.ietf.org/proceedings/94dec/toc.html
up until then, the primary IETF focus was ipsec providing end-to-end authentication and encryption. the introduction of tunneling in the router committee caused some amount of consternation in the ipsec committee ... as well as with some vendors. Within a month of the meeting .... there was at least one vendor that announced a new "vpn" product ... that basically was a standard router box with standard hardware link encryptors out-board of the box (as opposed to the encrypted tunneling actually handled inside the router box). However, there was also announcement that month of the rourter implementation (see attached).
the ipsec/tunneling swirled some more .... eventually with the router tunneling getting referred to as "lightweight ipsec" (or the regular ipsec getting referrred to as "heavyweight ipsec").
In parallel with this was small client/server startup in silicon valley
doing some encryption at the application level .... in part because
the end-to-end IPSEC was taking so long to show up in real
platforms. This thing called SSL .... allowed the startup to deploy
session encryption support totally contained within the products that
they were shipping (w/o having to rely on the availability of other
infrastructures). minor ref:
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
IPSEC is still taking quite a while to appear on platforms .... so you start seeing client-side tunneling (aka client VPN) products ... at least one such from the person that introduced the original tunneling paper in the '94 IETF meeting ... targeting business "road warriors".
recent discussion about a common key-exchange, encryption, and
authentication process for PPP, TCP, and SSL/TLS:
https://www.garlic.com/~lynn/aadsm13.htm#38 How effective is open source crypto?
from my rfc index
https://www.garlic.com/~lynn/rfcietff.htm
click on Term (term->RFC#) field in RFCs listed by section, then click on "VPN"
Virtual private network (VPN) see also encapsulate , security 3095 2917 2857 2764 2735 2685 2547 2451 2406 2405 2404 2403 2340 1851 1829 1827
clicking on rfc number, brings up the summary in the lower frame; clicking on ".txt=" field fetches the actual RFC.
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form long ago firewalls mailing list:
From: Grant Miller <milleg@wabe.network.com>
To: Firewalls Mailing List <firewalls@greatcircle.com>
Subject: RE: Encrypting tunnels
Date: Wed, 14 Dec 94 13:14:00 CST
Sender: firewalls-owner@GreatCircle.COM
Michael Haberler wites...
>Is there anybody working on a
>{ip-authenticating,encrypting,CHAPing,DH-ing}
>
>point-to-point-tunnel ala plug-gw?
>
>This could solve some of the problems of database-access over firewalls
>(note that e.g. Oracle uses TCP out-of-band signalling and TCP keepalives,
>which probably should be catered for.).
>
>Something along the lines of a userland swIPe.
start commercial
Network Systems Corp. (NSC) has announced a security product called
"Data Privacy Facility" (DPF). It encrypts IP datagrams on a
per-packet basis, gives you the ability to select what gets encrypted
and what doesn't. DPF supports DES, IDEA, and NSC1 encryption
algorithms, MD5 for digi-signatures, uses RSA and Diffie/Hellman for
key exchange, works great, lasts long time. DPF runs on a router
(which means that you can not only encrypt traffic but establish/
control access policy as well.) There is no limit to the number of
end-stations that can use an encrypted tunnel. Encrypted packets can
be forwarded over any data-link that supports IP (frame relay, ATM,
ethernet, T/R, etc.) The first hardware platform to support DPF is a
router called (suprisingly enough!) the 'Security Router'. Future
platforms will be released that will support DPF. Cost? very
reasonable. Performance? 4 Mbs or better (depends on a bunch of stuff
- like how the thing is configured.) Want more info? www.network.com (look
for recent press releases), Contact NSC corporate HQ in lovely
Minneapolis, MN. or contact your local sales-weenie.
end commercial
Grant Miller
NSC - Bellevue, WA
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Tue, 18 Mar 2003 01:06:57 GMTeugene@cse.ucsc.edu (Eugene Miya) writes:
some of the stuff i had invented as undergaduate and other stuff had
shipped in official cp/67 releases. I then got offered the opportunity
to do the resource manager product .... if i would also do all the
work (packaging, documentation, be 1st, 2nd, & 3rd level problem
support for the first six months, etc). It was packaging of subset of
stuff that I had and was distributing to internal datacenters:
https://www.garlic.com/~lynn/2001e.html#45 Resource Manager
all the stuff that I had done for page mapped file system for CMS and related performance and functional enhancements wouldn't ship. It did include a lot of stuff that I had done for multiprocessing structuring.
it shipped about the same time as the first PCM processor went into a major commercial account (other than educational institutions).
in any case, I got told that it would be the first "priced" piece of SCP code (aka kernel, operating system). Prior to this, application software had been priced ... but this would be the first SCP pricing .. and I got the glorious privilege of spending six months off & on with the business people establishing the structure/rules for pricing SCP software.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Use of SSL as a VPN Newsgroups: sci.crypt Date: Tue, 18 Mar 2003 17:29:26 GMTediebur@rcn.com (Jerry Freedman) writes:
week after san jose ietf meeting in dec. 94, somebody from NSC posted to firewall mailing list that NSC had announced the "secure router" with the "Data Privacy Facility" (DPF) that did router-to-router encrypted tunneling. At the same time, one of the other router vendors announced a priced package which was standard router with (I believe standard cylink) link encryptors.
ten years earlier, somebody had once told me that the internal network had over half of all the link encryptors in the world (i think many were cylink ... there was another name at the time, something like california microwave?) ... aka all the internal network links that left a bldg ... had to be encrypted (at the time, the internal network was still larger than the internet, although the internet was now catching up fast ... ever since the 1/1/83 switch-over).
misc posts on link encryptors & internal network
https://www.garlic.com/~lynn/2002b.html#56 Computer Naming Conventions
https://www.garlic.com/~lynn/2002d.html#9 Security Proportional to Risk (was: IBM Mainframe at home)
https://www.garlic.com/~lynn/2002d.html#11 Security Proportional to Risk (was: IBM Mainframe at home)
https://www.garlic.com/~lynn/2002j.html#52 "Slower is more secure"
some other info on internal network:
https://www.garlic.com/~lynn/internet.htm#22
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Keeping old hardware alive? Newsgroups: alt.folklore.computers Date: Tue, 18 Mar 2003 16:43:53 GMTandrew@cucumber.demon.co.uk (Andrew Gabriel) writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: editors/termcap Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 18 Mar 2003 21:00:24 GMTnmm1@cus.cam.ac.uk (Nick Maclaren) writes:
misc refs:
https://www.garlic.com/~lynn/2001e.html#57 line length (was Re: Babble from "JD" <dyson@jdyson.com>)
https://www.garlic.com/~lynn/2001e.html#71 line length (was Re: Babble from "JD" <dyson@jdyson.com>)
https://www.garlic.com/~lynn/2002n.html#39 CMS update
https://www.garlic.com/~lynn/2002p.html#2 IBM OS source code
https://www.garlic.com/~lynn/2003.html#62 Card Columns
https://www.garlic.com/~lynn/2003b.html#44 filesystem structure, was tape format (long post)
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: editors/termcap Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 18 Mar 2003 23:46:20 GMT"Hank Oredson" writes:
45696 05-05-85 10:42 PE.EXE
5313 04-26-85 17:15 PE.HLP
2447 05-05-85 10:43 PE.PRO
34 05-13-85 12:21 SPELLCHK.BAT
4382 01-15-86 09:59 PE2DIR.PRO
7416 01-13-86 12:49 PE2COLOR.COM
7754 03-01-86 12:00 PE2.HLP
76304 11-02-87 10:49 PE2.EXE
5554 11-16-87 08:19 PE2SPELL.COM
35 11-12-87 11:30 PE2ADD.PRO
779 11-12-87 11:28 PE2TODO.PRO
9581 07-09-88 17:21 SPELLC.EXE
673 06-02-87 12:47 SPELLEX1.BAT
122368 06-03-87 01:17 US.DCT
119808 11-17-87 12:48 UK.DCT
12926 03-21-88 11:14 PE2.DEF
1459 03-01-86 12:00 PE2.PRO
--
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IETF meeting (Re: editors/termcap) Newsgroups: comp.arch,alt.folklore.computers Date: Wed, 19 Mar 2003 18:33:17 GMTJohn Stracke writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Why we don't use homebrew crypto Newsgroups: sci.crypt Date: Wed, 19 Mar 2003 20:25:36 GMTCarlos Moreno writes:
one might claim that data obfuscation is similar to almost any other type of engineering endevor .... and there aren't a lot of people with extensive training in failure mode analysis (not how things are created, but how things fail). just consider the number of computer and internet vulnerabilities .... i would contend that the general internet has had significantly larger number of failure/exploits than any cryptography.
somewhat related thread:
https://www.garlic.com/~lynn/aadsm13.htm#26 How effective is open source crypto?
https://www.garlic.com/~lynn/aadsm13.htm#27 How effective is open source crypto?
https://www.garlic.com/~lynn/aadsm13.htm#28 How effective is open source crypto? (addenda)
https://www.garlic.com/~lynn/aadsm13.htm#29 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#30 How effective is open source crypto? (aads addenda)
https://www.garlic.com/~lynn/aadsm13.htm#31 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#32 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#33 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#34 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#35 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#36 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#37 How effective is open source crypto?
slightly related:
https://www.garlic.com/~lynn/subintegrity.html#fraud Risk, Fraud, Exploits
https://www.garlic.com/~lynn/subintegrity.html#assurance
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: comp.os.vms,alt.folklore.computers Date: Wed, 19 Mar 2003 20:39:06 GMT"Charlie Gibbs" writes:
some drift to failure mode analysis in sci.crypt subject:
https://www.garlic.com/~lynn/2003e.html#41 Why we don't use homebrew crypto
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM 3174 Newsgroups: alt.folklore.computers Date: Thu, 20 Mar 2003 00:38:02 GMTJoe Morris writes:
timing comparison of 3272/3277 & 3274/3278
https://www.garlic.com/~lynn/2001m.html#19 3270 Protocol
other 3270, dft/anr, fifo-boxes, etc
https://www.garlic.com/~lynn/98.html#49 Edsger Dijkstra: the blackest week of his professional life
https://www.garlic.com/~lynn/99.html#28 IBM S/360
https://www.garlic.com/~lynn/99.html#69 System/1 ?
https://www.garlic.com/~lynn/2000c.html#63 Does the word "mainframe" still have a meaning?
https://www.garlic.com/~lynn/2000g.html#23 IBM's mess
https://www.garlic.com/~lynn/2001k.html#33 3270 protocol
https://www.garlic.com/~lynn/2001k.html#46 3270 protocol
https://www.garlic.com/~lynn/2001m.html#17 3270 protocol
https://www.garlic.com/~lynn/2001l.html#32 mainframe question
https://www.garlic.com/~lynn/2002i.html#43 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002j.html#77 IBM 327x terminals and controllers (was Re: Itanium2 power
https://www.garlic.com/~lynn/2002k.html#2 IBM 327x terminals and controllers (was Re: Itanium2 power
https://www.garlic.com/~lynn/2002k.html#6 IBM 327x terminals and controllers (was Re: Itanium2 power
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Pentium 4 - RIP? Newsgroups: comp.arch Date: Thu, 20 Mar 2003 19:49:09 GMT"Stephen Fuld" writes:
Note 1: they didn't ask how many were running T1 between two sites (using some other vendor's product); a trivial survey found 200.
Note 2: they didn't ask what the tariff was for T1; the avg. T1 tariff tended to be somewhere around 5-7 individual 56kbit links. one of the reasons that there were no data points with over five (parallel) 56kbit links, was that the tarrif for a T1 tended to be cheaper than the tarrif for six (parallel) 56kbit links.
random refs:
https://www.garlic.com/~lynn/subnetwork.html#hsdt
then there was the workstation review at PASC
https://www.garlic.com/~lynn/96.html#4a John Hartmann's Birthday Party
http://vm.marist.edu/~piper/party/jph-12.html#wheeler
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Computer programming was all about:..... Newsgroups: alt.folklore.computers Date: Fri, 21 Mar 2003 15:47:36 GMTbbreynolds@aol.comedxedl (Bruce B. Reynolds) writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: alt.folklore.computers Date: Fri, 21 Mar 2003 15:39:06 GMTCharles Richmond writes:
one morning, about a month ago ... i noticed three different instances of somebody pulling into a handicapped parking space, whipping out a blue handicapped tag and hanging it on the mirror ... and getting out of the car and navigating with no obvious physical impairment. there have been various newspaper reports of illegal business in handicapped tags.
recent phrase i ran across were references to two-digit and single-digit IQs. a dilbert story-line might be somebody going thru the building after hours putting up large blue "head" handicapped bumper sticker on various office doors.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Public key and the authority problem Newsgroups: sci.crypt Date: Fri, 21 Mar 2003 17:04:12 GMT"Shannon Moncure" writes:
1) web-of-trust ... like PGP, where there is a table of public keys, who they relate to, and level of trust. basically the level of trust information is updated using out-of-band information.
2) PKI .... where you keep a table of public keys that belong to certification authorities. basically these tables are usually preloaded by some application and usually the entries are all or nothing ... something is in the table or not in the table ... so you don't have the levels of trust for CAs that you have with various web-of-trust implementations. CAs then issue credentials as to the binding between public key and some assertion (like email address) that they have used some process to certify. the incoming email has these credentials attached as to the certification of the binding between public key and some assertion (email address, etc). You trust whatever assertions are certified by a trusted CA.
The issue with shared-secrets isn't that they don't work, but that they have extremely difficult time scalling. There is a unique shared-secret required for every domain, your friend might need a unique shared-secret for every different entity that they communicate with ... since they don't one "friend" impersonating them with some other "friend".
basically a shared-secret is used for both a) originating a message/transaction b) authenticating a message/transaction.
In the single isolated case, a shared-secret does the job .... but adopting shared-secret as an infrastructure paradigm results in the need for possibly hundreds of shared-secrets per entity. This also shows up with shared-secret passwords where individuals might have to track multiple tens of passwords. The "authenticating" entity deals with the same number of authenticating objects (one per entity they communicate with) ... but the originating entity instead of having a single originating object (private key) ... has one per domain (shared-secret)
public key is asymmetric and can only be used for authenticating a message/transaction, but not originating a message/transaction (modulo secreacy vis-a-vis authentication). This provides the capability that a single public key can be used across a large number of different domains.
a trivial scenario is say RADIUS became pervasive for not only the
majority of PPP authentications (aka ISP connections) but also
webserver and other environmental operations requiring any sort of
authentication. RADIUS, on an account basis supports a number of
different authentication operations, but most "accounts" in the world
today are defined as password-authenticated. This probably is that the
shared-secret paradigm results in tens or possibly hundreds of
different shared-secrets for an individual to manage. Providing a
simple "digital signature" authentication option would allow an entity
to register their same public key in every domain .... rather than a
different, unique shared-secret in every domain (simple form is that
in place of registering a password at account setup, a public key is
registered at account setup .... the registration business process
doesn't change ... just some technology nits). misc. radius refs:
https://www.garlic.com/~lynn/subpubkey.html#radius
similarly, kerberos is the internet standard basis for windows and
other platform authentication; currently password (shared-secret)
based paradigm. However, there is pk-init internet draft for kerberos
that allows for initial authentication with digital signature (or
public key) that would allow registering a public key for the account
in place of registering a password (shared-secret). misc. kerberos
refs:
https://www.garlic.com/~lynn/subpubkey.html#kerberos
note that some number of the institutional exploits involving fradulant password/shared-secret extracts are eliminated with non-shared-secret paradigm ... like impersonation calls to obtain a forgotten entry (aka extracting your public key from an institution is significantly lower vulnerability than extracting your password).
random refs to shared-secrets and vulnerabilities/exploits:
https://www.garlic.com/~lynn/aadsm10.htm#bio3 biometrics (addenda)
https://www.garlic.com/~lynn/aadsm10.htm#bio7 biometrics
https://www.garlic.com/~lynn/aadsm11.htm#17 Alternative to Microsoft Passport: Sunshine vs Hai
https://www.garlic.com/~lynn/aadsm11.htm#20 IBM alternative to PKI?
https://www.garlic.com/~lynn/aadsm12.htm#57 eBay Customers Targetted by Credit Card Scam
https://www.garlic.com/~lynn/aadsm12.htm#60 signing & authentication (was Credit Card Scam)
https://www.garlic.com/~lynn/aadsm13.htm#23 Certificate Policies (was Re: Trivial PKI Question)
https://www.garlic.com/~lynn/99.html#235 Attacks on a PKI
https://www.garlic.com/~lynn/2000f.html#4 Why trust root CAs ?
https://www.garlic.com/~lynn/2001c.html#42 PKI and Non-repudiation practicalities
https://www.garlic.com/~lynn/2001c.html#54 PKI and Non-repudiation practicalities
https://www.garlic.com/~lynn/2001h.html#5 PKI/Digital signature doesn't work
https://www.garlic.com/~lynn/2001h.html#7 PKI/Digital signature doesn't work
https://www.garlic.com/~lynn/2001h.html#58 Net banking, is it safe???
https://www.garlic.com/~lynn/2001i.html#25 Net banking, is it safe???
https://www.garlic.com/~lynn/2001i.html#36 Net banking, is it safe???
https://www.garlic.com/~lynn/2001i.html#57 E-commerce security????
https://www.garlic.com/~lynn/2001j.html#0 E-commerce security????
https://www.garlic.com/~lynn/2001j.html#2 E-commerce security????
https://www.garlic.com/~lynn/2001j.html#9 E-commerce security????
https://www.garlic.com/~lynn/2001j.html#49 Are client certificates really secure?
https://www.garlic.com/~lynn/2001j.html#52 Are client certificates really secure?
https://www.garlic.com/~lynn/2001k.html#34 A thought on passwords
https://www.garlic.com/~lynn/2002c.html#10 Opinion on smartcard security requested
https://www.garlic.com/~lynn/2002e.html#18 Opinion on smartcard security requested
https://www.garlic.com/~lynn/2002f.html#45 Biometric Encryption: the solution for network intruders?
https://www.garlic.com/~lynn/2002j.html#14 Symmetric-Key Credit Card Protocol on Web Site
https://www.garlic.com/~lynn/2002j.html#18 Symmetric-Key Credit Card Protocol on Web Site
https://www.garlic.com/~lynn/2002n.html#14 So how does it work... (public/private key)
https://www.garlic.com/~lynn/2002n.html#30 Help! Good protocol for national ID card?
https://www.garlic.com/~lynn/2002o.html#56 Certificate Authority: Industry vs. Government
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: alt.folklore.computers Date: Fri, 21 Mar 2003 22:29:10 GMTD.J. writes:
it was combination of many factors .... 1) young, 2) male, 3) carrying something, 4) not having permanently displayed handicapped indication 5) only leaving a handicapped indication when they weren't in the vehicle, 6) recent series of articles on illegal traffic in handicap placards.
There is an associated implication is that a healthy person would only want the placard displayed minimum amount of absolutely necessary time to reduce risk of identification ... and not displayed otherwise. most real handicapped drivers I've seen have permanent display (or at least something that they move around when they are in possession of a specific vehicle). .... however if a non-handicapped person had it displayed permanently and got pulled over for any other reason .... they have a much higher likelyhood of getting also hit with having an illegal handicap placard.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: alt.folklore.computers Date: Fri, 21 Mar 2003 22:34:15 GMTD.J. writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: alt.folklore.computers Date: Sat, 22 Mar 2003 02:50:05 GMT"Charlie Gibbs" writes:
driving across from the border into downtown seemed like main thuroughfare was mostly residential streets.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A Speculative question Newsgroups: alt.os.multics,alt.folklore.computers Date: Sat, 22 Mar 2003 04:47:17 GMTDeborah Gronke Bennett writes:
from (hardcopy): "A Spring Collection: A Collection of Papers on the Spring Distributed Object-Oriented Operating System"'
which seemed in some way related to client-side interpreters? this particular'paper was originally published in the ACM Workshop on Interface Languages, January, 1994 (in fact, most of the papers in the publication were published in 1993 or 1994 in various ACM, IEEE, or USENIX publications). however I had no personal knowledge of its contribution to java
At the time of the paper, one of the people involved in the TIC chip
http://sunsite.belnet.be/doc/sun_whitepapers/1156_descr.html
https://web.archive.org/web/19990421191215/http://sunsite.belnet.be/doc/sun_whitepapers/1156_descr.html
was talking to my wife and me about becoming involved in Spring ... in
part because we had spent some time early on with regard to SCI
... and also somewhat related:
https://www.garlic.com/~lynn/95.html#13
the spring URL gone 404, but lives on at the wayback machine:
http://java.sun.com/people/kgh/spring/
https://web.archive.org/web/20020123113953/http://java.sun.com/people/kgh/spring/
http://java.sun.com/people/kgh/spring/papers.html
https://web.archive.org/web/20020130170235/http://java.sun.com/people/kgh/spring/papers.html
and also ran across green ...
http://java.sun.com/people/jag/green/index.html
https://web.archive.org/web/19990202131737/http://java.sun.com/people/jag/green/index.html
and early history of java
http://java.sun.com/features/1998/05/birthday.html
https://web.archive.org/web/19990223195009/http://www.java.sun.com/features/1998/05/birthday.html
--
A Client-Side Stub Interpreter
Peter B. Kessler
Abstract
We have built a research operating system in which all services are
presented through interfaces described by an interface description
language. The system consists of a micro-kernel that supports a small
number of these interfaces, and a large number of interfaces that are
implemented by user-level code. A typical service implements one or
more interfaces, but is a client of many other interfaces that are
implemented elsewhere in the system. We have an interface compiler
that generates client-side and service-side stubs to deliver calls
from clients to services providing location transparency if the client
and server are in different address spaces. The code for client-side
stubs was occupying a large amount of the text space on our clients,
so a stub interpreter was written to replace the client-side stub
methods. The result was that we traded 125k bytes of stub code for 13k
bytes of stub descriptions and 4k bytes of stub interpreter. This
paper describes the stub interpreter, the stub descriptions, and
discusses some alternatives.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MP cost effectiveness Newsgroups: alt.folklore.computers Date: Sat, 22 Mar 2003 14:41:41 GMTjmfbahciv writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: OT: Columbia, MD and the social impact of Ft. Meade/NSA? Newsgroups: sci.crypt Date: Sat, 22 Mar 2003 14:58:42 GMTdjohn37050@aol.com (DJohn37050) writes:
i recently heard a story why the "snake" on the md side of the beltway is the way it was. supposely md & va were in race to see who could complete their side first. md plotted a path that had the absolute least expense and time for acquiring the corridor.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Reviving Multics Newsgroups: alt.os.multics,alt.folklore.computers Date: Sun, 23 Mar 2003 04:07:51 GMTtep writes:
above has quote from one of the introductions mentioning the "recent"
s/38. the folklore is that after fs was canceled:
https://www.garlic.com/~lynn/submain.html#futuresys
some number of people retreated to Rochester and implemented some
amount of the fs architecture in the s/38.
at an asilomar sigops conference .... one of the 432 presentations was about why 432 could never work ... because of the Silicon OS ... and the difficulty of patching copies of Silicon OS in the field.
the last section in the architecture introduction is conclusion and
the last paragraph on the last page:
The conceptual gap between Ada and the iAPX 432 architecture is very
small, because the designers of the iAPX 432 architecture followed the
same object-oriented design methodology that users should follow when
writing Ada programs. The same methodology is also used in iMAX, the
Multifunction Applications Executive that Intel provides with Ada to
handle the interface between one program and the Silicon OS. The
object methodology is then found at every level of the iAPX 432
system.
random past 432 postings:
https://www.garlic.com/~lynn/2000d.html#57 iAPX-432 (was: 36 to 32 bit transition
https://www.garlic.com/~lynn/2000d.html#62 iAPX-432 (was: 36 to 32 bit transition
https://www.garlic.com/~lynn/2000e.html#6 Ridiculous
https://www.garlic.com/~lynn/2001g.html#36 What was object oriented in iAPX432?
https://www.garlic.com/~lynn/2001k.html#2 Minimalist design (was Re: Parity - why even or odd)
https://www.garlic.com/~lynn/2002d.html#27 iAPX432 today?
https://www.garlic.com/~lynn/2002d.html#46 IBM Mainframe at home
https://www.garlic.com/~lynn/2002l.html#19 Computer Architectures
https://www.garlic.com/~lynn/2002o.html#5 Anyone here ever use the iAPX432 ?
https://www.garlic.com/~lynn/2002q.html#11 computers and alcohol
https://www.garlic.com/~lynn/2003.html#5 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#6 vax6k.openecs.org rebirth
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Reviving Multics Newsgroups: alt.os.multics,alt.folklore.computers Date: Sun, 23 Mar 2003 06:17:24 GMTAnne & Lynn Wheeler writes:
note that fort knox (which was also conceled) was going to use 801 as
the low-level micro-engine for all sorts of things ... controllers,
low-end 370s (sort of analogous to the current crop of 370/390
simulators running on intel platforms), rochester products, etc. the
migration of as/400 (s/38 follow-on) to powerpc might be considered
fort knox re-born. slightly related 370 simulator on 801 ... but
starting to migrate various kernel functions to native code:
http://vm.marist.edu/~piper/party/jph-12.html#wheeler
https://www.garlic.com/~lynn/96.html#4a
the primary difference between various of these strategies on 801/risc and w/432 was that lots of these things on the 432 were in silicon ... rather than a code middle layer.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Reviving Multics Newsgroups: alt.os.multics,alt.folklore.computers Date: Sun, 23 Mar 2003 14:14:21 GMTAnne & Lynn Wheeler writes:
so a little more drift .... reason i was interested in simulators on other architectures and migrating (originally) 370 kernel code into native machine .... wasn't so much because of fort knox but because of my experience with VAMPS and ecps.
with regard to convoluted thread:
https://www.garlic.com/~lynn/2003e.html#16 unix
if pcm controllers begat FS ... which in turn begat pcm processors (along with unbundling begat priced software) ... there is some case that the experience of FS also begat something of a backlash and begat 801/risc (sort of the opposite end of the spectrum from 432 & FS).
in '75, i was working on VAMPS, ecps, and the stuff that would become
the resource manager ..
https://www.garlic.com/~lynn/2003e.html#35 unix
virgil/tully (138/148) were follow-on to the 370/135 & 370/145. turns
out the configurations had lots more microcode space. they were doing
m'code accelerators for vs1 and vm/370. the low & mid-range 370s were
"vertical" microcoded engines ... that typically had avg. of 10
micro-instructions per 370 instructions (not too different from the
current day intel-platform 370 simulators). kernel code remapped into
microcode just about same byte size ... and avg. a ten times
performance improvement. we were told that 138/148 had room for 6000
bytes of instructions and to choose those 6000 bytes from vm/370
kernel that would represent the biggest performance benefit:
https://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#27 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#28 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/submain.html#mcode
in effect, the low & mid-range had processors that were about ten
times faster than the corresponding 370 mip rating ... aka 145 at
around 300kips needed about 3mip processor, 148 at around 500kips
needed about 5mip processor, and 4341 at around 1mip needed around
10mip processor. 4341 reference being better price/performance than
vax:
https://www.garlic.com/~lynn/2001m.html#15 departmental servers
VAMPS (five years earlier) was philosophically closer to 432 in terms
of moving operating system into lower level machine (but not into real
"silicon"). the 370 dispatcher, much of paging subsystem, and a couple
other components are migrating into the m'code. That is compared to
ecps ... were a sequence of 370 instructions were dropped directly
into m'code and a new 370 instruction substituted in the kernel that
directly invoke the m'code version. VAMPS was a vm/cms only machine
... and i had done the remapping of the cms filesystem(s) to page
mapped ... which further leveraged moving the paging subsystem into
the lower level machine architecture:
https://www.garlic.com/~lynn/submain.html#mmap
The thing that was most analogous to 432 was the VAMPS dispatcher. Basically, the kernel had instruction that added process to the m'code dispatching list and got interrupts when things came off. It used the resource manager logic that calculated a dispatching priority that was a psuedo deadline for ordering the dispatch list. under the covers had up to nine microprocessors ... up to five of them that were capable of executing 370 simulation (sort of 5-way smp). the rest of the processors were dedicated to various i/o activity (and most of the paging subsystem offload went off to one of these). The remaining vm/370 kernel pieces weren't multithreaded ... logically equivalent to having a single kernel spinload ... except there wasn't any spinning; interrupts would be posted to kernel and a processor would then go off and look for something else on the dispatch queue (unless there was no processor currently in kernel mode ... in which case the processor would switch to executing the kernel). This wasn't viewed as a significant problem since something like 90percent of the existing vm/370 pathlength had been offloaded into microcode engine processing.
while ecps finally shipped as product, VAMPS was canceled before it
shipped. however, then there was an effort to take the VAMPS design
and translate it into vm/370 for standard 370 multiprocessor (except
for the cms filesystem remap to page mapped paradigm). basically logic
that had been migrated to m'code in VAMPS was SMP'ed. The remaining
code executed behind a single kernel lock. However, if a processor was
unable to obtain the kernel lock, instead of spinning, it created a
lightweight request that was queued against the kernel lock (and went
off to the dispatcher to look for another process). A processor with
the kernel lock, after completing whatever existing work, would then
check for work queued against the lock before releasing the lock. The
claim was that in terms of code change size for SMP support to the
vm/370 kernel, this design gave the biggest bang for the buck (maximum
SMP thruput for minimal kernel smp code changes).
https://www.garlic.com/~lynn/subtopic.html#smp
in any case ... it was the experience with ecps & VAMPS that, in large
part, gave rise to drive for generalized 370 simulator with transition
program of migrating kernel implementation first into portable
programming language as well into lower-level machine infrastructure:
http://vm.marist.edu/~piper/party/jph-12.html#wheeler
https://www.garlic.com/~lynn/96.html#4a
which was also one of the driving factors in 432, except they were driving it directly into silicon. the s/38 to as/400 to as/400 on power/pc did non-silicon based layered implimentation on risc platform.
related "zm" project:
https://www.garlic.com/~lynn/2001.html#27 VM/SP sites that allow free access?
https://www.garlic.com/~lynn/2001l.html#25 mainframe question
https://www.garlic.com/~lynn/2001m.html#53 TSS/360
https://www.garlic.com/~lynn/2001n.html#46 Blinking lights
https://www.garlic.com/~lynn/2002l.html#14 Z/OS--anything new?
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Security in RADIUS (RFC2865) Newsgroups: sci.crypt Date: Sun, 23 Mar 2003 23:04:56 GMT"Kim Hyldgaard" writes:
where public key is non-shared-secret registered in lieu of password (aka certificate-less public key ... similar to definition in pk-init draft for kerberos).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: editors/termcap Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 25 Mar 2003 04:11:32 GMTPeter da Silva writes:
additional memory definitions:
https://www.garlic.com/~lynn/2001f.html#37 Ancient computer humor - Memory
https://www.garlic.com/~lynn/2001k.html#73 Expanded Storage?
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Security in RADIUS (RFC2865) Newsgroups: sci.crypt Date: Tue, 25 Mar 2003 16:37:49 GMTLassi Hippeläinen writes:
raise you hand if you've configured radius on a real livingston box
old radius, livingston, aaa ref:
https://www.garlic.com/~lynn/2002q.html#17 Difference between AAA and Radius?
https://www.garlic.com/~lynn/2002q.html#18 Difference between AAA and Radius?
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: reviving Multics -- Computer Museum Newsgroups: alt.os.multics,alt.folklore.computers Date: Wed, 26 Mar 2003 17:06:08 GMTwestinnospam@graphics.cornell.edu (Stephen H. Westin) writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: hee-hee. I can do something about this spam Newsgroups: alt.folklore.computers Date: Wed, 26 Mar 2003 17:14:52 GMTArthur Chance <{spamtrap}@qeng-ho.org> writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: reviving Multics -- Computer Museum Newsgroups: alt.os.multics,alt.folklore.computers Date: Wed, 26 Mar 2003 21:51:37 GMT"Glen Herrmannsfeldt" writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: reviving Multics -- Computer Museum Newsgroups: alt.folklore.computers Date: Thu, 27 Mar 2003 01:38:02 GMTeugene@cse.ucsc.edu (Eugene Miya) writes:
when i visited ... the room just past the stk robot was on missi and some other stuff ... and they were playing a missi video tape (original fortezza card, etc). I got somebody to get me a copy of the tape .... on the excuse i would do a voice over parody of missi and fortezza.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: reviving Multics -- Computer Museum Newsgroups: alt.folklore.computers Date: Thu, 27 Mar 2003 01:41:47 GMT... and checking for the missi tape ... i also found a tape that craig mudge got me .... "IPv6: the New Internet Protocol" ... by steve deering and craig mudge, xerox parc.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 801 (was Re: Reviving Multics Newsgroups: alt.os.multics,alt.folklore.computers Date: Thu, 27 Mar 2003 06:28:18 GMTJulian Thomas writes:
endicott got a new brick office building out of 801 ... however there were some questions. There were a number of memos written from SPD planning office somewhere in Westchester .... for which I provided some amount of the technical input ... and eventually killed/canceled the effort.
to some extent the issue was that 801 software programming replaced the traditional microcoding of the low-end & mid-range 370s. however, the 4341 follow-on would have just about all 370 implemented directly in circuits. so the comparison became 801+software emulating 370 against 370 almost totally native in circuits (as opposed to 801 native in circuits against 370 native in circuits).
but first a little laugh
Date: 10/06/81 16:15:02
To: wheeler
From: SPD HQ
--------------------------------------------------------------
Good day,
-
Some questions.
-
Have you heard anything about a mass defection of guys working
on the 801 architecture or technology from San Jose?
-
Have you ever heard about any implementation of Multics on S/370
architecture?
-
What are you up to? Haven't heard from you in a while.
-
Hope all is well. Let me know if you're still alive.
... snip ... top of post, old email index
Date: 10/06/81 13:22:34
From: wheeler
BW who used to be GPD data base architect, & was manager in Endicott
that had the 801 & RASP stuff went to HP. He is working for a guy that
was director of comp. science at YKT research before he joined HP
about 6-9 months ago. BW has close contacts with some people in Los
Gatos & speculation is that a couple of people there may also be on
their way to HP.
... snip ... top of post, old email index
extract from long ago and far away ...
Date: 11/13/81
To: wheeler
REFERENCE: GR's discussion of 801 in Endicott, 11/13/81
I have followed the definition and discussion of the 801 system for
quite awhile. The referenced discussion presented the 801 in its
latest form. Some new points were addressed but the major thrust and
most of the concepts are unchanged.
801 is a dramatic, all-encompassing approach to system definition and
development. The performance claim of twice to three times the
performance of a comparable S/370 is quite possible. 801 is, in many
ways, a very attractive technical proposal. However, further
assessment should be made during evaluation of the proposal and while
a direction is being chosen for a future system. The full technical
implications of the proposal should be assessed. The business and
marketing aspects and implications of the proposal should also be
assessed.
There are a number of such points. Some are:
- The 801 proposal emphasizes compilers and compiler technology.
- The approach eliminates the interpretative layer of microcode that
exists in most computer systems.
- The software's source language becomes THE interface to the system.
Some of the concepts of "hardware" and "software" are thereby blurred.
- The current concept of a "machine interface" is eliminated.
- How much additional architecture effort should be added to 801 to
define a complete system architecture?
... snip ... top of post, old email index
there was a bunch of ascii art showing different interfaces on different platforms.
from somewhere else:
Date: 11/15/81 20:34:16
From: wheeler
i attended 801 meeting on behalf of endicott while i was there.
Anything but 370 simulator is going to be quite complex for them.
Suggestion was made that I confer with you on possible ideas &
what Endicott can do with 801.
... snip ... top of post, old email index
and from something totally different (from 1979)
Date: 6/19/79 15:36:51
To: wheeler
Howdy Lynn,
Ted K. says you had VAMPS analysis which showed
what VM modules should be microcoded. Do you still have it around ?
(He says they were bar charts.)
If so, how about sending us a copy.
Any opinions on 801 ? Any other opinions in general that
you wish to state ?
Regards,
... snip ... top of post, old email index
misc, collected VAMPS postings
https://www.garlic.com/~lynn/submain.html#bounce
note in following, 8100 used a uc.5 microprocessor, same as in 37xx
telecommunication controller and I believe service processor in
3081. Somewhere along the line, Bob Evans had my wife do technical audit
of 8100 and it was killed not too long after that.
Date: 79/07/11 11:00:03
To: wheeler
i heard a funny story: seems the MIT LISP machine people proposed that
IBM furnish them with an 801 to be the engine for their
prototype. Bob Evans considered their request, and turned them
down.. offered them an 8100 instead! (I hope they told him properly
what they thought of that)
... snip ... top of post, old email index
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: History of project maintenance tools -- what and when? Newsgroups: alt.folklore.computers,alt.os.multics,alt.sys.pdp10 Date: Thu, 27 Mar 2003 15:52:31 GMTdpeschel@eskimo.com (Derek Peschel) writes:
note that this was a "up-date" sequence ... people generated individual update files and system assemble/compile required applying all updates to the base source which created a temporary source file that was actually assembled/compiled.
one of the MIT students working at csc did a program that merged multiple parallel update sequences .... attempting to resolve &/or at least identify conflicts. that was used in the CP/67 version ... but was not carried forward into the VM/370 version. For VM/370, any activity with people generated update files in parallel and the subsequent merge into the common update structure was managed purely manually.
VM/370 did add "aux" files to the update structures .... which contained "PTF" (individual program bug fix update files). Both CP/67 and VM/370 were shipped to customers with binary executables but also full base source files. Starting with VM/370, monthly maintenance "PLC" (program level change) tapes were shipped to all customers. These were cummulative update tapes (until the next full release) .... basically all the binary executables that had incorporated all the fixes on that tape .... plus full set of the individual (program fix) source update files.
customers could build systems from the binaries, or selectively
recompile various source routines, or recompile the whole
system. Because of full source availability there was a tendency at
some installations to have quite a bit of local source changes (which
were also handled by the same source update structure). Some customers
made contributions of their stuff to the "SHARE" library
http://www.share.org/
which was managed by the univ. of waterloo and was commonly referred
to as the waterloo tape.
dating back to at least early OS/360 days (at least early/mid 60s), the company had an official bug reporting and handling system. customer bug reports were given APAR numbers which then frequently translated into PTF numbers ... and there was a whole online system for APAR and PTF information management. The CMS incremental update structure ... could tailor "control" files, so that various update activity reflected the official corporate APAR/PTF structure ... and co-exist with other "control" files that reflected internal development process and customer "control" files that reflected activity going on at a local customer location.
it wasn't impossible that the total size of update files exceeded the base source file.
some past update command discussion.
https://www.garlic.com/~lynn/2001e.html#57 line length (was Re: Babble from "JD" <dyson@jdyson.com>)
https://www.garlic.com/~lynn/2001e.html#71 line length (was Re: Babble from "JD" <dyson@jdyson.com>)
https://www.garlic.com/~lynn/2002n.html#39 CMS update
https://www.garlic.com/~lynn/2002p.html#2 IBM OS source code
https://www.garlic.com/~lynn/2003.html#62 Card Columns
https://www.garlic.com/~lynn/2003b.html#44 filesystem structure, was tape format (long post)
https://www.garlic.com/~lynn/2003e.html#38 editors/termcap
Tymshare (a vm/370-based timesharing service) started providing
online computer conferencing for VM SHARE group in '76. The
archives can be found at:
http://vm.marist.edu/~vmshare/
an update CNTRL file could list any number of update files and/or
"aux" files, which in turn listed some number of update files. The
following reference is a listing of a AUX file referencing four source
update files to the "update" command, followed by the actual update
files:
http://vm.marist.edu/~vmshare/browse.cgi?fn=UPDPACKD&ft=NOTE&args=cntrl#hit
Also at:
https://www.leeandmelindavarian.com/Melinda#VMHist
is tutorial (both "pdf" and "listing" formats) of what started out as
discussion of service strategies ("what your mother never told you
about vm service") which describes the VM/370 (as of '83) in much more
detail (including lots of examples of cntrl files, update command
uses and other parts of the infrastructure). This '83 description
has little structural change from the original cp/67 done some ten
plus years earlier.
some earlier computer conference discussion of same:
http://vm.marist.edu/~vmshare/browse.cgi?fn=SERVICE&ft=MEMO&args=service1#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=SERVICE2&ft=MEMO&args=service1#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=SERVICE3&ft=MEMO&args=service1#hit
starting with
Created on 01/17/81 20:31:19 by $VM
Service Strategies for VM Products
What would your reaction be, if:
- IBM deferred shipment of a new release until the completion of a more
thorough field test program lasting several months,
- IBM distributed service tapes less frequently, and then to disseminate
critical, more thoroughly tested fixes (corrective maintenance could
still be requested from the change teams, of course),
- After some shakedown period of several months, IBM re-shipped the product
with fully integrated, tested service?
I've heard some VM users alleging that the quality of PTFs is declining
and that new software isn't tested sufficiently prior to distribution.
Also, the PUT process is more than some SIPO users can bear (they'd rather
not have to apply any service tapes). The environment I outlined above
would possibly alleviate some of these concerns.
Some of you may have heard of similar approaches being considered for
another SCP. As I understand it, no such strategy is currently being
contemplated for VM. I simply would like to hear your reactions.
Please identify your shop as large or small, and whether you have mods
or the IPO. I'd like to see some particpation in this dialog by some
of the smaller shops in addition to us big guys.
Dave Farnham, Central Intelligence Agency
CREATED 01/17/81 20:31:19 BY $VM
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Pentium 4 - RIP? Newsgroups: comp.arch,alt.folklore.computers Date: Thu, 27 Mar 2003 16:16:58 GMTJoseph Seigh writes:
OI/XI/NI (or immediate, exclusive or immedate, and immedate) which were a "one-byte" combination instructions, fetch, update, & store. os/360 had multiprocessor with 360/65 ... as well as the 360/67 (although there were some differences). The only officially defined consistent for them were test&set (TS).
The standard os/360 kernel for 360/65mp had single spin-lock (w/ts) on the kernel ... so there weren't any race conditions in the kernel and there wasn't a whole lot of people writing multi-threaded applications for 65mp.
Charlie did a lot of work with cp/67 on 360/67mp for fine-grain locking and came up with compare&swap (actually the mnemonic started out with his initials CAS, and then we had to come up with something to match his initials). This was provided on 370 processors. In order to get it justified, we were told by the owners of the 370 architecture that some paradigm had to come up making it useful for uniprocessor operation (since they couldn't justify a multiprocessor only instruction).
That eventually resulted in the programming notes for compare&swap instruction in the 370 principles of operation with examples for application multi-threaded programming that was enabled for interrupts (and had to update values that couldn't be addressed with the immediate instructions.
Now, there was some lore that in the late '70s when MVS was working on doing better job of fine-grain locking ... and therefor opening up various kinds of oi/xi/ni race conditions in the kernel ... that some of the 370 mp models might have to implement them as atomic instructions in order to solve bugs in the mvs kernel support of multiprocessing (although it was probably easier to write an edit macro that went thru all the related MVS kernel source and generated update files that changed all the suspected cases of immediate instructions to macro).
random past smp stuff:
https://www.garlic.com/~lynn/subtopic.html#smp
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Pentium 4 - RIP? Newsgroups: comp.arch Date: Thu, 27 Mar 2003 16:50:12 GMT"del cecchi" writes:
there is the tale of the (internal) crypto modem for use in home and travel access to the internal network. early model was provided to an executive that had EE background. During the testing ... he checked for current by putting his tongue in the rj11 socket ... which happened to ring at that moment. there was then an edict that ALL modems had to have the rj11 socket recessed far enuf so that corporate executives (ok, so they said little kids) couldn't get their tongue in and get shocked ... and you wonder why you have so much trouble getting a rj11 plug out of some modem sockets.
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Gartner Office Information Systems 6/2/89 Newsgroups: alt.folklore.computers Date: Thu, 27 Mar 2003 22:34:33 GMTfrom the past ...
Source: Gartner Office Information Systems 6/2/89 Page 1--
DEC and IBM increased their installed base and market share. PROFS - user population grew by 92% (1987--1.2M/1988--2.3M) - licenses up 41%(2,200 to 3,100) - average number of users/license up(548 to 746) - worldwide sites--2,500(average of 920 users /site) - VM penetration 22% of 14,000 systems. PERSONAL SERVICES/38 - user growth 20%(1987--86K/1988--103K) - licenses up 19%(3,600 to 4,300) - average--24 users/license S/36 - user growth 24%(302K to 374K) - license up 22%(18,000 to 22,000) - average--16 users/license. PS/370 (PS/CICS, PS/TSO) - users up 8%(72,000 to 78,000), - licenses up 8%(over 1,000) - average--108 users/license. AS/400 (estimates) - 144K users - 7,200 licenses, average 20 users/license - AS/400 OFFICE penetration--36% of AS/400 systems.
DEC ALL-IN-1 - user growth up 65%(from 1.7M to 2.8M) - number of systems running ALL-IN-1 grew over 200%(from 12,000 to 37,000); - penetration is 35% of VAX users, 10% of all systems - $500M revenue from ALL-IN-ONE software--leveraging via VAX processors and other layered software an estimated $5B of revenues (nearly half of all DEC revenues for 1988)!!! - Gartner attributes this success to: . introduction of the MICROVAX 3500/3600, . MAILBUS, . NETWORK APPLICATION SUPPORT . the DEC/APPLE alliance . the 6200 VAX Series . growth of VAXCLUSTERS . introduction of ALL-IN-ONE STARTER . uncertainty of IBM direction.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: ARIDUS Newsgroups: alt.folklore.computers Date: Thu, 27 Mar 2003 22:38:12 GMTDuring the second half of 1989, DEC is expected to announce a numberr of processors that will offer performance in the range of current IBM mainframes. The rumored products are:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: GOSIP Newsgroups: alt.folklore.computers Date: Thu, 27 Mar 2003 22:44:22 GMT
Subject: Trip report - FRICC workshop (focus on naming architecture)
on a coordinated OSI transition (Washington 06/14-15, 89)
Note: FRICC (Federal Research Internet Coordinating Committee) oversees
the networks operated by DOD, DOC, and NASA, which consists of
more than 100,000 computer systems.
Objectives:
----------
Overall goal:
- All FRICC systems are going to migrate to OSI eventually. The following
diagram illustrates the move:
TCPIP DECNET IV
| |
| |
(Transition)| V
| DECNET V
| |
V |(Transition)
OSI <------------------------|
- Workshops are held to identify issues, activities and schedules for a
coordinated transition to achieve a single OSI environment that is
interoperable with the current installed base.
Specific goal of this workshop:
- Focus on the specific issues of a coordinated NAMING ARCHITECTURE and
examine DECNet Naming Service (DNANS) as a viable candidate architecture.
- This workshop is a follow-on of the "Internet directory service" workshop
chaired by Dave Clark of MIT. The last workshop recommended X.500 as the
"White pages service".
Major players:
-------------
- 20 people attended the meeting.
- Phill Gross from NRI is the chairman.
- DEC people includes developers, development manager, architect, and
sales reps. They clearly want this business. Dave Oran is the chief
technical spokesman.
- NASA/DOD/DOC folks includes Milo Medin and Dan Hitchcock (DOC).
- Dave Clark and Karen Sollins from MIT.
- Steve Kille (ISO/DE X.500 author).
- Paul Mockapetries (TCPIP Domain Name Server author).
- Debbie Deutsch from BBN.
Summary of meeting:
------------------
- Presentations by NIST people on the X.500 prototype they are working on.
- Presentations by NASA people on their existing DECNET IV network, and
how they plan to migrate to DECNET V.
- Presentations by DEC people on DNANS.
- Interoperability requirements: -- X.500/DNS (naming service)
-- X.500/WHOIS (white pages directory)
-- X.400/SMTP (mail)
-- FTAM/FTP (file transfer)
-- VT/TELNET (remote logon)
- A lot of discussions were on routing in OSI/TCPIP layer 3. The consensus
is a "routing architecture" is needed in addition to the "naming
architecture".
- Gateways are needed for layer 3 (routing) and layer 7 (application).
- Need to architect and manage an "unified namespace" (directory)
and "unified address space" (routing).
- A lot of questions were on the differences between X.500 and DNANS.
Eg. there is no "strong authentication" concept in DNANS.
- Work items to be included in an implementation plan:
-- Define Naming and Address structure. Designate a registry.
-- Define routing architecture.
-- Define application gateways.
-- Define inter-protocol fault isolation and network management.
-- Define deployment plan and timetable. How to "engineer" the
system ? What is the cost ?
- Recommendations to FRICC: 1) Do an OSI implementation plan.
2) Revisit DNANS issues within the context of 1.
Observations:
------------
- DEC was not well prepared to answer the question - how does DNANS
interoperate with X.500 ?
- They hadn't thought out how to implement X.500 on top of DNANS. They
said with a layer of search and schema on top, it "should" work.
- Their technical presentation and questions from the floor reviewed
quite a few subtle problems of DNANS.
- There is no clear idea/strategy on how this transition from existing
base to OSI should work.
--
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: GOSIP Newsgroups: alt.folklore.computers Date: Fri, 28 Mar 2003 02:52:40 GMTandrew@cucumber.demon.co.uk (Andrew Gabriel) writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Security Certifications? Newsgroups: comp.security.misc Date: Fri, 28 Mar 2003 17:05:21 GMT"Pel" writes:
CISSP open study group web site:
http://www.ccure.org/
... oops ...
http://www.cccure.org/
and online quizzer engine:
http://www.losclusterz.com/quiz/quiz.phb
... oops ...
http://www.lostclusterz.com/quiz/quiz.php
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Security Certifications? Newsgroups: comp.security.misc Date: Fri, 28 Mar 2003 17:39:44 GMTAnne & Lynn Wheeler writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: History of project maintenance tools -- what and when? Newsgroups: alt.folklore.computers,alt.os.multics,alt.sys.pdp10 Date: Fri, 28 Mar 2003 20:17:41 GMT"Shmuel (Seymour J.) Metz" writes:
random references to "waterloo tape", or "waterloo vm mods tape" from
vmshare archives (computer conference from vm share committee
... provided by tymshare):
http://vm.marist.edu/~vmshare/browse.cgi?fn=3270WRIT&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=XCOPY&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=WAITECB&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=Z80_XASM&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=XEDIT&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=XCOMPARE&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=XMASGIFT&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=XATOOLS&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=WRITER&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=VTOC&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=VS1ROUT&ft=MEMO&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=TAPE&ft=PROB&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=SVM&ft=PROB&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=SUPERMSG&ft=PROB&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=SPITBOL&ft=PROB&args=waterloo+tape#hit
http://vm.marist.edu/~vmshare/browse.cgi?fn=SNTADDR&ft=PROB&args=waterloo+tape#hit
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: History of project maintenance tools -- what and when? Newsgroups: alt.folklore.computers,alt.os.multics,alt.sys.pdp10 Date: Fri, 28 Mar 2003 21:42:18 GMTAnne & Lynn Wheeler writes:
it makes a good read about sequence/history of open source in the '70s with vm and vm share (waterloo) in general (involving waterloo, Cornell, SLAC, CERN, etc).
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: unix Newsgroups: alt.folklore.computers Date: Sat, 29 Mar 2003 02:29:39 GMTCBFalconer writes:
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From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Microsoft strikes again - from comp.risks Newsgroups: alt.folklore.computers Date: Sat, 29 Mar 2003 02:38:41 GMT"Glen Herrmannsfeldt" writes:
and a whole long recent thread on e-commerce website related stuff:
https://www.garlic.com/~lynn/aadsm13.htm#26 How effective is open source crypto?
https://www.garlic.com/~lynn/aadsm13.htm#27 How effective is open source crypto?
https://www.garlic.com/~lynn/aadsm13.htm#28 How effective is open source crypto? (addenda)
https://www.garlic.com/~lynn/aadsm13.htm#29 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#30 How effective is open source crypto? (aads addenda)
https://www.garlic.com/~lynn/aadsm13.htm#31 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#32 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#33 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#34 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#35 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#36 How effective is open source crypto? (bad form)
https://www.garlic.com/~lynn/aadsm13.htm#37 How effective is open source crypto?
https://www.garlic.com/~lynn/aadsm14.htm#1 Who's afraid of Mallory Wolf?
https://www.garlic.com/~lynn/aadsm14.htm#2 Who's afraid of Mallory Wolf? (addenda)
https://www.garlic.com/~lynn/aadsm14.htm#4 Who's afraid of Mallory Wolf?
https://www.garlic.com/~lynn/aadsm14.htm#5 Who's afraid of Mallory Wolf?
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Anne & Lynn Wheeler | https://www.garlic.com/~lynn/
Internet trivia 20th anv https://www.garlic.com/~lynn/rfcietff.htm
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 801 (was Re: Reviving Multics Newsgroups: alt.os.multics,alt.folklore.computers Date: Sat, 29 Mar 2003 16:33:03 GMTalso recent slightly related discussion in comp.arch on 801:
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Anne & Lynn Wheeler | https://www.garlic.com/~lynn/
Internet trivia 20th anv https://www.garlic.com/~lynn/rfcietff.htm
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: "Super-Cheap" Supercomputing Newsgroups: comp.arch Date: Sun, 30 Mar 2003 22:17:53 GMT"Bill Todd" writes:
Note that a lot of the parallel machine stuff would look at everything. There was somewhat paradigm switch with much larger random access memories containing indexes ... reasonably conditioned data with efficient indexes ... a single processor could find something faster than large parallel search of everything.
luther got his tree instructions into the 390 ... and there were some
custom machines that did some pretty effective and fancy stuff.
https://www.garlic.com/~lynn/98.html#19 S/360 operating systems geneaology
https://www.garlic.com/~lynn/98.html#20 Reviving the OS/360 thread (Questions about OS/360)
https://www.garlic.com/~lynn/2001h.html#73 Most complex instructions
https://www.garlic.com/~lynn/2002.html#14 index searching
https://www.garlic.com/~lynn/2002d.html#18 Mainframers: Take back the light (spotlight, that is)
https://www.garlic.com/~lynn/2002q.html#10 radix sort
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Anne & Lynn Wheeler | https://www.garlic.com/~lynn/
Internet trivia 20th anv https://www.garlic.com/~lynn/rfcietff.htm