List of Archived Posts

2007 Newsgroup Postings (09/15 - 10/06)

The use of "script" for program
what does xp do when system is copying
what does xp do when system is copying
PL/S programming language
what does xp do when system is copying
PL/S programming language
The name "shell"
what does xp do when system is copying
what does xp do when system is copying
CA to IBM product swap
what does xp do when system is copying
what does xp do when system is copying
JES2 or JES3, Which one is older?
IBM Releases Office Desktop Software at No Charge to Foster Collaboration
Newsweek article--baby boomers and computers
U.S. Cedes Top Spot in Global IT Competitiveness
Newsweek article--baby boomers and computers
what does xp do when system is copying
U.S. Cedes Top Spot in Global IT Competitiveness
zH/OS (z/OS on Hercules for personal use only)
64 gig memory
Newsweek article--baby boomers and computers
U.S. Cedes Top Spot in Global IT Competitiveness
Newsweek article--baby boomers and computers
what does xp do when system is copying
Horrid thought about Politics, President Bush, and Democrats
what does xp do when system is copying
Newsweek article--baby boomers and computers
Newsweek article--baby boomers and computers
Newsweek article--baby boomers and computers
Newsweek article--baby boomers and computers
Newsweek article--baby boomers and computers
U.S. Cedes Top Spot in Global IT Competitiveness
what does xp do when system is copying
what does xp do when system is copying
Newsweek article--baby boomers and computers
Writing 23FDs
Writing 23FDs
Newsweek article--baby boomers and computers
India is outsourcing jobs as well
what does xp do when system is copying
what does xp do when system is copying
what does xp do when system is copying
what does xp do when system is copying
what does xp do when system is copying
64 gig memory
India is outsourcing jobs as well
what does xp do when system is copying
Translation of IBM Basic Assembler to C?
what does xp do when system is copying
Newsweek article--baby boomers and computers
Translation of IBM Basic Assembler to C?
The Downside of Shared Services
what does xp do when system is copying
Industry Standard Time To Analyze A Line Of Code
Is Parallel Programming Just Too Hard?
what does xp do when system is copying
Translation of IBM Basic Assembler to C?
what does xp do when system is copying
Translation of IBM Basic Assembler to C?
what does xp do when system is copying
Damn
Damn
Damn
Damn
Translation of IBM Basic Assembler to C?
what does xp do when system is copying
what does xp do when system is copying
Translation of IBM Basic Assembler to C?
GETMAIN/FREEMAIN and virtual storage backing up
GETMAIN/FREEMAIN and virtual storage backing up
Translation of IBM Basic Assembler to C?
A question for the Wheelers - Diagnose instruction
GETMAIN/FREEMAIN and virtual storage backing up
GETMAIN/FREEMAIN and virtual storage backing up

The use of "script" for program

Refed: **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The use of "script" for program
Newsgroups: alt.folklore.computers
Date: Sat, 15 Sep 2007 10:05:01 -0400
jmfbahciv writes:
If it was really load and go, then the linking had already happened; unless there was a single segment and file restriction. The equivalent load and go on a 1620 already had "loaded" FORTRAN compiler into core and you just slapped a jobcard in front of each FORTRAN deck. hmm...It was the human who did the linking when he coded in SPS or machine language.

output of compiler were object/txt deck ... an intermediate machine code representation with lots of other control information "esd", "txt", "rld", etc cards. some old posts describing format
https://www.garlic.com/~lynn/2001.html#8 finding object decks with multiple entry points
https://www.garlic.com/~lynn/2001.html#14 IBM Model Numbers (was: First video terminal?)
https://www.garlic.com/~lynn/2001.html#60 Text (was: Review of Steve McConnell's AFTER THE GOLD RUSH)
https://www.garlic.com/~lynn/2001m.html#45 Commenting style (was: Call for folklore)
https://www.garlic.com/~lynn/2002o.html#26 Relocation, was Re: Early computer games
https://www.garlic.com/~lynn/2006g.html#58 REP cards

linkedit would take object deck as input along with file specifications to library images and possibly other control information combine it together and create a (nearly) executable image and write it out to a file (with some additional control information).

a typical, "3-step" job like fortgclg (fortran g compile, linkedit, and go) would execute the fortran compiler creating an object deck intermediate file output; the intermediate object deck file would then be fed into the linkedit step which would create an executable image, writing it to a new intermediate file, and finally the go step would load and execute the file that was the output of the linkedit step.

lots of library code like fortran or pli language executable libraries were "PDS" (partitioned dataset) file which had the different executable library routines as PDS "member" entries. Each individual PDS "member" executable library routines would have been originally created as the output of some earlier linkedit step. The linkedit process could combine one or more object decks (intermediate compliler/assembler output) with one or more previously "linkedit'ed" executable images to create a new "linkedit'ed" executable image.

"production" applications would tend to be the output of previously (compiled and) "linkedit'ed" program(s) that had been saved. execution of the production application then involved just executing the "go" step (w/o needing to repeat the compile&linkedit steps each time).

The (load&go) "loader" has tended to provide a subset of the linkedit functions with the results just being placed in memory with loader just transferring control directly to the program. Simplified applications (like student fortran programs) might be done in two steps ... the fortran compiler creating an object deck file, followed by executing load&go loader single step.

Waterloo's watfor monitor tended to subsume any efforts to use two-step fortran load&go (for student workloads) ... since it did the fortran compile output directly to in-memory executable image in a single step. recent discussion of monitors here:
https://www.garlic.com/~lynn/2007o.html#73 The name "shell"
other posts in the thread
https://www.garlic.com/~lynn/2007o.html#70 The name "shell"
https://www.garlic.com/~lynn/2007o.html#75 The name "shell"

part of the reason for all this was that in the 60s, operating system elapsed time overhead for a "step" processing could be on the order of 10 seconds, the "overhead" for 3-step job would be on the order of 30 seconds ... independent of any actual program execution. the issue was relatively small real memories and scheduling step overhead was large complex operation that involved huge number of disk accesses (in part because everything had to be managed around getting stuff done within the limited real storage constraint).

for a little drift, this post drifts into work i had done as undergraduate in the 60s involving a lot of optimization work including careful placement of system data on disk to optimize arm disk motion
https://www.garlic.com/~lynn/2007o.html#69 ServerPac Installs and dataset allocations

which achieved a three times speed up in job step elapsed time processing.

Now back to watfor monitor ... basically collapsed 3-step into a single step (going from 30seconds to 10 seconds ... or with my optimization work, going from 10-12 seconds to 3-4 seconds). However, on 360/65, watfor would process student fortran jobs at around 20,000 "cards" per minute ... and a student job was typically around 50 cards (so watfor could process possibly 400 such jobs per minute, nearly 10 jobs per second) watfor monitor not only allowed for collapsing 3-step fortran operation into a single step, but it also "batching" multiple student jobs in a single execution. typical operation might involving "batching" a tray of student jobs (2000-3000 cards, say 40-60 student jobs) in a single execution (rather than 3steps for student job or even a single step per student job, there was a single step for 40-60 student jobs).

of course, the 2540 only read 2000 cards per minute ... so it was useful to have something like "hasp" ... lots of past posts mentioning hasp
https://www.garlic.com/~lynn/submain.html#hasp

... which would handle unit record (reader, printer, punch) processing overlapped with other execution ... it would simulate "psuedo" unit record devices to standard operating system operation ... using disk files to store intermediate unit record images (spooling) and operating the real unit record hardware asynchronously, overlapped with standard system operation.

misc. past posts mentioning watfor
https://www.garlic.com/~lynn/94.html#18 CP/67 & OS MFT14
https://www.garlic.com/~lynn/96.html#9 cics
https://www.garlic.com/~lynn/97.html#22 Pre S/360 IBM Operating Systems?
https://www.garlic.com/~lynn/97.html#28 IA64 Self Virtualizable?
https://www.garlic.com/~lynn/98.html#21 Reviving the OS/360 thread (Questions about OS/360)
https://www.garlic.com/~lynn/99.html#93 MVS vs HASP vs JES (was 2821)
https://www.garlic.com/~lynn/99.html#175 amusing source code comments (was Re: Testing job applicants)
https://www.garlic.com/~lynn/2000.html#55 OS/360 JCL: The DD statement and DCBs
https://www.garlic.com/~lynn/2000d.html#45 Charging for time-share CPU time
https://www.garlic.com/~lynn/2000d.html#46 Charging for time-share CPU time
https://www.garlic.com/~lynn/2001.html#52 Review of Steve McConnell's AFTER THE GOLD RUSH
https://www.garlic.com/~lynn/2001g.html#20 Golden Era of Compilers
https://www.garlic.com/~lynn/2001g.html#22 Golden Era of Compilers
https://www.garlic.com/~lynn/2001h.html#12 checking some myths.
https://www.garlic.com/~lynn/2001i.html#33 Waterloo Interpreters (was Re: RAX (was RE: IBM OS Timeline?))
https://www.garlic.com/~lynn/2002f.html#53 WATFOR's Silver Anniversary
https://www.garlic.com/~lynn/2002f.html#54 WATFOR's Silver Anniversary
https://www.garlic.com/~lynn/2002g.html#1 WATFOR's Silver Anniversary
https://www.garlic.com/~lynn/2002m.html#3 The problem with installable operating systems
https://www.garlic.com/~lynn/2002q.html#29 Collating on the S/360-2540 card reader?
https://www.garlic.com/~lynn/2002q.html#31 Collating on the S/360-2540 card reader?
https://www.garlic.com/~lynn/2003b.html#0 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003c.html#51 HASP assembly: What the heck is an MVT ABEND 422?
https://www.garlic.com/~lynn/2003j.html#26 A Dark Day
https://www.garlic.com/~lynn/2003k.html#48 Who said DAT?
https://www.garlic.com/~lynn/2003l.html#25 IBM Manuals from the 1940's and 1950's
https://www.garlic.com/~lynn/2003m.html#31 SR 15,15 was: IEFBR14 Problems
https://www.garlic.com/~lynn/2004.html#7 Dyadic
https://www.garlic.com/~lynn/2004.html#48 AMD/Linux vs Intel/Microsoft
https://www.garlic.com/~lynn/2004b.html#53 origin of the UNIX dd command
https://www.garlic.com/~lynn/2004c.html#9 TSS/370 binary distribution now available
https://www.garlic.com/~lynn/2004c.html#60 IBM 360 memory
https://www.garlic.com/~lynn/2004c.html#61 IBM 360 memory
https://www.garlic.com/~lynn/2004e.html#51 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#39 spool
https://www.garlic.com/~lynn/2004k.html#41 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004l.html#65 computer industry scenairo before the invention of the PC?
https://www.garlic.com/~lynn/2004n.html#23 Shipwrecks
https://www.garlic.com/~lynn/2004o.html#20 RISCs too close to hardware?
https://www.garlic.com/~lynn/2005c.html#35 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005f.html#41 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005h.html#6 Software for IBM 360/30 (was Re: DOS/360: Forty years)
https://www.garlic.com/~lynn/2005j.html#28 NASA Discovers Space Spies From the 60's
https://www.garlic.com/~lynn/2005m.html#9 IBM's mini computers--lack thereof
https://www.garlic.com/~lynn/2005m.html#16 CPU time and system load
https://www.garlic.com/~lynn/2005q.html#7 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2005r.html#0 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006.html#15 S/360
https://www.garlic.com/~lynn/2006b.html#5 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006e.html#40 transputers again was: The demise of Commodore
https://www.garlic.com/~lynn/2006m.html#30 Old Hashing Routine
https://www.garlic.com/~lynn/2006q.html#32 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2006s.html#22 Why these original FORTRAN quirks?
https://www.garlic.com/~lynn/2007o.html#70 The name "shell"

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sat, 15 Sep 2007 10:26:08 -0400
jmfbahciv writes:
Charlton is confused. Channels are not CPUs. Oh, damnn..has the term CPU changed?

channels are i/o transfer paths ... but there are also channel "programs" that need to be "executed" ... (asynchronous) channel program (execution) control various i/o transfer operations. channel programs are made up of a sequence of CCWs ... or channel command words.

lots of channel execution operation was actually implemented with "cycle" stealing with common processor engine that was also used to execute standard processor instructions.

for instance, 370/158 had (six) integrated channels that was a microcode load that shared execution with the "370" microcode load that ran on a common processor engine.

this was highlighted for the move to 303x processors ... which was partially a hurry up effort to try and get products back into the 370 product pipeline after the hiatus that resulted from the (aborted) future system project
https://www.garlic.com/~lynn/submain.html#futuresys

a 303x "channel director" was created by taking a 370/158 processor engine with only the integrated channel microcode.

a 3031 was then a 370/158 processor engine with just the 370 microcode load paired with a "channel director" (a 370/158 processor engine w/o the 370 microcode load and just the integrated channel microcode load).

a 3032 was a repackage 370/168 paired with one or more 303x channel directors. The 370/158 integrated channel only provide support for up to six channels. to get 16 channel configuration required three 303x channel directors.

a 3033 started out being the 370/168 wiring diagram remapped to faster chip technology. the simple remapping would have resulted in a processor that was twenty percent faster. however, along the remapping path, there were some optimizations introduced which eventually resulted in the 3033 being about fifty percent faster than 370/168. a 3033 with sixteen channels would have three 303x channel directors (three 370/158 processor engines with only the integrated channel microcode load).

current description of channel programming
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/15.6?SHELF=DZ9ZBK03&DT=20040504121320

misc. past posts mentioning 303x channel director
https://www.garlic.com/~lynn/97.html#20 Why Mainframes?
https://www.garlic.com/~lynn/98.html#23 Fear of Multiprocessing?
https://www.garlic.com/~lynn/99.html#7 IBM S/360
https://www.garlic.com/~lynn/99.html#176 S/360 history
https://www.garlic.com/~lynn/99.html#187 Merced Processor Support at it again
https://www.garlic.com/~lynn/2000.html#78 Mainframe operating systems
https://www.garlic.com/~lynn/2000c.html#69 Does the word "mainframe" still have a meaning?
https://www.garlic.com/~lynn/2000d.html#7 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#11 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#12 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#21 S/360 development burnout?
https://www.garlic.com/~lynn/2000g.html#11 360/370 instruction cycle time
https://www.garlic.com/~lynn/2001b.html#83 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2001c.html#3 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2001c.html#6 OS/360 (was LINUS for S/390)
https://www.garlic.com/~lynn/2001i.html#34 IBM OS Timeline?
https://www.garlic.com/~lynn/2001j.html#3 YKYGOW...
https://www.garlic.com/~lynn/2001j.html#14 Parity - why even or odd (was Re: Load Locked (was: IA64 running out of steam))
https://www.garlic.com/~lynn/2001l.html#24 mainframe question
https://www.garlic.com/~lynn/2001l.html#32 mainframe question
https://www.garlic.com/~lynn/2002.html#36 a.f.c history checkup... (was What specifications will the standard year 2001 PC have?)
https://www.garlic.com/~lynn/2002.html#48 Microcode?
https://www.garlic.com/~lynn/2002d.html#7 IBM Mainframe at home
https://www.garlic.com/~lynn/2002f.html#8 Is AMD doing an Intel?
https://www.garlic.com/~lynn/2002i.html#19 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002i.html#21 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002i.html#23 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
https://www.garlic.com/~lynn/2002p.html#59 AMP vs SMP
https://www.garlic.com/~lynn/2003.html#39 Flex Question
https://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
https://www.garlic.com/~lynn/2003g.html#32 One Processor is bad?
https://www.garlic.com/~lynn/2003m.html#31 SR 15,15 was: IEFBR14 Problems
https://www.garlic.com/~lynn/2004.html#8 virtual-machine theory
https://www.garlic.com/~lynn/2004.html#9 Dyadic
https://www.garlic.com/~lynn/2004.html#10 Dyadic
https://www.garlic.com/~lynn/2004.html#25 40th anniversary of IBM System/360 on 7 Apr 2004
https://www.garlic.com/~lynn/2004d.html#12 real multi-tasking, multi-programming
https://www.garlic.com/~lynn/2004e.html#51 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004f.html#21 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#17 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#50 Chained I/O's
https://www.garlic.com/~lynn/2004m.html#17 mainframe and microprocessor
https://www.garlic.com/~lynn/2004n.html#14 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2004o.html#7 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005b.html#26 CAS and LL/SC
https://www.garlic.com/~lynn/2005d.html#62 Misuse of word "microcode"
https://www.garlic.com/~lynn/2005e.html#59 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005f.html#41 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005h.html#40 Software for IBM 360/30
https://www.garlic.com/~lynn/2005m.html#25 IBM's mini computers--lack thereof
https://www.garlic.com/~lynn/2005p.html#1 Intel engineer discusses their dual-core design
https://www.garlic.com/~lynn/2005q.html#30 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2005s.html#22 MVCIN instruction
https://www.garlic.com/~lynn/2006m.html#27 Old Hashing Routine
https://www.garlic.com/~lynn/2006n.html#16 On the 370/165 and the 360/85
https://www.garlic.com/~lynn/2006o.html#27 oops
https://www.garlic.com/~lynn/2006q.html#31 VAXen with switchmode power supplies?
https://www.garlic.com/~lynn/2006r.html#34 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006r.html#40 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006s.html#40 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006s.html#42 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006t.html#19 old vm370 mitre benchmark
https://www.garlic.com/~lynn/2007b.html#18 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#21 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#62 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#32 I/O in Emulated Mainframes
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#65 History - Early Green Card
https://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#23 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#57 IBM to the PCM market(the sky is falling!!!the sky is falling!!)
https://www.garlic.com/~lynn/2007h.html#1 21st Century ISA goals?
https://www.garlic.com/~lynn/2007i.html#31 Latest Principles of Operation
https://www.garlic.com/~lynn/2007j.html#29 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007k.html#39 VLIW pre-history
https://www.garlic.com/~lynn/2007n.html#31 IBM obsoleting mainframe hardware

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sun, 16 Sep 2007 09:00:16 -0400
Quadibloc <jsavard@ecn.ab.ca> writes:
Well, the example Peter Flass is giving is a valid one. On the System/ 360 Model 30, the operating system included subroutines that mimicked the operation of channels on the larger models for purposes of software compatibility. So the CPU did the actual work, but a copy of the same operating system could still be used, with just another software layer, instead of changing the routines that sent commands to the channels.

previous post in this thread:
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying

maybe you are thinking of a lower-end 360 model. 360m30 implementing standard 360 principles of operation ... but like most other 360s in microcode ... much of it using same processor that executed 360 instruction set microcode.

my first student programming job was porting 1401 mpio to 360/30. the univerisity had a 709 running ibsys with 1401 doing unit record front end (cardreader to tape, tape to printer/punch) ... operator manually transferred tapes between 1401 and 709.

as part of getting ready to replace 709 with 360/67, the 1401 was replaced with 360/30 (and the 1401 unit record gear was hooked up to 360/30). the 360/30 could be run in 1401 hardware emulation mode (switch on the front panel that switch from 360 instruction microcode to 1401 instruction microcode). i got hired to do an implementation of mpio in 360 ... simulating all the functions that the 1401 was doing for the backend 709.

i eventually had 2000 card program ... with assembler directives that allowed it to be assembled for running under os/360 ... using operating system calls for i/o operations ... "DCB" macros, etc.

The assembler mode was for running "stand-alone" ... i got to design and implement my own interrupt handlers, device drivers, storage management, scheduling, etc ... effectively my own monitor. I slap a BPS (card) "loader" on the front of the (stand-alone) object/text deck output from the assembler. slight topic drift, recent post mentioning (360) object/text decks (including ptrs to format description of cards)
https://www.garlic.com/~lynn/2007p.html#0 The use of "script" for program

in "stand-alone" mode there were no other (360) instructions anywhere in the machine except the code i had written ... and i had programmed to standard 360 low-level hardware i/o interface as specified in 360 principles of operation, including sio instruction and CCW channel programs.

The channel implementation differences in standard 360 models was whether or not the channel implementation was "integrated" (i.e. the microcode implementing channel function ran on the same engine that ran the microcode implementing 360 insturctions) or implemented in a separate hardware box.

The previous discussion of the 370/158 and 3031
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying

was that the 370/158 had integrated channels ... i.e. the same processor engine ran both the 370 channel microcode and the 370 instruction microcode. for 303x, they used two separate (identical) engines ... one dedicated to running the 370/158 integrated channel microcode and one dedicated to running the 370/158 instruction microcode.

misc. past posts mentioning my first programming job implementing port of 1401 mpio to 360/30:
https://www.garlic.com/~lynn/93.html#15 unit record & other controllers
https://www.garlic.com/~lynn/93.html#17 unit record & other controllers
https://www.garlic.com/~lynn/93.html#23 MTS & LLMPS?
https://www.garlic.com/~lynn/94.html#53 How Do the Old Mainframes
https://www.garlic.com/~lynn/95.html#4 1401 overlap instructions
https://www.garlic.com/~lynn/97.html#21 IBM 1401's claim to fame
https://www.garlic.com/~lynn/98.html#9 ** Old Vintage Operating Systems **
https://www.garlic.com/~lynn/99.html#59 Living legends
https://www.garlic.com/~lynn/99.html#130 early hardware
https://www.garlic.com/~lynn/2000.html#79 Mainframe operating systems
https://www.garlic.com/~lynn/2000c.html#11 IBM 1460
https://www.garlic.com/~lynn/2000d.html#34 Assembly language formatting on IBM systems
https://www.garlic.com/~lynn/2001.html#11 IBM 1142 reader/punch (Re: First video terminal?)
https://www.garlic.com/~lynn/2001b.html#22 HELP
https://www.garlic.com/~lynn/2001k.html#31 Is anybody out there still writting BAL 370.
https://www.garlic.com/~lynn/2002b.html#13 Infiniband's impact was Re: Intel's 64-bit strategy
https://www.garlic.com/~lynn/2002b.html#15 Infiniband's impact was Re: Intel's 64-bit strategy
https://www.garlic.com/~lynn/2002f.html#47 How Long have you worked with MF's ? (poll)
https://www.garlic.com/~lynn/2002f.html#48 How Long have you worked with MF's ? (poll)
https://www.garlic.com/~lynn/2002m.html#3 The problem with installable operating systems
https://www.garlic.com/~lynn/2003h.html#30 Hardware support of "new" instructions
https://www.garlic.com/~lynn/2003i.html#8 A Dark Day
https://www.garlic.com/~lynn/2003i.html#51 Oldest running software
https://www.garlic.com/~lynn/2003n.html#41 When nerds were nerds
https://www.garlic.com/~lynn/2004d.html#10 IBM 360 memory
https://www.garlic.com/~lynn/2004f.html#49 can a program be run withour main memory?
https://www.garlic.com/~lynn/2004g.html#39 spool
https://www.garlic.com/~lynn/2004k.html#40 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004q.html#66 Will multicore CPUs have identical cores?
https://www.garlic.com/~lynn/2005g.html#52 Software for IBM 360/30
https://www.garlic.com/~lynn/2005n.html#3 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005q.html#7 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2006b.html#2 Mount a tape
https://www.garlic.com/~lynn/2006g.html#43 Binder REP Cards (Was: What's the linkage editor really wants?)
https://www.garlic.com/~lynn/2006l.html#64 Large Computer Rescue
https://www.garlic.com/~lynn/2006n.html#1 The System/360 Model 20 Wasn't As Bad As All That
https://www.garlic.com/~lynn/2006s.html#38 Design life of S/360 components?
https://www.garlic.com/~lynn/2006w.html#31 Decimal FP
https://www.garlic.com/~lynn/2007d.html#51 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007h.html#52 ANN: Microsoft goes Open Source
https://www.garlic.com/~lynn/2007m.html#73 Operating systems are old and busted
https://www.garlic.com/~lynn/2007n.html#59 IBM System/360 DOS still going strong as Z/VSE

PL/S programming language

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: PL/S programming language
Newsgroups: comp.lang.asm370,alt.folklore.computers
Date: Sun, 16 Sep 2007 09:12:10 -0400
someone writes:
Many years ago, about 1974. I read a book on PL/S that was in the University Library. If you have access to a University Library you might try searching there. This PL/S was a PL/1 style of language. And it was designed to write system software. As I remember the publisher would also sell you a PL/S compiler written in PL/S. I don't know if this is the same PL/S or not.

old email mentioning some pl/s support issues in conjunction with (original relational/sql) system/r implementation:
https://www.garlic.com/~lynn/2007d.html#email800920

misc. past posts mentioning system/r
https://www.garlic.com/~lynn/submain.html#systemr

which mentions that the pls had been created in the late sixties but that the group had been disbanded in the early days of FS ... aka the "future system" project was going to be a totally new machine architecture ... as radically different from 360 as 360 had been different from earlier machines. past posts mentioning FS
https://www.garlic.com/~lynn/submain.html#futuresys

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sun, 16 Sep 2007 09:45:11 -0400
jmfbahciv writes:
Which ones? ARe you talking about TTYs? It was nature of the beastie that each and every character be examined but only for certain kinds of uses. A 2741 TTY took in a block of characters and then shipped them to the CPU for processing.

posts in this thread:
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#2 what does xp do when system is copying

standard 360 had main processor, channels, control units, and devices. common for channels and even some control units had "integrated" implementations.

standard "telecommunciation" control unit was 2702 (handled telecommuncation lines ... i.e. things that had terminals at the end).

bit issue in 360 era was that memory/storage was scarce and expensive ... so the processors main memory was used for just about everything (since there was little of it available elsewhere) ... this would result in some amount of memory bus contention between device i/o and processor operation ... since i/o was constantly having to access memory for read/write (and little or no intermediate buffering existed).

the scenario with the 2702 telecommunication controller was that it didn't raise an interrupt to the processor until transfer was complete .... but characters appeared in main processor memory as they arrived since there was little or no place for intermediate storage.

when the univeristy got a copy of cp67 (installed last week jan68) for their 360/67 ... i got to play with it quite a bit. standard cp67 had terminal support for 2741 and 1052 ... but the university had some number off TTY/ascii terminals ... so one of my tasks was to add TTY/ascii support to cp67. the base cp67 terminal support implementation did some hacks to automatically recognize terminal type (w/o requiring it to be preconfigured as part of system definition). Using that as a model, i attempted to integrate TTY/ascii support in such a way that cp67 could dynamically recognize whether a terminal was 2741, 1052 or TTY. This sort of worked ... except for a small implementation restriction in the 2702 controller.

Somewhat as a result of that implementation restriction ... the university started a project to build a 2702 clone ... that had more feature/function. some past posts mentioning the effort
https://www.garlic.com/~lynn/submain.html#360pcm

where four of us got written up as responsible for starting the 360 clone control effort.

the project involved taking an interdata/3, building a channel interface card for the box ... and writing software to emulate 2702 operation. part of the emulation added dynamic baud rate recognition.

shooting two implementation "bugs" stick in my mind

• causing the 360/67 to red-light. 360 had timer in main storage at location 80. operation was defined that time hardware had to obtain the memory bus and update location 80 on every timer "tic". if the timer "tic'ed" again before the memory bus had been obtained to update location 80 for previous "tic", then it would raise a hardware failure mode (new "tic" before previous pending loc. 80 update happened). controllers raised a signal to the channel for data transfer and the channel would obtain the memory bus for the transfer. the controller had to periodically signal the channel that transfer was stopped/suspended (release memory bus for the moment). 360/67 had high resolution timer operation so the timer tic'ed in its "low" position at approx. every 13microseconds. that met that no controller could hold the data transfer for more than 13microseconds (worst case where it had raised data transfer just prior to timer tic update and didn't drop data transfer before the next timer tic occurred).

• 2702 line driver port interface would place first arriving character bit in low-order bit position ... with the last arriving character bit in the high-order bit position. as each byte was acquired, it would then be transferred to main processor memory. standard ascii transmittion convention was that first arriving character bit went into high-order bit position (reverse of ibm terminal transmission convention). as a result, terminal "ascii" appeared in mainframe memory in bit-reversed order. the ibm terminal "translate" tables then would handle the conversion to/from ebcdic and "bit-reversed" ascii. earlier test of the (interdata/3) 2702 clone appeared to be placing total garbage in mainframe memory ... until it was recognized that interdata/3 implementation wasn't doing the bit-reversed convention ... and bits in memory was appearing as non-bit-reversed ... which then became garbage after translation to ebcdic (having used standard ascii bit-reversed translate table)

PL/S programming language

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: PL/S programming language
Newsgroups: comp.lang.asm370,alt.folklore.computers
Date: Sun, 16 Sep 2007 13:22:25 -0400
re:
https://www.garlic.com/~lynn/2007p.html#3 PL/S programming language

a little low-level 360 assembler/machine programming x-over thread
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#2 what does xp do when system is copying

and mentioning effort to do early tty/ascii terminal driver
https://www.garlic.com/~lynn/2007p.html#4 what does xp do when system is copying

and because of shortcuts in the 2702 controller implementation, contributed to the university doing a clone controller project ... and subsequent write-up blaming some of us for clone controller market
https://www.garlic.com/~lynn/submain.html#360pcm

and in past posts about future system effort
https://www.garlic.com/~lynn/submain.html#futuresys

some posts with quote attributing major motivation behind future system effort were the clone controllers:
https://www.garlic.com/~lynn/2000f.html#16 [OT] FS - IBM Future System
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
https://www.garlic.com/~lynn/2005p.html#15 DUMP Datasets and SMS
https://www.garlic.com/~lynn/2005s.html#16 Is a Hurricane about to hit IBM ?
https://www.garlic.com/~lynn/2006.html#7 EREP , sense ... manual
https://www.garlic.com/~lynn/2006d.html#15 Hercules 3.04 announcement
https://www.garlic.com/~lynn/2006p.html#50 what's the difference between LF(Line Fee) and NL (New line) ?
https://www.garlic.com/~lynn/2006r.html#36 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006w.html#2 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007l.html#10 John W. Backus, 82, Fortran developer, dies

this possibly contributed to my subsequent career difficulties at the corporation ... although during the peak of FS activity it didn't help drawing parallels between the future system effort and a cult film playing down in central sq.

also, the subsequent derth of products in 370 hardware and software product pipelines (because of the future system direction) ... also contributed to providing openings/opportunities for clone processors (and when future system effort was eventually killed, crash efforts attempting to get software and hardware products back into the 370 product pipelines)

The name "shell"

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The name "shell"
Newsgroups: alt.folklore.computers,alt.os.multics
Date: Sun, 16 Sep 2007 17:55:31 -0400
pechter@pechter.dyndns.org (William Pechter) writes:
Looked pretty good at the 8650 clusters I saw in about '86 or '87.

Not IBM Mainframe caliber but it seemed to do ok with reasoably well configured hardware.


an old email with marketing comment from the period not considering vax even targeted at commercial dataprocessing until 8800 with the (final) introduction of symmetrical multiprocessing
https://www.garlic.com/~lynn/2007.html#email880329

in this post
https://www.garlic.com/~lynn/2007.html#46 How many 36-bit Unix ports in the old days?

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sun, 16 Sep 2007 19:24:40 -0400
Anne & Lynn Wheeler <lynn@garlic.com> writes:
in "stand-alone" mode there were no other (360) instructions anywhere in the machine except the code i had written ... and i had programmed to standard 360 low-level hardware i/o interface as specified in 360 principles of operation, including sio instruction and CCW channel programs.

re:
https://www.garlic.com/~lynn/2007p.html#2 what does xp do when system is copying

different topic drift from above mentioned 40+ yr old programming activity ....

How Computers Transformed Baby Boomers - Baby Boomers At 60
http://www.msnbc.msn.com/id/20789352/site/newsweek/

... from above
Power to the People; Computers once filled entire rooms. Now they fit in our pockets. How a generation formed our tech landscape.

... snip ...

How Computers Transformed Baby Boomers
http://slashdot.org/articles/07/09/16/1742259.shtml

from above ...
Levy cites two texts as crucial in pushing the boomers' vision toward power-to-the-people computing — Ted Nelson's Computer Lib/Dream Machines, which inspired Mitch Kapor, and the January 1975 Popular Electronics, which got Bill Gates jazzed. You kids might want to check out Dad's bookshelf — used copies of Computer Lib are going for $130-$225 at Amazon.

... snip ...

previous posts with mention/reference ted and/or xanadu
https://www.garlic.com/~lynn/2000g.html#26 Who Owns the HyperLink?
https://www.garlic.com/~lynn/2002o.html#45 XML, AI, Cyc, psych, and literature
https://www.garlic.com/~lynn/2002o.html#47 XML, AI, Cyc, psych, and literature
https://www.garlic.com/~lynn/2003j.html#59 Ted Nelson, of Project Xanadu
https://www.garlic.com/~lynn/2005s.html#12 Flat Query
https://www.garlic.com/~lynn/2007l.html#66 BAH's Point of View

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Mon, 17 Sep 2007 09:46:47 -0400
jmfbahciv writes:
That was essentially an emulation for future compatibility (instead of backwards compatibility). Actually from what Lynn has said, IBM did parallel software development without keeping the product lines separated. Perhaps that is necessary for creating big moby data processing systems..I don't know. I sure as hell wouldn't have been able to figure out IBMs production lines (or should I have said, work flows) for creating the products they sold.

re:
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#2 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#4 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#7 what does xp do when system is copying

most of 360s used hardware emulation ... i.e. processor engine of one kind or another ... with microcode to emulate target architecture .... both for channel function as well as for doing 360 instructions. with the heavy use of microcode emulation ... many 360s also provided hardware emulation of prior generation of machines, 14xx, 70xx, etc.

one issue was well defined (and enforced) interface/architecture specification; like 360 principles of operation.

"integrated" channels (where the microcode for channel emulation "time-shared" the processor engine with the micrcode for 360 instruction architecture) was common.

one of the issues was the large proliferation of different (internal) microprocessor for engines ... (in processors, control units, devices). this led to first big push for using 801/risc in the early 80s ... replace large percentage of the different variety of microprocessors with processors that shared common 801/risc architecture ... somewhat alleviated large microcode/softwaree development effort every time a new microprocessor was created and deployed. misc. past posts mentioning 801, risc, fort knox, romp, rios, pc/rt, rs/6000, power/pc, somerset, etc
https://www.garlic.com/~lynn/subtopic.html#801

another issue that i've mentioned before was testimony attributed to one of the bunch in the gov. anti-trust action against the corporation. this supposedly was that in the late 50s, all the computer vendors realized that the single most important factor for succes in the computer business was having a single architecture across the complete product line (this possibly could be attributed to the growing uptake of computerized operation ... corporate thruput requirements quickly outgrowing installed/existing system). supposedly the testimony observed was that ibm management was the only one that was able to successfully enforce the common dictate (all the other vendors found their independent product lines doing local optimization). one of the issues could be the order of magnitude "penalty" for most of the microcode implementations ... for the vertical microcode operations there was typically a ten-to-one instruction ratio aka number of microcode instructions executed per 360 instruction. The net was that the base microcode engine needed to be ten times faster than the delivered 360 instruction thruput. This has been recently observed in the mainframe simulators available on i86 platforms.
https://www.garlic.com/~lynn/94.html#44 bloat
https://www.garlic.com/~lynn/96.html#20 1401 series emulation still running?
https://www.garlic.com/~lynn/99.html#231 Why couldn't others compete against IBM?
https://www.garlic.com/~lynn/2001j.html#33 Big black helicopters
https://www.garlic.com/~lynn/2001j.html#38 Big black helicopters
https://www.garlic.com/~lynn/2001j.html#39 Big black helicopters
https://www.garlic.com/~lynn/2001n.html#85 The demise of compaq
https://www.garlic.com/~lynn/2002c.html#0 Did Intel Bite Off More Than It Can Chew?
https://www.garlic.com/~lynn/2003o.html#43 Computer folklore - forecasting Sputnik's orbit with
https://www.garlic.com/~lynn/2005k.html#0 IBM/Watson autobiography--thoughts on?
https://www.garlic.com/~lynn/2005k.html#4 IBM/Watson autobiography--thoughts on?
https://www.garlic.com/~lynn/2006q.html#60 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2007f.html#77 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007g.html#42 1960s: IBM mgmt mistrust of SLT for ICs?
https://www.garlic.com/~lynn/2007m.html#34 IBM 8000 ???

another related scenario where we saw the 10:1 ratio was in the migration of kernel function to microcode with ECPS effort (kernel microcode "assist" where sequences of high-use kernel instructions were moved into microcode achieving a ten-to-one speedup). past post describing ECPS activity:
https://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#27 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#28 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/2003f.html#43 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003f.html#47 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003f.html#52 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003f.html#54 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003f.html#56 ECPS:VM DISPx instructions

CA to IBM product swap

Refed: **, - **, - **, - **, - **, - **
From: lynn@GARLIC.COM (Anne & Lynn Wheeler)
Subject: Re: CA to IBM product swap
Newsgroups: bit.listserv.ibm-main
Date: 17 Sep 2007 08:58:27 -0700
mark.zelden@ZURICHNA.COM (Mark Zelden) writes:
Then you switch back. ;-) There are actually a lot of companies that seem to work that way. That's what happens when bean counters make the decisions and don't consider the human aspects (time, training etc.)

this is related to the original justification for 360 product line with common architecture across the product line ... recent post mentioning supposed testimony in the gov. anti-trust case by one of the bunch
https://www.garlic.com/~lynn/2007p.html#8 what does xp do when system is copying

i.e. compatible product line minimized having to redo applications every time customer upgraded/changed processor ... people resources and elapsed time for conversion was starting to dominate considerations

this was also touched on by a talk Amdahl gave at mit in the early 70s when asked about what justification was used getting funding for his clone processor company ... even if ibm were to completely walk away from 360, customers already had something like $200B invested in software applications, which would support clone processor business through at least the end of the century.

and the "walk away from 360" could possibly considered a veiled reference to future system project
https://www.garlic.com/~lynn/submain.html#futuresys

which would have been as different from 360 as 360 had been different from earlier machines ... recent posts
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#3 PL/S programming language
https://www.garlic.com/~lynn/2007p.html#5 PL/S programming language

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Mon, 17 Sep 2007 12:09:34 -0400
Steve O'Hara-Smith <steveo@eircom.net> writes:
No ... but ... the memory bandwidth used by the peripheral does eat into the memory bandwidth available to the CPU. For something like a disc where the memory bandwidth usage will average out at perhaps 10-50 MBytes/sec this is not a serious impact in the 3-4GByte/sec available memory bandwidth, even when it bursts at 300MByte/sec it's not a real problem. A 10Gbit/sec ethernet device OTOH does eat a significant chunk out of the memory bandwidth if it gets to go flat out and routing four of them is a real challenge. Of course CPU caches tend to help prevent this having too much impact and the CPU is more likely to be idling because there's nothing to do than because the data can't get to it.

360/65 (360/67) had interleaved memory ... which somewhat helped ... but had a common memory port for processor and channels (for i/o operations) ... compared to current machines there wasn't processor caches ... so everything processor did involved memory bus and heavy i/o workload could significantly affect processor thuput.

360/67 multiprocessor was unique (for 360 multiprocessor machines) because it had multiported memory bus ... minimizing contention between different processors and i/o operation. however, the multiported interface increased the memory cycle time by 10-15 percent (from 750ns per 8bytes). nominally that would mean that a 360/67 "half-duplex" (aka multiprocessor with only a single processor installed) would be slower than a 360/67 (single processor machine) because of the increased memory cycle time (introduced by multi-ported memory). however, in a heavy i/o workload, a 360/67 "half-duplex" could have higher thruput than a 360/67 simplex ... because of the reduced memory bus contention (between processor and channel i/o).

other posts in this thread:
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#2 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#4 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#7 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#8 what does xp do when system is copying

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Wed, 19 Sep 2007 10:06:21 -0400
jmfbahciv writes:
Not knowing how hardware works inside, would you call the time a PDP-10 was executing a BLT (block transfer instruction) idle?

physical memory packaging for 3090 had an issue ... not being able to get as much memory (as they wanted) configured within spec'ed bus transfer latency/distance. they came up with expanded storage ... as a kind of an electronic page storage. it had a wider bus with higher latency (that could be placed physically farther from the processor) and synchronous instructions were used to transfer 4k pages between expanded storage and processor memory (under software control). part of the issue was that pathlength supporting any asynchronous i/o paradigm was much greater than the cycles consumed by synchronous transfer instructions.

later when they were attempting to add hippi i/o support to 3090 ... the only interface with high enuf transfer rate (100mbyte/sec) was the expanded storage bus. the "problem" was that it didn't support the traditional channel program interface ... as a result they had to create reserved addresses within the expanded storage that were basically used for peek/poke operations (using the expanded storage synchronous 4k transfer instructions).

later generations of memory packaging and buses were able to configure all the desired memory as straight processor memory. however, there were periodic claims that there could be better thruput if system could be configured where expanded storage was simulated with regular memory. from a purely theoritical standpoint having all memory as directly addressable is more efficient that splitting (standard) memory into what can be used for directly addressable with standard instruction execution ... and part that purely emulated paging storage (aka because of the overhead because of page fault rates and moving pages back and forth between the two types of storage).

the possible caveate involves some sort of deficiency in the page replacement algorithm not being able to efficiently manage larger storage space ... a smaller storage space and increased page fault rates ... means that the page replacement algorithm is invoked more frequently and could contribute to better replacement choices (than would otherwise be the case). A better page replacement algorithm managing all of storage as single entity should always outperform any replacement algorithm requiring explicitly partitioned storage. misc. past posts about page replacement algorithms
https://www.garlic.com/~lynn/subtopic.html#wsclock

slightly related is some recent discussions about how some systems may do relatively static partitioning of processor storage into regular program pages and file caching pages.

lots of past posts mentioning 3090 expanded storage:
https://www.garlic.com/~lynn/2000c.html#61 TF-1
https://www.garlic.com/~lynn/2001k.html#73 Expanded Storage?
https://www.garlic.com/~lynn/2001k.html#74 Expanded Storage?
https://www.garlic.com/~lynn/2002e.html#8 What are some impressive page rates?
https://www.garlic.com/~lynn/2004e.html#2 Expanded Storage
https://www.garlic.com/~lynn/2004e.html#3 Expanded Storage
https://www.garlic.com/~lynn/2004e.html#4 Expanded Storage
https://www.garlic.com/~lynn/2006.html#13 VM maclib reference
https://www.garlic.com/~lynn/2006b.html#14 Expanded Storage
https://www.garlic.com/~lynn/2006b.html#15 Expanded Storage
https://www.garlic.com/~lynn/2006b.html#16 Expanded Storage
https://www.garlic.com/~lynn/2006b.html#17 Expanded Storage
https://www.garlic.com/~lynn/2006b.html#18 Expanded Storage
https://www.garlic.com/~lynn/2006b.html#34 Multiple address spaces
https://www.garlic.com/~lynn/2006c.html#1 Multiple address spaces
https://www.garlic.com/~lynn/2006r.html#35 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006r.html#42 REAL memory column in SDSF
https://www.garlic.com/~lynn/2007o.html#26 Tom's Hdw review of SSDs
https://www.garlic.com/~lynn/2007o.html#48 Virtual Storage implementation

JES2 or JES3, Which one is older?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: lynn@ibm-main.lst (Anne & Lynn Wheeler)
Subject: Re: JES2 or JES3, Which one is older?
Newsgroups: bit.listserv.ibm-main
Date: 19 Sep 2007 11:19:04 -0700
mainframe_cool@ibm-main.lst (Vijay Kumar) writes:
I am a new comer in the mainframe field. I am learning this technology from an institute in Singapore.

I have searched the net and not able to find which of the Jes version was introduced first JES2 or JES3. I know Jes2 was evolved after HASP and Jes3 was after ASP.

Could anyone please let me know the specific dates or year in which these two job entry subsystems were introduced.

Waiting for your response.


my wife did a stint in the g'burg jes group ... after hasp responsibility was moved to g'burg and renamed jes2 ... this was before getting con'ed into going to pok to be responsible for loosely-coupled architecture ... misc. past posts about creating peer-coupled shared data architecture ... which didn't see a lot of uptake (except for ims hot standby) until sysplex. misc. past posts
https://www.garlic.com/~lynn/submain.html#shareddata

one of her tasks in the jes group was "catcher" for asp ... as part of turning it into jes3 (aka the group for jes2 was already in existence before work on asp->jes3). her work included (co-)writing a plm for jes3. she also did a design for combined product with the best features of both products ... which didn't get very far because of strong opinions from the two (jes2 & jes3) camps.

for some topic drift ... recent post in another thread
https://www.garlic.com/~lynn/2007o.html#72 FICON tape drive?

mentioning she had earlier co-authored AWP39, peer-to-peer networking .. in the early days of SNA (only in ibm was it necessary to qualify networking as peer-to-peer ... since that is the standard definition, however, SNA had co-opted the word to apply to their, non-networking, communication infrastructure)

for other topic drift misc past posts mentioning hasp, jes2, and/or jes2 networking
https://www.garlic.com/~lynn/submain.html#hasp

IBM Releases Office Desktop Software at No Charge to Foster Collaboration

Refed: **, - **, - **, - **
From: lynn@ibm-main.lst (Anne & Lynn Wheeler)
Subject: Re: IBM Releases Office Desktop Software at No Charge to Foster Collaboration  and Innovation
Newsgroups: bit.listserv.ibm-main
Date: 20 Sep 2007 07:09:54 -0700
Knutson, Sam wrote:
We are a large IMS DC/DB shop and CICS DB2/IMS DBCTL. IMS is still an order of magnitude more efficient than DB2. That is not saying anything bad about DB2 it is designed for more flexible data manipulation and easier development by offloading more business and data handling logic into the DBMS. DB2 is a relational database and IMS a hierarchical one though IMS appears to be geared up to take on some new abilities soon with V10.

IMS is wickedly efficient ask some of the large banking and delivery concerns that still use it to process large transactions volumes.


some of this was part of the discourse between the IMS group and the system/r group in 70s ... i.e. originally relational/sql implementation
https://www.garlic.com/~lynn/submain.html#systemr

there was then technology transfer from sjr to endicott for sql/ds ... and one of the people listed at this meeting claimed to have handled a lot of the technology transfer from endicott to stl for DB2
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/96.html#15

an old email with IMS & relational reference:
https://www.garlic.com/~lynn/2007.html#email801016

in this post
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"

in the discussion between the two groups ... the IMS claim was that ims was significantly more efficient between it had direct pointers .. while relational abstracted away the pointers with an implicit index. The implicit index (under the covers) tended to double the amount of disk space required and significantly increased the number of disk access to reach the desired record. the relational counter argument was that it significantly reduced the people/manual effort required to manage the effort.

the transition in the 80s was that the economics for disk space significantly changed ... mitigating the disk space issue and the significant increase in system real storage sizes allowed much of the relational infrastructure information to be cached .. cutting down on the physical disk operations required. at the same time there was changes in people cost vis-a-vis hardware costs .. allowing some lower value uses to become practical (hardware costs dropped below some threshold along with elimination of some amount of manual/people effort).

other posts discussing the theme of changes in system configurations and relative costs between the 60s and the 80s and its effect on dbms implementation trade-offs:
https://www.garlic.com/~lynn/2005s.html#12 Flat Query
https://www.garlic.com/~lynn/2006l.html#0 history of computing
https://www.garlic.com/~lynn/2006m.html#32 Old Hashing Routine
https://www.garlic.com/~lynn/2006o.html#22 Cache-Size vs Performance
https://www.garlic.com/~lynn/2007e.html#14 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#31 Quote from comp.object
https://www.garlic.com/~lynn/2007f.html#66 IBM System z9
https://www.garlic.com/~lynn/2007o.html#17 FORTRAN IV program illustrating assigned GO TO on web site

for other topic drift ... the university had gotten a ONR library automation grant and was selected as beta-test for the original CICS (adapting code that had been developed at a specific customer site and turning it into a product) ... and i got tasked to provide debugging and deployment support. misc. past posts mentioning CICS and/or BDAM
https://www.garlic.com/~lynn/submain.html#bdam

recent post in another thread discussing relative system disk thruput
https://www.garlic.com/~lynn/2007o.html#69 ServerPac Installs and dataset allocations

for other drift ... part of what prompted the observation mentioned in the above post was that the dynamic adaptive resource management work
https://www.garlic.com/~lynn/subtopic.html#fairshare

i had done as an undergraduate in the 60s and at the science center
https://www.garlic.com/~lynn/subtopic.html#545tech

in the 70s ... included the general objective of being able to (dynamically) schedule to the bottleneck ... aka dynamically recognize what is the major system resource bottleneck(s) and adapt the resource scheduling policy to the bottleneck resource(s).

misc. past posts mentioning schedule to the bottleneck
https://www.garlic.com/~lynn/93.html#5 360/67, was Re: IBM's Project F/S ?
https://www.garlic.com/~lynn/93.html#31 Big I/O or Kicking the Mainframe out the Door
https://www.garlic.com/~lynn/94.html#1 Multitasking question
https://www.garlic.com/~lynn/94.html#50 Rethinking Virtual Memory
https://www.garlic.com/~lynn/98.html#6 OS with no distinction between RAM and HD ?
https://www.garlic.com/~lynn/98.html#17 S/360 operating systems geneaology
https://www.garlic.com/~lynn/99.html#143 OS/360 (and descendants) VM system?
https://www.garlic.com/~lynn/2000.html#86 Ux's good points.
https://www.garlic.com/~lynn/2000f.html#36 Optimal replacement Algorithm
https://www.garlic.com/~lynn/2001f.html#62 any 70's era supercomputers that ran as slow as today's supercomputers?
https://www.garlic.com/~lynn/2003f.html#8 Alpha performance, why?
https://www.garlic.com/~lynn/2004o.html#2 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2006d.html#11 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006r.html#39 REAL memory column in SDSF
https://www.garlic.com/~lynn/2007i.html#54 John W. Backus, 82, Fortran developer, dies

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Fri, 21 Sep 2007 08:03:26 -0400
Roland Hutchinson <my.spamtrap@verizon.net> writes:
Another data point: MIT at about the same time. Intro. to programming (the Comp. Sci. version of the subject) used punched cards for most of the course in Fall 1971; a single assignment during semester (if I recall correctly) was done on a timesharing system in BASIC.

got a 2471 at home in mar70 ... connecting to science center's
https://www.garlic.com/~lynn/subtopic.html#545tech

360/67 cp67 system via dialed line ... the science center was on 4th flr 545 tech sq. and the 360/67 machine room was on 2nd flr (multics was on 5th flr). would take b&m into north station and then walk to tech sq (take about 25 mins) ... about same time/distance whether went across science museum bridge and thru lechmere sq (back then it was warehouse looking bldg in a very large paved parking lot) or across longfellow bridge.

misc. past posts mentioning time-sharing systems using cp67 and/or vm370 (virtual machine) systems
https://www.garlic.com/~lynn/submain.html#timeshare

including some number of companies that used the platforms for commercial timesharing offerings

the science center system had some number of people from educational institutions in the area accessing the system ... example rference in recent post
https://www.garlic.com/~lynn/2007k.html#33 Even worse than UNIX

some posts mentioning science center system security challenges hosting some number of corporate hdqtrs people processing some of the corporations most sensitive information as well as access by non-employees from various educational institutions in the area.
https://www.garlic.com/~lynn/2002h.html#34 Computers in Science Fiction
https://www.garlic.com/~lynn/2002h.html#60 Java, C++ (was Re: Is HTML dead?)
https://www.garlic.com/~lynn/2002j.html#2 HONE was .. Hercules and System/390 - do we need it?
https://www.garlic.com/~lynn/2004e.html#36 NSF interest in Multics security
https://www.garlic.com/~lynn/2005o.html#46 Article: The True Value of Mainframe Security
https://www.garlic.com/~lynn/2005p.html#20 address space
https://www.garlic.com/~lynn/2006b.html#23 Seeking Info on XDS Sigma 7 APL
https://www.garlic.com/~lynn/2006r.html#20 50th Anniversary of invention of disk drives
https://www.garlic.com/~lynn/2007i.html#20 Does anyone know of a documented case of VM being penetrated by hackers?
https://www.garlic.com/~lynn/2007i.html#77 Sizing CPU
https://www.garlic.com/~lynn/2007k.html#65 Non-Standard Mainframe Language?
https://www.garlic.com/~lynn/2007o.html#45 Virtual Storage implementation

another similar security challenge was hosting a 370 virtual memory simulation project ... i.e. custom virtual machines that simualted 370 virtual machines (running on the science centers cp67 system running on 360/67). 370 virtual memory architecture had some differences from 360/67 virtual memory architecture and this was before 370 virtual memory was announced and was still a closely guarded corporate secret.
https://www.garlic.com/~lynn/2002h.html#50 crossreferenced program code listings
https://www.garlic.com/~lynn/2004.html#44 OT The First Mouse
https://www.garlic.com/~lynn/2004b.html#31 determining memory size
https://www.garlic.com/~lynn/2004h.html#27 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004p.html#50 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2005c.html#59 intel's Vanderpool and virtualization in general
https://www.garlic.com/~lynn/2005d.html#58 Virtual Machine Hardware
https://www.garlic.com/~lynn/2005g.html#17 DOS/360: Forty years
https://www.garlic.com/~lynn/2005h.html#18 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005i.html#39 Behavior in undefined areas?
https://www.garlic.com/~lynn/2005j.html#50 virtual 360/67 support in cp67
https://www.garlic.com/~lynn/2005p.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005p.html#45 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006e.html#7 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006f.html#5 3380-3390 Conversion - DISAPPOINTMENT
https://www.garlic.com/~lynn/2006l.html#21 Virtual Virtualizers
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006o.html#19 Source maintenance was Re: SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006q.html#1 Materiel and graft
https://www.garlic.com/~lynn/2006q.html#45 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006q.html#49 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006w.html#3 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007b.html#20 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
https://www.garlic.com/~lynn/2007i.html#16 when was MMU virtualization first considered practical?

U.S. Cedes Top Spot in Global IT Competitiveness

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness
Newsgroups: alt.folklore.computers
Date: Fri, 21 Sep 2007 09:43:55 -0400
Quadibloc <jsavard@ecn.ab.ca> writes:
Helping special-needs students is not an avoidable expense. Obviously, one way or another, people with severe mental disabilities are going to cost a lot of money to take care of. Placing that burden on the regular school system, though, is a problem because *it* is funded by local property taxes. Instead, if this is viewed as a medical problem, it can be funded through channels that are funded through the same source as the military - the federal income tax. This would ensure no undue burden on poorer communities.

programs for development impaired students sometimes divert resources from helping the best & brightest reach their full productive potential (which might also be considered as special-needs) resulting in a significant downside effect on overall society.

there have been periodic observation about business/corporate managers frequently spend 90percent of their time on the bottom ten percent least productive employees; while a really good business/corporate manager spends 90precent of their time on the top ten percent most productive employees. When done well, this has been shown to increase overall group productiviity by 2-3 times (or more). in competitive environment, this could mean the difference whether or not the group survives. on the other hand ... it can be difficult to achieve such success and/or it frequently isn't a high priority of large bureaucratic organizations (especially the part of attributing success to responsible individuals).

my favorite competitive environment reference ... misc. past posts
https://www.garlic.com/~lynn/subboyd.html#boyd
and URL references from around the web
https://www.garlic.com/~lynn/subboyd.html#boyd2

past posts in this thread
https://www.garlic.com/~lynn/2007g.html#6 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#35 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#52 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#68 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007i.html#13 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007l.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#20 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#21 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#22 U.S. Cedes Top Spot in Global IT Competitiveness

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Fri, 21 Sep 2007 11:48:26 -0400
Walter Bushell <proto@oanix.com> writes:
Technology marches forward and prices fall. The next service was the bulletin boards which were *free* or very cheap, a hobbyist would get a phone line or 4 and run them. Then I remember a service that provided full USENET for like $35-60 a year.

recent post in this thread
https://www.garlic.com/~lynn/2007p.html#14 Newsweek article--baby boomers and computers

and post last week referencing baby boomer article at msnbc and slashdot
https://www.garlic.com/~lynn/2007p.html#7 what xp do when system is copying

old post having (home) (full) usenet satellite feed, doing device drivers for the modem and co-authoring an article on the effort for boardwatch magazine
https://www.garlic.com/~lynn/2000.html#38 Vanishing Posts...
https://www.garlic.com/~lynn/2000e.html#39 I'll Be! Al Gore DID Invent the Internet After All ! NOT
https://www.garlic.com/~lynn/2001h.html#66 UUCP email
https://www.garlic.com/~lynn/2005l.html#16 Newsgroups (Was Another OS/390 to z/OS 1.4 migration
https://www.garlic.com/~lynn/2006m.html#11 An Out-of-the-Main Activity
https://www.garlic.com/~lynn/2007n.html#17 What if phone company had developed Internet?

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sat, 22 Sep 2007 08:06:56 -0400
jmfbahciv writes:
What an odd definition. IIRC, TOPS-10's idle time is the number of jiffies the CPU runs the null job. It really doesn't have any thing to do.

If the CPU is "waiting" for a user's I/O job, then that time is charged to the user and is not overhead. I don't think we would ever charge the null job to a user. Oh, dear! I'm just discovering how much I've forgotten.


360s had processor "wait" state ... where no instructions were executing. again, part of this could be attributed to the systems were leased and had charges based on the system usage meter ... which ran while the processor was executing instructions and/or i/o programs were running.

past posts about using "prepare" channel command in terminal i/o channel programs ... which wouldn't cause the usage meter to run.
https://www.garlic.com/~lynn/99.html#86 1401 Wordmark?
https://www.garlic.com/~lynn/2002k.html#64 History of AOL
https://www.garlic.com/~lynn/2003k.html#49 S/360 IPL from 7 track tape
https://www.garlic.com/~lynn/2005k.html#40 IBM/Watson autobiography--thoughts on?
https://www.garlic.com/~lynn/2005o.html#30 auto reIPL
https://www.garlic.com/~lynn/2006c.html#22 Military Time?
https://www.garlic.com/~lynn/2007k.html#26 user level TCP implementation
https://www.garlic.com/~lynn/2007o.html#58 ACP/TPF

change to use "prepare" channel command contributed to cp67 being used in commercial time-sharing services with 7x24 availability. one of the issues was it was less economical to leave the system available (for use) off-shift ... but having the usage meter running when there wasn't actually any system use (and no corresponding time-sharing use charges to cover the usage meter lease payments).

misc. past posts about cp67 (and vm370) platforms being used for commercial time-sharing offerings
https://www.garlic.com/~lynn/submain.html#timeshare

other posts in this thread
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#2 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#4 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#7 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#8 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#10 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#11 what does xp do when system is copying

U.S. Cedes Top Spot in Global IT Competitiveness

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness
Newsgroups: alt.folklore.computers
Date: Sat, 22 Sep 2007 07:53:10 -0400
krw <krw@att.bizzzz> writes:
My first airplane ride was back from a vacation in (hmmm, does the arithmetic in his head) '66 and it wasn't a jet either. It was a Viscount Mk. IV (interesting plane) over the rockies from Albuquerque NM to Colorado Springs. The next leg to ORD was a jet though. I've never puked on a plane. The only time I've even come close was in clear-air turbulence on a Comakazie Airways DeHavilland Twin Otter from Kennedy to P'ok for my job interview in '74.

recent post of old puke story
https://www.garlic.com/~lynn/2007j.html#79 IBM 360 Model 20 Questions

other posts mentioning that trip
https://www.garlic.com/~lynn/2006b.html#27 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#27 Mount DASD as read-only
https://www.garlic.com/~lynn/2006e.html#1 About TLB in lower-level caches

other posts in this thread:
https://www.garlic.com/~lynn/2007g.html#6 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#35 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#52 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#68 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007i.html#13 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007l.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#20 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#21 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007p.html#15 U.S. Cedes Top Spot in Global IT Competitiveness

zH/OS (z/OS on Hercules for personal use only)

Refed: **, - **, - **, - **, - **
From: lynn@ibm-main.lst (Anne & Lynn Wheeler)
Subject: Re: zH/OS (z/OS on Hercules for personal use only)
Newsgroups: bit.listserv.ibm-main
Date: 22 Sep 2007 10:26:23 -0700
Andreas F. Geissbuehler wrote:
It's been done many times before, FREEWARE for STRICTLY PERSONAL USE. It is proven to sell more licences for commercial use. There is precedence, DB2, Lotus...

personal computing ... freeware or not ... has always shown to contribute significantly to usage increase. CMS was the personal computing of 60s and 70s (first as cambridge monitor system on cp67 and then renamed to conversational monitor system as part of the morph to vm370) ... and SHARE case studies in the 70s showed that vm370/cms environments had largest usage growth (this was part of the many countermeasures to the perodic corporate statements that vm370 product was being eliminated).

misc. past posts mentioning cambridge science center ... originated cp40 and cp67 virtual machine systems (along with cms)
https://www.garlic.com/~lynn/subtopic.html#545tech

where gml was invented (precursor to sgml, html, xml, etc)
https://www.garlic.com/~lynn/submain.html#sgml

where compare&swap multiprocessor instruction was invented
https://www.garlic.com/~lynn/subtopic.html#smp

and where the technology for the internal network originated
https://www.garlic.com/~lynn/subnetwork.html#internalnet

which was also the basis for bitnet (and european earn):
https://www.garlic.com/~lynn/subnetwork.html#bitnet

64 gig memory

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: 64 gig memory
Newsgroups: alt.folklore.computers
Date: Sat, 22 Sep 2007 14:49:06 -0400
Brian Inglis <Brian.Inglis@SystematicSW.Invalid> writes:
On the contrary, the byte addressed and oriented IBM 3x0 line and PDP-11 lines are the last with significant amounts of assembly code written for them, probably more for each than all previous machines combined, because of the numbers of machines sold over a long time period, the numbers of programmers working on all those machines over that time, and they were the last major architectures to guarantee a consistent view of the machine state to the programmer.

They also had orders of magnitudes more high level language programs written for them than previous architectures for the same reasons, and their major compilers generated tight code because they started out as tiny (by later standards) machines, and their output was examined by hordes of skilled assembler programmers.

The 3x0 has been around long enough for the code to be changed from saving space, to using space to save time, to using CPU to save space, because the CPU bottleneck is back to memory, and always doing everything possible to improve I/O, as that has always been slow, whether the systems used cards, tape, or disk as the major peripheral.


recent post (in bit.listserv.ibm-main) mentioning Amdahl's explanation (at talk given at mit in the early 70s) about justifying funding for his clone computer company
https://www.garlic.com/~lynn/2007p.html#9 CA to IBM product swap

aka that even if ibm were to walk away from 360, customers had already investined a couple hundred billion in 360 software application development ... which would keep him in business through the end of the century.

and another post (also in bit.listserv.ibm-main) regarding discussions in the 70s about the trade-offs vis-a-vis IMS and relational (aka original sql/relational dbms)
https://www.garlic.com/~lynn/2007p.html#13 IBM Releases Office Desktop Software at No Charge to Foster Collaboration and Innovation

post was in response to (posted) comment that IMS is still an order of magnitude faster than DB2.

I've even periodically commented that the table & primary key paradigm adapted for relational dbms representation can be considered targeted mission optimization for banking transactions; aka a more generalized implementation might require separate disk accesses for every related field. In the trade-off implementation ... all fields associated with a (financial/bank) account number (used as primary key) are packaged in the same row (disk record). However, as noted, even with this optimization, IMS is still an order of magnitude faster than DB2 (and in the not too distant past there have also been claims about there still be more business data in IMS repositories than in relational repositories).

and in this post (again in bit.listserv.ibm-main) ...
https://www.garlic.com/~lynn/2007o.html#69 ServerPac Installs and dataset allocations

makes mention of (long ago and far away) raising the issue that over a decade or so, the relative system performance of disks had declined by an order of magnitude (aka disks got faster during the period, but processor performance increased by an order of magnitude more than disk performance increased) ... and it was becoming more and more common to use electronic storage based caches to compensate for the lack of disk performance. something analogous has happened with regard to memory performance vis-a-vis processor performance ... resulting in more and more use of processor caches (processor caches now are frequently at least as large as 370 system memories).

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Sat, 22 Sep 2007 21:40:07 -0400
krw <krw@att.bizzzz> writes:
Yep. VM (Lynn's CP67) did this very well.

recent posts in this thread
https://www.garlic.com/~lynn/2007p.html#14 Newsweek article--baby boomers and computers
https://www.garlic.com/~lynn/2007p.html#16 Newsweek article--baby boomers and computers

one of the other things i had done as undergraduate was extensive modifications to mvt and hasp. i recently mentioned having added tty/ascii terminal support to cp67
https://www.garlic.com/~lynn/2007p.html#4 what does xp do when system is copying

and also working on 2702 clone controller replacement that started with interdata/3 minicomputer:
https://www.garlic.com/~lynn/submain.html#360pcm

however, in addition to all the performance work on os/360 and hasp ... recently mentioned here
https://www.garlic.com/~lynn/2007o.html#69 ServerPac Installs and dataset allocation

i also removed the 2780 rje code in hasp (in order to pick up some addressability) and replaced it with 2741 and tty/ascii terminal support implementing crje function. being somewhat biased, i considered the implementation a lot better than what was later implemented for tso. that hasp work was also what got me on the flight mentioned in this recent post
https://www.garlic.com/~lynn/2007p.html#18 U.S. Cedes Top Spot in Global IT Competitiveness

to visit Bill Worley at Cornell. Bill went on to do a number of things at IBM ... including dual-address space mode for 3033.

misc. posts mentioning hasp (&/or jes2)
https://www.garlic.com/~lynn/submain.html#hasp

U.S. Cedes Top Spot in Global IT Competitiveness

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness
Newsgroups: alt.folklore.computers
Date: Sat, 22 Sep 2007 21:44:34 -0400

recent addenda for an old thread:
Failing Our Geniuses
http://slashdot.org/articles/07/08/17/211255.shtml Are We Failing Our Geniuses?
http://www.time.com/time/magazine/article/0,9171,1653653,00.html

re:
https://www.garlic.com/~lynn/2007o.html#20 U.S. Cedes Top Spot in Global IT Competitiveness

in cspan broadcast of greenspan interview about his new book "Age of Turbulence" he touched on several subjects mentioned in various threads in this n.g.

• somewhat echo'ed comptroller general's comments about financial soundness of social security and medicare ... although somewhat more severe than comptroller general's comment about no congressman in the last 50 yrs has been capable of middle school arithmetic

• US 4th grade test results are about avg. for industrial nations but by 12th grade the test results are at the bottom of industrial nations.

• us would benefit by allowing in more educated/skilled foriegn workers.

• one out of seven(?) gas gals. in the world is used by american consumer driving; would recommend a $3 dollar increase in consumer gas tax.

misc. past posts:
https://www.garlic.com/~lynn/2006f.html#41 The Pankian Metaphor
https://www.garlic.com/~lynn/2006f.html#44 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#9 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#14 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#27 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#2 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#3 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#4 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#17 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#19 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#33 The Pankian Metaphor
https://www.garlic.com/~lynn/2006o.html#61 Health Care
https://www.garlic.com/~lynn/2006p.html#17 Health Care
https://www.garlic.com/~lynn/2006r.html#0 Cray-1 Anniversary Event - September 21st
https://www.garlic.com/~lynn/2006t.html#26 Universal constants
https://www.garlic.com/~lynn/2007g.html#6 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#35 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#52 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#68 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007i.html#13 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007j.html#20 IBM Unionization
https://www.garlic.com/~lynn/2007j.html#58 IBM Unionization
https://www.garlic.com/~lynn/2007j.html#91 IBM Unionization
https://www.garlic.com/~lynn/2007k.html#19 Another "migration" from the mainframe
https://www.garlic.com/~lynn/2007l.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#20 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#21 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#33 EZPass: Yes, Big Brother IS Watching You!
https://www.garlic.com/~lynn/2007o.html#74 Horrid thought about Politics, President Bush, and Democrats
https://www.garlic.com/~lynn/2007p.html#15 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007p.html#18 U.S. Cedes Top Spot in Global IT Competitiveness

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Sun, 23 Sep 2007 09:33:20 -0400
jmfbahciv writes:
Well around that time, IBM was beginning to realize that heterogenous networks were fact and that they couldn't insist on homogenous equipment. The only reason DEC became a billion dollar company is because we had not started out with a homo- attitude. You will observe what happened when DEC^WDigital did acquire that mindset.

a couple assertions about SNA ... systems network architecture

it wasn't network ... it was communication infrastructure supporting huge numbers of (dumb) terminals. one of my wife's problems was that in the early sna timeframe, she co-authored AWP39, peer-to-peer networking. the claim was that only in ibm was it necessary to qualify networking with "peer-to-peer" (once the communication group had obfuscated the meaning of networking by using it to refer to large dumb terminal infrastructures). recent post in bit.listserv.ibm-main
https://www.garlic.com/~lynn/2007o.html#72 FICON tape drive?
https://www.garlic.com/~lynn/2007p.html#12 JES2 or JES3, Which one is older?

SNA somewhat perpetrated FS objectives ... having complex interaction between processor and the various SNA boxes (especially the pu5/pu4 interface), after FS project had been killed. misc. past posts mentioning FS
https://www.garlic.com/~lynn/submain.html#futuresys

some recent posts mentioning FS
https://www.garlic.com/~lynn/2007p.html#1 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#3 PL/S programming languages
https://www.garlic.com/~lynn/2007p.html#5 PL/S programming languages
https://www.garlic.com/~lynn/2007p.html#9 CA to IBM product swap
https://www.garlic.com/~lynn/2007o.html#48 Virtual Storage implementation

slightly older post
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?

with this reference
https://www.ecole.org/en/session/49-the-rise-and-fall-of-ibm
https://www.ecole.org/en/session/49-the-rise-and-fall-of-ibm

and quote from above:
IBM tried to react by launching a major project called the 'Future System' (FS) in the early 1970's. The idea was to get so far ahead that the competition would never be able to keep up, and to have such a high level of integration that it would be impossible for competitors to follow a compatible niche strategy. However, the project failed because the objectives were too ambitious for the available technology. Many of the ideas that were developed were nevertheless adapted for later generations. Once IBM had acknowledged this failure, it launched its 'box strategy', which called for competitiveness with all the different types of compatible sub-systems. But this proved to be difficult because of IBM's cost structure and its R&D spending, and the strategy only resulted in a partial narrowing of the price gap between IBM and its rivals.

... snip ...

as countermeasure to clone controllers ... which has been attributed to terminal clone controller that i participated in creating as an undergraduate ... recent reference:
https://www.garlic.com/~lynn/2007p.html#4 what does xp do when system is copying

other posts mentioning the activity
https://www.garlic.com/~lynn/submain.html#360pcm

which possibly contributes to the extremely complex pu5/pu4 interface.

as i've mentioned before, the technology used for the internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet

had a gateway-like function from just about the beginning ... contributing to it being larger than the arpanet/internet from just about the beginning until somewhat summer 85. of course, this wasn't looked on with favor by the communication group.

the technology for the internal network was another contribution from the science center
https://www.garlic.com/~lynn/subtopic.html#545tech

recent reference in bit.listserv.ibm-main
https://www.garlic.com/~lynn/2007p.html#19 zH/OS (z/OS on Hercules for personal use only)

what does xp do when system is copying

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sun, 23 Sep 2007 09:47:24 -0400
jmfbahciv writes:
It sounds like that would have to be a requirement. How long did a processor take to "start up"? That must have been complicated unless JOBMAX was one. I don't see how you could restore the correct context and be efficient if the system had more than one job using the system. Note that my term "job" is a DECism and not intended to be a declaration of The Only Right Way. (Lynn, the last caveat was intended for others :-).)

re:
https://www.garlic.com/~lynn/2007p.html#17 what does xp do when system is copying

(i/o, external, timer, etc) asynchronous interrupt from wait state ... wasn't any significantly different than an interrupt while some process was actively running; in fact it was slightly cheaper since no state needed to be saved from any currently running process. from then on, it was identical ... process interrupt, update related status, off to dispatch/monitor to decide what to execute next (resume previously running processor or select process related to recent interrupt).

one of the things that i did early on (playing with cp67 code as undergraduate) was rewrite critical interrupt processing pathlengths ... in some cases getting better than an order of magnitude improvement. of course this helped reduce system overhead whether interrupt was occurring from wait state or when there was an actively running process.

recent reference to presentation i gave at Atlantic City share fall68 on various system optimization work .... primarily significant reductions in numerous cp67 kernel pathlenths and significant improvement in os360 thruput by careful placement of system files/data on disk
https://www.garlic.com/~lynn/2007p.html#0 The use of "script" for program

part of presentation in this old post
https://www.garlic.com/~lynn/94.html#18 CP/67 & OS MFT14

Horrid thought about Politics, President Bush, and Democrats

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Horrid thought about Politics, President Bush, and Democrats ...
Newsgroups: alt.folklore.computers
Date: Sun, 23 Sep 2007 10:38:16 -0400
Frank McCoy <mccoyf@millcomm.com> writes:
And yes, the poorer people are, the dumber, and the less educated, the more babies they have. And, while we *can) correct the education part here in the US of A, (that doesn't mean we will) we can't educate the rest of the world. We also can't make *them* rich like we are. There just aren't enough resources to go around.

one of the other comments from the interview broadcast on cspan
https://www.garlic.com/~lynn/2007p.html#22 U.S. Cedes Top Spot in Global IT Competitiveness

was that "tons of physical goods" as component of gnp has remained relatively static ... while resource component that are "conceptual" (ideas?) has increased significantly (increases in gnp has moved from physical resources to ideas and knowledge). this, in turn, adversely interacts with the decline in education.

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sun, 23 Sep 2007 12:47:26 -0400
re:
https://www.garlic.com/~lynn/2007p.html#24 what does xp do when system is copying

for some other topic drift ... corporate america had enormous appetite for commercial dataprocessing ... the resulting market volume resulted in making other computer market sizes pale by comparison. for instance, at one point, i believe the clone controller market size was as large as DEC (not even taking into account the clone processor market size).

i've also periodically claimed that the corporate timesharing market size
https://www.garlic.com/~lynn/submain.html#timeshare

was so dwarfed by the commercial dataprocessing market size ... that many people ignored its existance ... even when that timesharing market segment size was larger than some other computer companies total market

for other topic drift with respect to aspect of commercial dataprocessing ... somewhat mentioned here
https://www.garlic.com/~lynn/2007p.html#22 U.S. Cedes Top Spot in Global IT Competitiveness

there is this discussion about a lot of attention paid to cp67 implementation with regard to whether or not the system meter was kept running ... when the system was otherwise idle
https://www.garlic.com/~lynn/2007p.html#17 what does xp do when system is copying

i had done a lot of work when undergraduate on significant optimizations of cp67 kernel pathlength. i also had done some interaction ... attempting to implement near optimal page replacement algorithm in close to zero instruction pathlength
https://www.garlic.com/~lynn/subtopic.html#wsclock

as well as dynamic adaptive resource manager ... also with as close to zero pathlength as possible
https://www.garlic.com/~lynn/subtopic.html#fairshare

however one of the other characteristics involved the system usage meter (continuing the theme of stopping the usage meter when the system is otherwise idle ... especially in promotion for offering 7x24 off-shift timesharing service). the dynamic adaptive resource manager would have periodic demons that woke up and took stock of what was happening in the system. one of the issues was to schedule these wakeups in such a way that it didn't unnecessarily spike the usage meter when the system was otherwise idle.

one of the issues with the system usage meter was that it would "coast" for 400milliseconds after the last operation that caused it to run. having even one such event every 400milliseconds would prevent the usage meter from actually stopping. now, it may or may not be considered coincidental that the MVS (non-dynamic non-adaptive) resource manager had a fixed "wakeup" interval of 400milliseconds (making sure that for an MVS system, the system usage meter never stopped, regardless of what other activity was going on in the system). on the other hand, by the time of MVS most of the market had shifted from rent/lease to purchase ... and there was much less significance attached to the system usage meter operation. misc. past posts mentioning the usage meter 400millisecond "coast"
https://www.garlic.com/~lynn/2002l.html#62 Itanium2 performance data from SGI
https://www.garlic.com/~lynn/2002n.html#49 Tweaking old computers?
https://www.garlic.com/~lynn/2005k.html#40 IBM/Watson autobiography--thoughts on?
https://www.garlic.com/~lynn/2006c.html#22 Military Time?

Newsweek article--baby boomers and computers

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Mon, 24 Sep 2007 08:38:10 -0400
jmfbahciv writes:
If you force all commuters to go through a turnstyle in single formation, nobody gets to work on time. If you increase the number of pathways of car flows, everybody can get to work on time. Now, substitute car flows on highways for bit flows through wires and classify sets of bit flows as a computing service for a user. Multiply that by the number of users*tasks allowed to access the system at the same wallclock time, and you might understand what I was talking about.

note also that timesharing tended to have technology to differentiate new vis-a-vis long-running ... analogous to express lanes at grocery stores. part of the idea is reduce the avg. number of people waiting and the avg. time they wait.

re:
https://www.garlic.com/~lynn/submain.html#timeshare

other posts in thread
https://www.garlic.com/~lynn/2007p.html#14 Newsweek article--baby boomers and computers
https://www.garlic.com/~lynn/2007p.html#16 Newsweek article--baby boomers and computers
https://www.garlic.com/~lynn/2007p.html#21 Newsweek article--baby boomers and computers
https://www.garlic.com/~lynn/2007p.html#23 Newsweek article--baby boomers and computers

early post with similar reference
https://www.garlic.com/~lynn/2007p.html#7 what does xp do when system is copying

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Mon, 24 Sep 2007 08:53:24 -0400
a couple more articles on the new 40yr old technology

From big iron to white boxes, Nationwide goes virtual
http://www.infoworld.com/article/07/09/24/39FE-virt-case-nationwide_1.html
While many IT shops see virtualization as a question of adopting EMC's VMware on servers running Windows or Linux, Nationwide Insurance has adopted the technology for both x86-based and mainframe-hosted servers. After all, notes Buzz Woeckener, the company's zLinux/Unix server manager, virtualization was invented for mainframes.

... snip ...

Credit Suisse plans virtualization a massive scale
http://www.infoworld.com/article/07/09/24/39FE-virt-case-credit-suisse_1.html
With 20,000 servers to manage, financial services powerhouse Credit Suisse had a long list of reasons to consider server virtualization: reducing the number of physical servers to manage, cutting power needs, improving software provisioning time, and deferring expensive datacenter buildouts. But it also needed a clear set of guidelines to determine when to virtualize, plus a clear set of procedures for managing a virtualization initiative.

... snip ...

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Tue, 25 Sep 2007 13:48:56 -0400
krw <krw@att.bizzzz> writes:
VM was well on its way by '75. CP67 had been around for a long time, by then (cue Lynn). In the '70s, in P'ok, it was mainly used for MVS development. The programmer types appreciated their own (virtual) machine to debug their MVS code. No more Sunday 3:00AM shifts. Towards the end of the '70s it was used for general processing and office (PROFS <!spit!>) work. I used MVS for most of my engineering work until PCs took over.

the PROFS group took a very early alpha-test version of some code, claimed that they had written it (there may have even been a corporate level award involved) and wrapped some menus around it. when the original author suggested that the PROFS group at least upgrade to some production version of the code, there were attempts to get him fired. one of the interesting issues was that the code from day "one" (including the alpha version) included the original author's initials in the comment field of all network addresses (i.e. every piece of profs email had email address control field with the original author's initial hidden out in comment portion). after that, source was limited to very few individuals, the original author and a couple others (I was one). misc. old email mentioning vmsg &/or profs:
https://www.garlic.com/~lynn/2006n.html#email790312
https://www.garlic.com/~lynn/2006n.html#email790312b
https://www.garlic.com/~lynn/2006n.html#email790403
https://www.garlic.com/~lynn/2007d.html#email800920
https://www.garlic.com/~lynn/2006t.html#email820811

in the aftermath of killing FS ... misc. posts
https://www.garlic.com/~lynn/submain.html#futuresys

there was huge scramble to get work going on 370-xa and mvs/xa. as part of mvs/xa schedule "plan" ... the case was made was that the vm370 product had to be killed and all of the developers and support people transferred to pok to support mvs/xa development. this information was untimely leaked to the vm370 development group, which was initially denied and then there was a chilly organizational investigation into who had leaked the information. endicott was eventually able to salvage the vm370 product mission, but effectively had to restaff the operation from scratch (since nearly everybody from the existing vm370 product group were being moved to pok to help in meeting the mvx/xa schedule).

misc. past posts mentioning vmsg and/or profs
https://www.garlic.com/~lynn/99.html#35 why is there an "@" key?
https://www.garlic.com/~lynn/2000c.html#46 Does the word "mainframe" still have a meaning?
https://www.garlic.com/~lynn/2001k.html#35 Newbie TOPS-10 7.03 question
https://www.garlic.com/~lynn/2001k.html#39 Newbie TOPS-10 7.03 question
https://www.garlic.com/~lynn/2001k.html#40 Newbie TOPS-10 7.03 question
https://www.garlic.com/~lynn/2002f.html#14 Mail system scalability (Was: Re: Itanium troubles)
https://www.garlic.com/~lynn/2002h.html#58 history of CMS
https://www.garlic.com/~lynn/2002h.html#59 history of CMS
https://www.garlic.com/~lynn/2002h.html#64 history of CMS
https://www.garlic.com/~lynn/2002i.html#50 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002j.html#4 HONE, ****, misc
https://www.garlic.com/~lynn/2002p.html#34 VSE (Was: Re: Refusal to change was Re: LE and COBOL)
https://www.garlic.com/~lynn/2003b.html#45 hyperblock drift, was filesystem structure (long warning)
https://www.garlic.com/~lynn/2003e.html#69 Gartner Office Information Systems 6/2/89
https://www.garlic.com/~lynn/2003j.html#56 Goodbye PROFS
https://www.garlic.com/~lynn/2003m.html#26 Microsoft Internet Patch
https://www.garlic.com/~lynn/2004p.html#13 Mainframe Virus ????
https://www.garlic.com/~lynn/2005t.html#43 FULIST
https://www.garlic.com/~lynn/2005t.html#44 FULIST
https://www.garlic.com/~lynn/2005u.html#4 Fast action games on System/360+?
https://www.garlic.com/~lynn/2006n.html#23 sorting was: The System/360 Model 20 Wasn't As Bad As All That
https://www.garlic.com/~lynn/2006q.html#4 Another BIG Mainframe Bites the Dust
https://www.garlic.com/~lynn/2006t.html#42 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2006w.html#42 vmshare
https://www.garlic.com/~lynn/2007b.html#31 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007b.html#32 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007e.html#4 The Genealogy of the IBM PC
https://www.garlic.com/~lynn/2007f.html#13 Why is switch to DSL so traumatic?
https://www.garlic.com/~lynn/2007j.html#50 Using rexx to send an email

misc. past posts mentioning the vm370 development group which had moved into the old SBC bldg. (which had been vacated as part of transfer of SBC to CDC as part of some legal action settlement) in burlington mall ... getting shutdown and moved to pok as part of helping make mvs/xa schedule:
https://www.garlic.com/~lynn/94.html#2 Schedulers
https://www.garlic.com/~lynn/98.html#7 DOS is Stolen!
https://www.garlic.com/~lynn/99.html#179 S/360 history
https://www.garlic.com/~lynn/2000b.html#54 Multics dual-page-size scheme
https://www.garlic.com/~lynn/2000b.html#55 Multics dual-page-size scheme
https://www.garlic.com/~lynn/2001m.html#47 TSS/360
https://www.garlic.com/~lynn/2001m.html#49 TSS/360
https://www.garlic.com/~lynn/2001n.html#67 Hercules etc. IBM not just missing a great opportunity...
https://www.garlic.com/~lynn/2002e.html#27 moving on
https://www.garlic.com/~lynn/2002h.html#34 Computers in Science Fiction
https://www.garlic.com/~lynn/2002h.html#59 history of CMS
https://www.garlic.com/~lynn/2002j.html#17 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002m.html#9 DOS history question
https://www.garlic.com/~lynn/2002o.html#78 Newsgroup cliques?
https://www.garlic.com/~lynn/2002p.html#14 Multics on emulated systems?
https://www.garlic.com/~lynn/2003c.html#0 Wanted: Weird Programming Language
https://www.garlic.com/~lynn/2003d.html#8 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003f.html#53 Alpha performance, why?
https://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
https://www.garlic.com/~lynn/2003h.html#34 chad... the unknown story
https://www.garlic.com/~lynn/2003k.html#0 VSPC
https://www.garlic.com/~lynn/2003k.html#55 S/360 IPL from 7 track tape
https://www.garlic.com/~lynn/2004.html#20 BASIC Language History?
https://www.garlic.com/~lynn/2004.html#32 BASIC Language History?
https://www.garlic.com/~lynn/2004c.html#47 IBM 360 memory
https://www.garlic.com/~lynn/2004d.html#42 REXX still going strong after 25 years
https://www.garlic.com/~lynn/2004e.html#37 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2004g.html#24 |d|i|g|i|t|a|l| questions
https://www.garlic.com/~lynn/2004g.html#35 network history (repeat, google may have gotten confused?)
https://www.garlic.com/~lynn/2004g.html#38 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004k.html#23 US fiscal policy (Was: Bob Bemer, Computer Pioneer,Father of
https://www.garlic.com/~lynn/2004m.html#6 a history question
https://www.garlic.com/~lynn/2004m.html#54 Shipwrecks
https://www.garlic.com/~lynn/2004n.html#7 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
https://www.garlic.com/~lynn/2005f.html#58 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2005h.html#37 Software for IBM 360/30
https://www.garlic.com/~lynn/2005j.html#25 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005p.html#0 Article: The True Value of Mainframe Security
https://www.garlic.com/~lynn/2005q.html#12 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#14 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005s.html#35 Filemode 7-9?
https://www.garlic.com/~lynn/2005s.html#36 Filemode 7-9?
https://www.garlic.com/~lynn/2006b.html#18 Expanded Storage
https://www.garlic.com/~lynn/2006j.html#44 virtual memory
https://www.garlic.com/~lynn/2006l.html#25 Mainframe Linux Mythbusting (Was: Using Java in batch on z/OS?)
https://www.garlic.com/~lynn/2006m.html#21 The very first text editor
https://www.garlic.com/~lynn/2006m.html#25 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#28 Mainframe Limericks
https://www.garlic.com/~lynn/2006o.html#51 The Fate of VM - was: Re: Baby MVS???
https://www.garlic.com/~lynn/2006r.html#41 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2006s.html#1 Info on Compiler System 1 (Univac, Navy)?
https://www.garlic.com/~lynn/2006u.html#28 Assembler question
https://www.garlic.com/~lynn/2007f.html#25 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#39 Wylbur and Paging
https://www.garlic.com/~lynn/2007l.html#58 Scholars needed to build a computer history bibliography
https://www.garlic.com/~lynn/2007m.html#66 Off Topic But Concept should be Known To All

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Tue, 25 Sep 2007 13:57:47 -0400
krw <krw@att.bizzzz> writes:
A little later, but TOOLSRUN (I just typed FOOLSRUN ;-0) and FORUMS sprang up. They were pretty "homogenous", though they were underground tools.

part of toolsrun deployment was somewhat conclusion of several task forces (corporate investigation bodies) into something called tandem memos ... which i got blameed for doing ... i had been doing some amount of semi-automated email-based computer conferencing.

there was also a researcher paid to sit in the back of my office for nine months to study how i communicated ... took notes on my face-to-face and telephone conversations and had copies of all my incoming and outgoing email ... as well as logs of all instant messaging communcation. the material was also used for a stanford phd thesis (joint between language and computer ai) and a number of papers and books. there was one statement that for the 9months of the study, on the avg. i communicated with 275-some different individuals per week

some number of posts mentioning cmc (computer mediated conversation) which also touched on detailed study of how i communicate
https://www.garlic.com/~lynn/subnetwork.html#cmc

misc. past posts mentioning toolsrun and/or tandem memos
https://www.garlic.com/~lynn/2001c.html#5 what makes a cpu fast
https://www.garlic.com/~lynn/2001g.html#5 New IBM history book out
https://www.garlic.com/~lynn/2001g.html#6 New IBM history book out
https://www.garlic.com/~lynn/2001g.html#7 New IBM history book out
https://www.garlic.com/~lynn/2001j.html#31 Title Inflation
https://www.garlic.com/~lynn/2002d.html#33 LISTSERV(r) on mainframes
https://www.garlic.com/~lynn/2002k.html#39 Vnet : Unbelievable
https://www.garlic.com/~lynn/2002o.html#73 They Got Mail: Not-So-Fond Farewells
https://www.garlic.com/~lynn/2002q.html#16 cost of crossing kernel/user boundary
https://www.garlic.com/~lynn/2002q.html#38 ibm time machine in new york times?
https://www.garlic.com/~lynn/2003i.html#18 MVS 3.8
https://www.garlic.com/~lynn/2004k.html#66 Question About VM List
https://www.garlic.com/~lynn/2004o.html#48 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005c.html#50 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005d.html#37 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005q.html#5 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005r.html#22 z/VM Listserv?
https://www.garlic.com/~lynn/2006h.html#9 It's official: "nuke" infected Windows PCs instead of fixing them
https://www.garlic.com/~lynn/2006l.html#24 Google Architecture
https://www.garlic.com/~lynn/2006l.html#51 the new math: old battle of the sexes was: PDP-1
https://www.garlic.com/~lynn/2006r.html#11 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006r.html#16 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006w.html#35 Top versus bottom posting was Re: IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2006y.html#10 Why so little parallelism?
https://www.garlic.com/~lynn/2007.html#23 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007b.html#7 information utility
https://www.garlic.com/~lynn/2007b.html#31 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007b.html#32 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007b.html#55 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
https://www.garlic.com/~lynn/2007i.html#34 Internal DASD Pathing
https://www.garlic.com/~lynn/2007j.html#54 Using rexx to send an email
https://www.garlic.com/~lynn/2007j.html#70 Using rexx to send an email
https://www.garlic.com/~lynn/2007k.html#20 John W. Backus, 82, Fortran developer, dies

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Tue, 25 Sep 2007 15:52:36 -0400
hancock4 writes:
The transition between employee data entry and customer data entry is significant. The old time 'green on glass' 3270 screens were terse in order to get as much data on the screen efficiently as possible. Older systems were even worse. Due to hardware limitations, data and commands were tightly coded. System users had to know a great many shorthand codes and commands. Error messages were terse and cryptic.

one of the explanations/justification for menu systems was that the casual, novice, non-power user wouldn't remember all the necessary things (menus were somewhat designed as memory aids for the casual user) ... somewhat comparable to the argument that you could expect to learn to be touch typists (or required to learn how to drive in order to operate a motor vehicle). the counter arguments for the power user has been CLIs that tend to be more efficient and frequently were argued to take much fewer keystrokes and/or elapsed time. a lot of the 3270 screens were for people using the same screen(s) 8hrs/day, five days/week (with somewhat similar arguments that have been used for power-user CLI interfaces).

accompanying the (interface) efficiency argument was lots of attempts to optimize/conserve scarce storage resources ... a theme that is frequently attributed to also being responsible for Y2K (which also trace some origins back in the days of maximizing amount of information on 80 col. punch cards)

for other drift ... misc. past posts mentioning y2k:
https://www.garlic.com/~lynn/99.html#21 Roads as Runways Was: Re: BA Solves Y2K (Was: Re: Chinese Solve Y2K)
https://www.garlic.com/~lynn/99.html#22 Roads as Runways Was: Re: BA Solves Y2K (Was: Re: Chinese Solve Y2K)
https://www.garlic.com/~lynn/99.html#23 Roads as Runways Was: Re: BA Solves Y2K (Was: Re: Chinese Solve Y2K)
https://www.garlic.com/~lynn/99.html#24 BA Solves Y2K (Was: Re: Chinese Solve Y2K)
https://www.garlic.com/~lynn/99.html#27 Roads as Runways Was: Re: BA Solves Y2K (Was: Re: Chinese
https://www.garlic.com/~lynn/99.html#44 Internet and/or ARPANET?
https://www.garlic.com/~lynn/99.html#78 Mainframes Relevant?
https://www.garlic.com/~lynn/99.html#214 Ask about Certification-less Public Key
https://www.garlic.com/~lynn/2000.html#0 2000 = millennium?
https://www.garlic.com/~lynn/2001.html#68 California DMV
https://www.garlic.com/~lynn/2001n.html#74 The demise of compaq
https://www.garlic.com/~lynn/2002.html#30 Younger recruits versus experienced veterans ( was Re: The demise of compa
https://www.garlic.com/~lynn/2002.html#45 VM and/or Linux under OS/390?????
https://www.garlic.com/~lynn/2002j.html#20 MVS on Power (was Re: McKinley Cometh...)
https://www.garlic.com/~lynn/2002k.html#14 NASA MOC (mainframe mission operations computer) being powere d
https://www.garlic.com/~lynn/2002l.html#49 Do any architectures use instruction count instead of timer
https://www.garlic.com/~lynn/2002o.html#28 TPF
https://www.garlic.com/~lynn/2003p.html#21 Sun researchers: Computers do bad math ;)
https://www.garlic.com/~lynn/2003p.html#33 [IBM-MAIN] NY Times editorial on white collar jobs going
https://www.garlic.com/~lynn/2004b.html#2 The SOB that helped IT jobs move to India is dead!
https://www.garlic.com/~lynn/2004e.html#22 Pre-relational, post-relational, 1968 CODASYL "Survey of Data Base Systems"
https://www.garlic.com/~lynn/2004e.html#48 Data Display & Modeling
https://www.garlic.com/~lynn/2004f.html#39 Who said "The Mainframe is dead"?
https://www.garlic.com/~lynn/2004m.html#51 stop worrying about it offshoring - it's doing fine
https://www.garlic.com/~lynn/2004n.html#11 XML: The good, the bad, and the ugly
https://www.garlic.com/~lynn/2004o.html#66 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2004q.html#8 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2004q.html#13 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005.html#20 I told you ... everybody is going to Dalian,China
https://www.garlic.com/~lynn/2005c.html#6 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005s.html#16 Is a Hurricane about to hit IBM ?
https://www.garlic.com/~lynn/2006b.html#29 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#33 Military Time?
https://www.garlic.com/~lynn/2006g.html#21 Taxes
https://www.garlic.com/~lynn/2006h.html#49 Mainframe vs. xSeries
https://www.garlic.com/~lynn/2006k.html#50 TSO and more was: PDP-1
https://www.garlic.com/~lynn/2006o.html#9 Pa Tpk spends $30 million for "Duet" system; but benefits are unknown
https://www.garlic.com/~lynn/2006q.html#54 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006r.html#16 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006s.html#40 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006u.html#13 Year-end computer bug could ground Shuttle
https://www.garlic.com/~lynn/2006u.html#35 Friday fun - Discovery on the pad and the software's not done
https://www.garlic.com/~lynn/2007b.html#26 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#39 Wylbur and Paging
https://www.garlic.com/~lynn/2007h.html#10 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007l.html#18 Non-Standard Mainframe Language?
https://www.garlic.com/~lynn/2007n.html#38 Is Parallel Programming Just Too Hard?

U.S. Cedes Top Spot in Global IT Competitiveness

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness
Newsgroups: alt.folklore.computers
Date: Wed, 26 Sep 2007 09:52:54 -0400
re:
https://www.garlic.com/~lynn/2007p.html#22 U.S. Cedes Top Spot in Global IT Competitiveness

Am I a Bad Parent?
http://blog.cioinsight.com/parallax_view/content/workplace/am_i_a_bad_parent_1.html

from above:
Speaking at an Institute for a Competitive Workforce workshop in Washington this week, Judy Moog, national program director of the Verizon Foundation, pointed out that in terms of quality of high school graduates, America has fallen to 19th out of 26 nations surveyed. "Literacy is the price of admission for competitiveness," she said. "People need to access a torrent of information over a vast array of devices. America isn't succeeding fast enough."

... snip ...

and ...

Gloomy Forecast for IT Work Force
http://www.eweek.com/article2/0,1895,2188796,00.asp

from above:
Moog also pointed out that in terms of "quality" of high school graduates, America has fallen to 19th out of 26 nations surveyed. Moreover, she said, nearly half the U.S. adult population—some 93 million people—have very poor or marginal literacy skills.

... snip ...

authority on performing in competitive environment, past posts
https://www.garlic.com/~lynn/subboyd.html#boyd
and various URLs from around the web
https://www.garlic.com/~lynn/subboyd.html#boyd2

what does xp do when system is copying

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Wed, 26 Sep 2007 13:59:33 -0400
Charlton Wilbur <cwilbur@chromatico.net> writes:
Internet protocol and Ethernet protocol operate at different levels of abstraction. Globally, the Internet handles routing based on IP numbers; locally, any Ethernet hardware has a hardware MAC address and an IP number, and an Internet protocol network running over Ethernet translates between the IP number and the Ethernet address. The mapping from MAC address to IP number is not permanent.

when we were doing ha/cmp product ... one of the issues was doing ip-address take-over (for servers particularly) in the even of various kinds of faults. ARP (address resolution protocol) is standard for translating between ip-address and mac addresses.

my ietf rfc index
https://www.garlic.com/~lynn/rfcietff.htm

select Term (term->RFC#) in the RFCs listed by section, then select "ARP" (in the Acronym fastpath)

i.e.
address resolution protocol (ARP )
see also address resolution
4338 2835 2834 2625 2390 2320 2225 1868 1735 1577 1433 1390 1374 1293 1051 1027 903 826


...

as always, clicking on an RFC # brings up the RFC summary in the lower frame; clicking on the ".txt=nnnn" field (in the rfc summary) fetches the actual RFC. RFC 826 is also STD 37:
STD-37
826 (Stan) - Ethernet Address Resolution Protocol: Or converting network protocol addresses to 48.bit Ethernet address for transmission on Ethernet hardware (ARP)


...

ARP protocol has time-outs for resolved entries. One of the problems we found (at the time we were doing ha/cmp) was that the commonly used TCP/IP implementation (on lots of platforms) had a (common) "bug". In the TCP/IP routine that called the ARP routine ... it had a "fastpath" where it had saved the previous results from call to the ARP routine. If the current IP address, matched the previously saved one, it used the saved result from the previous ARP call. This "saved" value had no time-out. A large percentage of the deployed networks, there was highly asymmetrical traffic flow ... most clients always going to a local server or router. Once, ARP had resolved such a local server/router MAC address, the saved value would never time-out (it would be changed if the system was rebooted or the client attempted to communicate with some other local machine). Even if a client thinks it is talking large number of different "internet" addresses, all that traffic is forwarded to a local "router" address ... and it is only the local route ip-address that requires the ARP call.

misc. past posts mentioning our ha/cmp product work
https://www.garlic.com/~lynn/subtopic.html#hacmp

misc. past posts mentioning internet
https://www.garlic.com/~lynn/subnetwork.html#internet

misc. past posts mentioning earlier nsfnet activity
https://www.garlic.com/~lynn/subnetwork.html#nsfnet

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Wed, 26 Sep 2007 14:53:58 -0400
re:
https://www.garlic.com/~lynn/2007p.html#33 what does xp do when system is copying

a different part of the routing/address resolution problem showed up when we were called in to work with this small client/server startup that wanted to do payment transactions on its server. part of this was developing payment transaction gateway
https://www.garlic.com/~lynn/subnetwork.html#gateway

... the activity has since come to be referred to as "electronic commerce". the initial pass had involved straight-forward translation of transaction message formats from a circuit-based infrastructure to a packet-based infrastructure ... however, as recently noted, that packet-based infrastructure lacked a lot of business critical and telco-provisioning capabilties ... requiring the invention of compensating processes
https://www.garlic.com/~lynn/2007n.html#10 The top 10 dead (or dying) computer skills
https://www.garlic.com/~lynn/2007n.html#15 What if phone company had developed Internet?
https://www.garlic.com/~lynn/2007o.html#23 Outsourcing loosing steam?
https://www.garlic.com/~lynn/2007o.html#25 LAX IT failure: leaps of faith don't work

at the outset, standard internet operations allowed for generalized routing advertisement ... aka it was possible to provide replicated servers/gateway with multiple, replicated connectivity into different, selected places in internet backbone locations ... and when there was various parts of the internet had outages and/or partitioning ... it would be possible to advertise different routes for gateway ip-addresses.

however, during the course of the effort, the internet backbone started transition to hierarchical routing ... in part because of the enormous scaling problems attempting to support arbitrary/dynamic routes for all (pssible) ip-addresses. at that point, one of the few remaining internet failure compensating processes involved dns multiple A-records (i.e. ability to associate multiple different ip-addresses with same hostname).

misc. past posts mentioning multiple A-record
https://www.garlic.com/~lynn/96.html#34 Mainframes & Unix
https://www.garlic.com/~lynn/99.html#16 Old Computers
https://www.garlic.com/~lynn/99.html#158 Uptime (was Re: Q: S/390 on PowerPC?)
https://www.garlic.com/~lynn/99.html#159 Uptime (was Re: Q: S/390 on PowerPC?)
https://www.garlic.com/~lynn/99.html#164 Uptime (was Re: Q: S/390 on PowerPC?)
https://www.garlic.com/~lynn/2001n.html#15 Replace SNA communication to host with something else
https://www.garlic.com/~lynn/2002.html#23 Buffer overflow
https://www.garlic.com/~lynn/2002.html#32 Buffer overflow
https://www.garlic.com/~lynn/2002.html#34 Buffer overflow
https://www.garlic.com/~lynn/2003.html#30 Round robin IS NOT load balancing (?)
https://www.garlic.com/~lynn/2003c.html#8 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#12 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#24 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#25 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#57 Easiest possible PASV experiment
https://www.garlic.com/~lynn/2004k.html#32 Frontiernet insists on being my firewall
https://www.garlic.com/~lynn/2004o.html#53 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2005f.html#55 What is the "name" of a system?
https://www.garlic.com/~lynn/2005g.html#21 Protocol stack - disadvantages (revision)
https://www.garlic.com/~lynn/2005i.html#9 More Phishing scams, still no SSL being used
https://www.garlic.com/~lynn/2005n.html#5 Wildcard SSL Certificates
https://www.garlic.com/~lynn/2005n.html#34 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005o.html#24 is a computer like an airport?
https://www.garlic.com/~lynn/2005r.html#32 How does the internet really look like ?
https://www.garlic.com/~lynn/2005r.html#39 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2006j.html#15 30 hop limit
https://www.garlic.com/~lynn/2007d.html#36 MAC and SSL
https://www.garlic.com/~lynn/2007h.html#67 SSL vs. SSL over tcp/ip
https://www.garlic.com/~lynn/2007i.html#44 latest Principles of Operation
https://www.garlic.com/~lynn/2007n.html#41 Windows: Monitor or CUSP?

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Thu, 27 Sep 2007 09:29:41 -0400
jmfbahciv writes:
Not at DEC. The single user OSes were written by the same people who wrote the timesharing OSes. I don't know how this thinking style evolved at IBM but, with Lynn's posts, it was a very painful evolution where the fruition of the changes happened later rather than sooner. Lynn, please stomp all over this if I'm wrong.

the large batch systems ... some recent mentions
https://www.garlic.com/~lynn/2007j.html#2 Newbie question on table design
https://www.garlic.com/~lynn/2007m.html#51 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#54 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007p.html#26 what does xp do when system is copying

evolved in response to the enormous corporate america appetite for business dataprocessing. other operations somewhat went into different market niches. however, even ibm had other efforts into some of these market niches also. however, because of the enormous size of the business dataprocessing effort (that dwarfed everything else at the time) ... a lot of people could only see the business dataprocessing efforts ... even when some of the ibm efforts in these other areas were actually larger than other corporations activity in the smaller market niches.

a lot of the corporation's virtual machine, interactive, networking, and timesharing grew out of efforts at the cambridge science center
https://www.garlic.com/~lynn/subtopic.html#545tech

which traces its heritage back to CTSS and influenced by other activities going on in the area (for instance, the science center was on 4th flr of 545 tech. sq and multics was on 5th flrt of 545 tech. sq).

there was some pain ... but a lot of it was other corporate organizations repeatedly attempting to terminate numerous activities going on at the science center ... for instance, recent post in this thread mentioning the vm370 product being "canceled" (and all the people being transferred to pok to support turning out the next generation of the favorite son operating system, mvs/xa)
https://www.garlic.com/~lynn/2007p.html#29 Newsweek article--baby boomers and computers

prior to that specific "cancel" ... all during the heyday of future system
https://www.garlic.com/~lynn/submain.html#futuresys

(before future system got canceled and the subsequent mad scramble attempting to get stuff back into the 370 hardware and software pipeline), members of the vm370 development group (out in the old sbc bldg. in burlington mall) were repeatedly told there was no future in vm370 product and therefor there were no career, promotions, and/or salary/raise potential (in the vm370 product group). if somebody waited a real career they had to move to pok or kingston and work on some corporate mainstream effort.

starting at least in early days of acorn ... there was efforts by numerous people associated with vm370 timesharing and cms interactivity to provide software for personal computing platforms ... somewhat related old email
https://www.garlic.com/~lynn/2007.html#email801016
in this post
https://www.garlic.com/~lynn/2007.html#1

misc past posts that mention DataHub project ... which was eventually canceled and the activity then seems to have spawned a new pc operating system corporation
https://www.garlic.com/~lynn/96.html#4a John Hartmann's Birthday Party
https://www.garlic.com/~lynn/2000g.html#40 No more innovation? Get serious
https://www.garlic.com/~lynn/2002f.html#19 When will IBM buy Sun?
https://www.garlic.com/~lynn/2002g.html#79 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2002o.html#33 Over-the-shoulder effect
https://www.garlic.com/~lynn/2003e.html#26 MP cost effectiveness
https://www.garlic.com/~lynn/2003f.html#13 Alpha performance, why?
https://www.garlic.com/~lynn/2004f.html#16 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2005p.html#23 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#9 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#36 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006l.html#39 Token-ring vs Ethernet - 10 years later
https://www.garlic.com/~lynn/2006y.html#31 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007f.html#17 Is computer history taught now?
https://www.garlic.com/~lynn/2007j.html#49 How difficult would it be for a SYSPROG ?
https://www.garlic.com/~lynn/2007n.html#21 The Development of the Vital IBM PC in Spite of the Corporate Culture of IBM
https://www.garlic.com/~lynn/2007n.html#86 The Unexpected Fact about the First Computer Programmer

misc. other past posts mentioning acorn
https://www.garlic.com/~lynn/2002g.html#79 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2003c.html#31 difference between itanium and alpha
https://www.garlic.com/~lynn/2003d.html#9 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003d.html#19 PC history, was PDP10 and RISC
https://www.garlic.com/~lynn/2003e.html#16 unix
https://www.garlic.com/~lynn/2005q.html#24 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005r.html#8 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006k.html#48 Hey! Keep Your Hands Out Of My Abstraction Layer!
https://www.garlic.com/~lynn/2006o.html#45 "25th Anniversary of the Personal Computer"
https://www.garlic.com/~lynn/2006p.html#41 Device Authentication - The answer to attacks lauched using stolen passwords?
https://www.garlic.com/~lynn/2006y.html#29 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2006y.html#31 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007d.html#44 Is computer history taugh now?
https://www.garlic.com/~lynn/2007e.html#5 Is computer history taugh now?

Writing 23FDs

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: lynn@GARLIC.COM (Anne & Lynn Wheeler)
Subject: Re: Writing 23FDs
Newsgroups: bit.listserv.ibm-main
Date: 27 Sep 2007 07:10:12 -0700
Raymond Noal wrote:
An IBM 4361 Model Group 5 had the ECPS feature -

Extended Control Program Support (ECPS) -- offers VSE mode, VM/370 mode, and MVS/370 mode. These modes provide microcode assists that make the system control programs operate more efficiently.


ECPS was originally done for virgil/tully (370 138/148). basically portions of kernel/nucleus pathlengths were implemented in microcode. a "new" instruction was defined each of these (moved) pathlength snippets ... and placed "in front" of the corresponding kernel instructions. The parameter list for the "new instruction" included address(es) of where the microcode was to resume in the standard code.

here is old post that details what portions of the vm370 kernel were identified for movement into microcode
https://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist

the issue was that low-end and mid-range 370 machines were vertical microcode to implement 370 instruction set ... and there was typically an avg ratio of 10:1 (microcode instructions to 370 instructions) ... this avg. ratio has also been found by some of the more recent 370 emulators on i86 platforms.

For virgil/tully we were given that there was approx. 6k of microcode instruction space available ... and typical kernel instruction would translate approx. 1:1 into microcode (6k bytes of kernel 370 instructions translates into approx. 6k bytes of microcode). So the identification activity was to identity the 6k bytes of vm370 kernel code that were the highest used pathlengths.

There was also an ipl/boot sequence that identified whether it was running on an ECPS machine ... and if not, it had a table of all ECPS instruction in the kernel which it would overlay with no-ops (allowing the same kernel to execute on both ECPS machines and non-ECPS machines).

Note, for vm370, vm microcode assist (VMA) had previously been implemented on 370/158. This were specific, high-use, supervisor state instructions that normally interrupted into the vm370 kernel for simulation. A new "mode" was defined for the machine which was virtual machine supervisor state ... and the machine microcode was changed to directly execute the supervisor state instruction using virtual machine rules ... w/o having to interrupt into the vm370 kernel. As part of the virgil/tully ECPS effort, there was also implementation of the VMA supervisor instructions, as well as additional supervisor state instructions not in the original VMA implementation.

Later there was an ECPS-like effort done for the 3033 for MVS. There were some difference between the 3033 MVS changes and the virgil/tully vm370 implementation.

• the new MVS would only run on machines with the MVS microcode enhancement and wouldn't run on machines w/o the feature

• 3033 was a horizontal microcode machine where the ratio of microcode instructions to 370 instructions was nearly 1:1 ... aka there was little or no performance difference between the 370 instruction implementation and the microcode implementation (this characteristic continued on later high-end machines)

later, in the 4331/4341 time-frame ... there was some effort to retrofit the mvs ecps change to 4341s ... allowing latest release of mvs to operate on 4341 machines. there was lots of contention over the value of doing this since 4341 was barely powerful enough to support any kind of mvs thruput .... and 4331 was quite a bit below that threshold (so i can't be positive, but i'm pretty sure that the mvs ecps feature was never retrofitted to 4331 ... although it was eventually made available on 4341).

somewhat 4361 topic drift .... the 3081 had a service processor which ran off a 3310 fba disk. part of the issue was that field service had a requirement that it could perform bootstrap field diagnostics starting with a scope. this was no longer possible for the 3081 ... so a service processor was added that had the capability of diagnosing 3081 hardware ... and it was possible for field service to do diagnostic field bootstrap starting with scope on the service processor.

the service processor function was getting more and more complex, and so it was decided that for 3090, it would use a 4331 running a highly customized version of vm370 release 6 ... and all service processor menu screens implemented in cms ios3270. before 3090 first customer ship, the service processor was upgraded to a pair of 4361s (running vm370 and cms with menu screens implemented in cms ios3270). having a pair of redundant 4361s eliminated the requirement for field service to bootstrap diagnose 4361s ... since they could just switch to the other 4361 machine for diagnosing the 3090 (if there was 4361 failure).

misc. past posts mentioning service processor operation
https://www.garlic.com/~lynn/96.html#41 IBM 4361 CPU technology
https://www.garlic.com/~lynn/99.html#61 Living legends
https://www.garlic.com/~lynn/99.html#62 Living legends
https://www.garlic.com/~lynn/99.html#108 IBM 9020 computers used by FAA (was Re: EPO stories (was: HELP IT'S HOT!!!!!))
https://www.garlic.com/~lynn/2000b.html#50 VM (not VMS or Virtual Machine, the IBM sort)
https://www.garlic.com/~lynn/2000b.html#51 VM (not VMS or Virtual Machine, the IBM sort)
https://www.garlic.com/~lynn/2000c.html#76 Is a VAX a mainframe?
https://www.garlic.com/~lynn/2000d.html#26 Superduper computers--why RISC not 390?
https://www.garlic.com/~lynn/2001b.html#83 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2001h.html#2 Alpha: an invitation to communicate
https://www.garlic.com/~lynn/2001j.html#13 Parity - why even or odd (was Re: Load Locked (was: IA64 running out of steam))
https://www.garlic.com/~lynn/2002.html#45 VM and/or Linux under OS/390?????
https://www.garlic.com/~lynn/2002b.html#32 First DESKTOP Unix Box?
https://www.garlic.com/~lynn/2002b.html#44 PDP-10 Archive migration plan
https://www.garlic.com/~lynn/2002c.html#42 Beginning of the end for SNA?
https://www.garlic.com/~lynn/2002e.html#5 What goes into a 3090?
https://www.garlic.com/~lynn/2002e.html#19 What goes into a 3090?
https://www.garlic.com/~lynn/2002i.html#79 Fw: HONE was .. Hercules and System/390 - do we need it?
https://www.garlic.com/~lynn/2002j.html#28 ibm history note from vmshare
https://www.garlic.com/~lynn/2002l.html#7 What is microcode?
https://www.garlic.com/~lynn/2002l.html#10 What is microcode?
https://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
https://www.garlic.com/~lynn/2002n.html#59 IBM S/370-168, 195, and 3033
https://www.garlic.com/~lynn/2002p.html#40 Linux paging
https://www.garlic.com/~lynn/2002q.html#53 MVS History
https://www.garlic.com/~lynn/2003e.html#65 801 (was Re: Reviving Multics
https://www.garlic.com/~lynn/2003l.html#12 Why are there few viruses for UNIX/Linux systems?
https://www.garlic.com/~lynn/2003l.html#62 IBM Manuals from the 1940's and 1950's
https://www.garlic.com/~lynn/2003n.html#17 which CPU for educational purposes?
https://www.garlic.com/~lynn/2004.html#10 Dyadic
https://www.garlic.com/~lynn/2004.html#11 Dyadic
https://www.garlic.com/~lynn/2004j.html#45 A quote from Crypto-Gram
https://www.garlic.com/~lynn/2004k.html#37 Wars against bad things
https://www.garlic.com/~lynn/2004n.html#10 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004p.html#27 IBM 3705 and UC.5
https://www.garlic.com/~lynn/2004p.html#36 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004p.html#37 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004p.html#41 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2005b.html#51 History of performance counters
https://www.garlic.com/~lynn/2005h.html#13 Today's mainframe--anything to new?
https://www.garlic.com/~lynn/2005p.html#29 Documentation for the New Instructions for the z9 Processor
https://www.garlic.com/~lynn/2005t.html#39 FULIST
https://www.garlic.com/~lynn/2006.html#0 EREP , sense ... manual
https://www.garlic.com/~lynn/2006b.html#2 Mount a tape
https://www.garlic.com/~lynn/2006n.html#6 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#8 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006r.html#27 A Day For Surprises (Astounding Itanium Tricks)
https://www.garlic.com/~lynn/2006x.html#24 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007.html#18 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007.html#24 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007.html#39 Just another example of mainframe costs
https://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#15 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#30 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007c.html#16 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?
https://www.garlic.com/~lynn/2007d.html#22 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#23 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007e.html#39 FBA rant
https://www.garlic.com/~lynn/2007e.html#43 FBA rant
https://www.garlic.com/~lynn/2007i.html#20 Does anyone know of a documented case of VM being penetrated by hackers?

Writing 23FDs

Refed: **, - **, - **, - **, - **, - **
From: lynn@GARLIC.COM (Anne & Lynn Wheeler)
Subject: Re: Writing 23FDs
Newsgroups: bit.listserv.ibm-main
Date: 27 Sep 2007 09:12:13 -0700
Matthew Stitt wrote:
Because the FBA's and 8809's were boat anchors. And the 3350's and 3420 gave interchangeability with MVS.

With things connected to normal channels the sky was the limit with what could be done with the 4331. Using the ICA severely limited your devices.

The 3350 and 3420 tapes could run circles around the standard stuff IBM wanted to sell with the 4331.


4331 had integrated channels (aka like 370/158 and many other processors) .... i think you are referring to the integrated controller adapter (as opposed to integrated channels). part of the ICA case were that run-of-the-mill controllers were going to be physically on the size of 4331 (or larger) and cost (unless you could pickup old hardware at surplus prices). An example of the size ... in addition to the original effort to use it for 3090 service processor ...
https://www.garlic.com/~lynn/2007p.html#36 Writing 23FDs

research had a project that had a 4331 as a desk-side personal computer.

FBAs were mostly boat anchors because mvs wouldn't ship support for them. Eventually all physical disks migrated to FBA ... and for mvs compatibility, there had to be CKD emulation (the first was 3375). misc. past posts mentioning ckd issues
https://www.garlic.com/~lynn/submain.html#dasd

i was told that even if i provided fully tested and integrated mvs fba support, there would still be a bill of $26m for education, classes, documentation, etc. In order to justify mvs fba support, i had to show incremental disk sale ROI (increment gross sales at least 10-20 times the expense) attributed solely to the availability of the mvs fba support.

misc. past posts mention being quoted $26m as bill for mvs fba education, classes and documentation:
https://www.garlic.com/~lynn/97.html#16 Why Mainframes?
https://www.garlic.com/~lynn/97.html#29 IA64 Self Virtualizable?
https://www.garlic.com/~lynn/99.html#75 Read if over 40 and have Mainframe background
https://www.garlic.com/~lynn/2000.html#86 Ux's good points.
https://www.garlic.com/~lynn/2000f.html#18 OT?
https://www.garlic.com/~lynn/2000g.html#51 > 512 byte disk blocks (was: 4M pages are a bad idea)
https://www.garlic.com/~lynn/2001.html#54 FBA History Question (was: RE: What's the meaning of track overfl ow?)
https://www.garlic.com/~lynn/2001d.html#64 VTOC/VTOC INDEX/VVDS and performance (expansion of VTOC position)
https://www.garlic.com/~lynn/2001g.html#32 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2002.html#5 index searching
https://www.garlic.com/~lynn/2002.html#10 index searching
https://www.garlic.com/~lynn/2002g.html#13 Secure Device Drivers
https://www.garlic.com/~lynn/2002l.html#47 Do any architectures use instruction count instead of timer
https://www.garlic.com/~lynn/2003.html#15 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003c.html#48 "average" DASD Blocksize
https://www.garlic.com/~lynn/2003m.html#56 model 91/CRJE and IKJLEW
https://www.garlic.com/~lynn/2004d.html#65 System/360 40 years old today
https://www.garlic.com/~lynn/2004g.html#15 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004l.html#20 Is the solution FBA was Re: FW: Looking for Disk Calc
https://www.garlic.com/~lynn/2004l.html#23 Is the solution FBA was Re: FW: Looking for Disk Calc
https://www.garlic.com/~lynn/2004n.html#52 CKD Disks?
https://www.garlic.com/~lynn/2005c.html#64 Is the solution FBA was Re: FW: Looking for Disk Calc
https://www.garlic.com/~lynn/2005m.html#40 capacity of largest drive
https://www.garlic.com/~lynn/2005u.html#21 3390-81
https://www.garlic.com/~lynn/2006f.html#3 using 3390 mod-9s
https://www.garlic.com/~lynn/2006f.html#4 using 3390 mod-9s

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Thu, 27 Sep 2007 12:31:09 -0400
Anne & Lynn Wheeler <lynn@garlic.com> writes:
there was some pain ... but a lot of it was other corporate organizations repeatedly attempting to terminate numerous activities going on at the science center ... for instance, recent post in this thread mentioning the vm370 product being "canceled" (and all the people being transferred to pok to support turning out the next generation of the favorite son operating system, mvs/xa)

re:
https://www.garlic.com/~lynn/2007p.html#29 Newsweek article--baby boomers and computers
https://www.garlic.com/~lynn/2007p.html#35 Newsweek article--baby boomers and computers

another example from the time frame leading up to the leaking of the information that the vm370 product group was being shutdown (and everybody was being moved to pok to support mvs/xa development) was that a significant rewrite and enhancement of the cms os360 simulation had been done. however, with the "shutdown" of the vm370 product group, this code was (permenantly) shelved (and people responsible left the company rather than move out of the boston area).

even before that rewrite, it had been claimed that the (earlier) 64k bytes of code in the cms os360 simulation implementation was significant more efficient os360 simulation than the 8mbytes or so code in the mvs implementation of os360 simulation.

India is outsourcing jobs as well

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: lynn@GARLIC.COM (Anne & Lynn Wheeler)
Subject: Re: India is outsourcing jobs as well
Newsgroups: bit.listserv.ibm-main
Date: 27 Sep 2007 10:00:18 -0700
Edward Jaffe wrote:
I have family all over Virginia. "Less developed" is probably a good thing. It's a beautiful state. Lots of history.

There's something very wrong with and/or not being stated in the premise here. They probably need people in the United States because things aren't working out so well with an all-Indian work force.


the other possibility is that they have some specific outsourcing that may include requirement for some legacy skills ... it may turn out to be cheaper to hire people, that already have such experience, than try to train a new generation ... especially if it is considered obsolete skills with limited future applicability.

i've frequently claimed that a big boost for outsourcing was as part of y2k remediation efforts ... when it wasn't so much a question of pay scale ... but getting anybody at all. this was significantly aggravated because it was happening during the big resource demand growth in the internet bubble. once business relations were established (during the y2k era), these business relations continued to exist after y2k remediation completed.

some of the recent statistics ... that well over half of cs advanced degrees from us institutions were to people not born in the US. still the majority of the advanced degrees (from us institutions) are to people not born in the us ... while at the same time the number graduating from non-US institutions is dramatically increasing. This is coupled with things like test scores for US highschool graduates ranks near the bottom of all industrial nations.

misc. recent posts on the subject:
https://www.garlic.com/~lynn/2007g.html#6 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#35 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#52 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#68 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007i.html#13 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007l.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#20 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#21 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007o.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007p.html#15 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007p.html#18 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007p.html#22 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007p.html#32 U.S. Cedes Top Spot in Global IT Competitiveness

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Fri, 28 Sep 2007 09:28:13 -0400
cb@df.lth.se (Christian Brunschen) writes:
Quite similar to the ratio of people who have read the documentation to those who have not.

as part of doing ha/cmp product
https://www.garlic.com/~lynn/subtopic.html#hacmp

we had done a detailed vulnerability study of networking ... both reviewing standards and code ... recent minor reference to "bug" in most commonly deployed tcp/ip stack
https://www.garlic.com/~lynn/2007p.html#33 what does xp do when system is copying

several yrs later there was a problem at one of the largest online service provider with their internet interface. this went on for a couple months while they brought in numerous experts to try and diagnose the problem. eventually one of the people came out and offered to by me a hamburger after work ... i ate the hamburger while the problem was described and then i said it was one of the issues we had identified as part of the ha/cmp effort ... and provided a quick&dirty work-around that was applied that night. I've periodically mentioned that part of the problem was an interesting interaction between the specs and various code implementations ... and most practioners not having done detailed review of both the specifications and multiple different code implementations.

a few past posts mentioning the incident:
https://www.garlic.com/~lynn/2005c.html#51 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2006e.html#11 Caller ID "spoofing"
https://www.garlic.com/~lynn/2006i.html#6 The Pankian Metaphor
https://www.garlic.com/~lynn/2007b.html#8 Special characters in passwords was Re: RACF - Password rules

what does xp do when system is copying

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Fri, 28 Sep 2007 11:05:06 -0400
jmfbahciv writes:
I can see that. The number has to be unique over all calendar time. Think about it. You can't recycle those numbers unless you can verify that the old card has been destroyed and will never see the netlight again.

MAC addresses tend to be purely local area network segment. (tcp/ip) routers don't tend to leak MAC addresses across different LANs segments. As part of ARP protocol ... recent post
https://www.garlic.com/~lynn/2007p.html#33 what does xp do when system is copying

routers will answer with their MAC address for tcp/ip address for which they have routing responsibility (aka host then will transmit ip packets to that MAC address). host tcp/ip also have "routing" configuration information ... router ip-addresses (which may not be on local lan segment) for which ranges of ip-addresses are to be forwarded.

a corporation may have configuration that defaults routing for Internet addresses all forwarded to that specific gateway box. individual hosts will then have the default routing configured to specify that specific router ip-address. when a host (on a specific corporate lan segment) wants to send a packet to the internet ... they go thru the ip-routing configuration and build packets such they are to be forwarded to the specified corporate router/gateway ip-address. it then does a ARP required for that router/gateway ip-address. The local LAN segment router will respond with its MAC address on behalf of the corporate internet router/gateway. The host then transmits the packet over the LAN to that MAC address. The local LAN segment router then has responsibility of correctly forwarding the packet so that it eventually arrives at the corporate intenet router/gateway.

Many corporate LAN segments are only on the order of 20-40 adapters (with routers and/or hierarchy of routers, tieing together multiple LAN segments ... where MAC addresses aren't leaking across different LAN segment). For the most part, for a duplicate MAC collision to actually occur, they have to be installed on the same LAN segment. The issue then becomes whether or not a manufacturer has actually re-used an MAC address in an adapter ... and then that some customer has installed two such adapters on the same LAN segment.

BOOTP and DHCP have capability of dynamically allocating ip-addresses (from some subpool) purely FIFO. However, BOOTP/DHCP configuration is also possible to use additional/different rules ... like specific ip-addresses being assigned to specific MAC addresses (a different place where duplicate MAC address could cause a problem). BOOTP/DHCP also tends to provide configuration information regarding ip-address for default routing (usually the corporate internet router/gateway box) and ip-addresses for DNS servers (i.e. servers that provide mapping from host names to ip-addresses).

from my rfc index
https://www.garlic.com/~lynn/rfcietff.htm

select Term (term->RFC#) in the RFCs listed by section

and select BOOTP and/or DHCP in the Acronym fastpath section.

i.e.
bootstrap protocol (BOOTP )
see also configuration , reverse address resolution protocol
2132 1542 1534 1533 1532 1497 1395 1084 1048 951


and
dynamic host configuration protocol (DHCP )
see also configuration , host , reverse address resolution protocol
5010 5007 4994 4941 4833 4776 4704 4703 4702 4701 4676 4649 4580 4578 4477 4436 4390 4388 4361 4332 4280 4243 4242 4174 4076 4039 4030 4014 3993 3942 3927 3925 3898 3825 3736 3679 3646 3634 3633 3594 3527 3495 3456 3442 3397 3396 3361 3319 3315 3256 3203 3118 3074 3046 3041 3011 3004 2939 2937 2855 2610 2563 2489 2485 2322 2242 2241 2132 2131 1541 1534 1533 1531


as always, selecting an rfc number, brigns up the summary in the lower frame; selecting the ".txt=nnnn" field retrieves the actual RFC

what does xp do when system is copying

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sat, 29 Sep 2007 10:47:29 -0400
jmfbahciv writes:
But I'd understood from this discussion that the MAC addresses are also the device names.

Am I confused, Lynn? If the above is true, we are going to have a mess once the point of saturation is approached.


re:
https://www.garlic.com/~lynn/2007p.html#33 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#41 what does xp do when system is copying

in intenetworking ... domain name system (DNS) provides translation from hostname (like www.garlic.com) to an ip-address ... which is a four byte field ... that is frequently represented as four octets using decimal representation (of the individual bytes with periods/dots separating the decimal numbers in the different bytes). the ip-address transmission/routing proceeds down the networking stack ... until it possibly gets to the LAN/MAC level. networking stack then will prefix an ip-packet with a MAC address and put it out on the LAN wire. Typically, the LAN adapter with the specified MAC address, will pull it off the wire, strip off the MAC address header and push it up into the ip-protocol stack.

As a result, specific MAC addresses tend to only be used on local LAN segments (that the corresponding adapter is attached to) ... and aren't visible outside that local LAN environment.

It would be possible to imagine a communication infrastructure that maps some sort of host/device name directly to a MAC addresses w/o any of the intermediary internetworking layer ... but one of the advantages that came with IP was the ability to internetwork individual networks (for instance individual network represented by local LAN segments).

Once the transition was made from networking (say based on purely MAC addressing) to internetworking ... the internetworking naming convention tended to subsume and obfuscate any purely local networking addressing convention.

Early in the evolution of LAN technology ... and before the prevalent adaption of internetworking technology ... there was much more use of LAN "bridges" (as opposed to internetworking router/gateways). LAN "bridges" would propagate MAC addresses across multiple LAN segments. In these non-internetworking environments using bridge technology, the scope requirements for unique MAC addresses could span large number of individual LAN segments ... so that you might be talking about MAC address uniqueness span hundreds or thousands of devices ... rather than just tens.

misc. past posts mentioning internet/internetworking
https://www.garlic.com/~lynn/subnetwork.html#internet

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sat, 29 Sep 2007 14:19:06 -0400
re:
https://www.garlic.com/~lynn/2007p.html#41 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#42 what does xp do when system is copying

in much the same way that internetworking subsumed needing old-fashioned network addressing conventions to be globally unique. for organizations that strongly partitioned their internal operation from the internet, they could use an internetworking, non-globally unique address ... i.e.
1918
Address Allocation for Private Internets, DeGroot G., Karrenberg D., Lear E., Moskowitz R., Rekhter Y., 1996/02/29 (9pp) (.txt=22271) (BCP-5) (Obsoletes 1597, 1627) (Refs 1466, 1518, 1519) (Ref'ed By 2050, 2052, 2071, 2072, 2101, 2260, 2267, 2529, 2626, 2647, 2661, 2663, 2694, 2709, 2764, 2767, 2775, 2827, 2893, 2993, 3002, 3013, 3022, 3024, 3027, 3056, 3102, 3103, 3330, 3456, 3484, 3550, 3582, 3750, 3809, 3871, 3879, 3882, 3927, 4008, 4031, 4085, 4093, 4110, 4111, 4116, 4365, 4380, 4381, 4436, 4611, 4697, 4702, 4710, 4727, 4779, 4786, 4787, 4843, 4864, 4907, 4948)


then the use of internetworking gateway/router conventions (in conjunction with NAT, network address convention) enabled the convention of using 10-net, 192.168-net, etc within an organization's network ... w/o requiring the network addresses to be globally unique across the whole internet i.e. in transition across the organization's internet gateway, "NAT" would convert the institutional (10-net/192.169-net) ip-address to a ip-address that was unique for the rest of the internet.

my rfc index
https://www.garlic.com/~lynn/rfcietff.htm

select Term (term->RFC#) in the RFCs listed by section

and select "NAT" in the Acronym fastpath section

i.e.
network address translation
4966 4787 4380 4008 3947 3715 3519 3489 3424 3235 3105 3104 3103 3102 3027 3022 2993 2766 2709 2694 2663 2428 2391 1631

network address translator (NAT)
see network address translation


...

discussion of the some of the issues can be found
3027 I
Protocol Complications with the IP Network Address Translator, Holdrege M., Srisuresh P., 2001/01/17 (20pp) (.txt=48662) (Refs 821, 959, 1034, 1035, 1198, 1918, 2101, 2205, 2401, 2402, 2406, 2411, 2543, 2573, 2663, 2694, 2709, 2962, 2993, 3022) (Ref'ed By 3234, 3235, 3489, 3927, 4787, 4864, 4953, 4966)


another discussion of the subject can be found in
3927 PS
Dynamic Configuration of IPv4 Link-Local Addresses, Aboba B., Cheshire S., Guttman E., 2005/05/23 (33pp) (.txt=83102) (Refs 826, 959, 1918, 2131, 2462, 3027) (Ref'ed By 4436, 4795, 4903, 4907)


from above:
To participate in wide-area IP networking, a host needs to be configured with IP addresses for its interfaces, either manually by the user or automatically from a source on the network such as a Dynamic Host Configuration Protocol (DHCP) server. Unfortunately, such address configuration information may not always be available. It is therefore beneficial for a host to be able to depend on a useful subset of IP networking functions even when no address configuration is available. This document describes how a host may automatically configure an interface with an IPv4 address within the 169.254/16 prefix that is valid for communication with other devices connected to the same physical (or logical) link.

... snip ...

misc. past posts mentioning internetworking/internet
https://www.garlic.com/~lynn/subnetwork.html#internet

as i've mentioned before, tcp/ip was the technical/protocol basis for the modern internet, while the nsfnet backbone represented the operational origins for the modern internet/internetworking, and CIX (commercial interchange) was the business basis for the modern internet. misc. past posts mentioning nsfnet
https://www.garlic.com/~lynn/subnetwork.html#nsfnet

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Sun, 30 Sep 2007 12:00:55 -0400
Walter Bushell <proto@oanix.com> writes:
Hey there was Ethernet in the late 1960s and only used to connect mainframes and bridges were still in use in the '90s.


https://www.garlic.com/~lynn/2007p.html#42 what does xp do when system is copying

lot of mainframe bridges were token-ring LANS ... ... reference to my wife named on early token-passing patent (also used in series/1 chat-ring):
https://www.garlic.com/~lynn/2001c.html#69 Wheeler and Wheeler
https://www.garlic.com/~lynn/2004e.html#13 were dumb terminals actually so dumb???
https://www.garlic.com/~lynn/2004p.html#55 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2005h.html#12 practical applications for synchronous and asynchronous communication
https://www.garlic.com/~lynn/2005i.html#43 Development as Configuration
https://www.garlic.com/~lynn/2005q.html#17 Ethernet, Aloha and CSMA/CD -
https://www.garlic.com/~lynn/2005u.html#50 Channel Distances
https://www.garlic.com/~lynn/2005u.html#53 OSI model and an interview
https://www.garlic.com/~lynn/2005u.html#56 OSI model and an interview
https://www.garlic.com/~lynn/2006l.html#35 Token-ring vs Ethernet - 10 years later
https://www.garlic.com/~lynn/2007b.html#46 'Innovation' and other crimes
https://www.garlic.com/~lynn/2007g.html#80 IBM to the PCM market(the sky is falling!!!the sky is falling!!)
https://www.garlic.com/~lynn/2007h.html#35 sizeof() was: The Perfect Computer - 36 bits?

back in the time-frame when she had been con'ed into going to pok to be in charge of loosely-coupled architecture ... where she created Peer-Coupled Shared Data architecture
https://www.garlic.com/~lynn/submain.html#shareddata

except for ims hot-standby, didn't see a lot of uptake until sysplex

little note about ethernet invention:
http://inventors.about.com/library/weekly/aa111598.htm

from above:
The press has often stated that ethernet was invented on May 22, 1973, when Robert Metcalfe wrote a memo to his bosses stating the possibilities of ethernet's potential, but Metcalfe claims ethernet was actually invented very gradually over a period of several years. In 1976, Robert Metcalfe and David Boggs (Metcalfe's assistant) published a paper titled, "Ethernet: Distributed Packet-Switching For Local Computer Networks".

... snip ...

maybe you are thinking of packet switching networks ... ala arpanet?????

(ethernet) multipoint data communication system with collision detection patent, filed 31mar75:
"http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4,063,220.PN.&OS=PN/4,063,220&RS=PN/4,063,220">http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4,063,220.PN.&OS=PN/4,063,220&RS=PN/4,063,220

64 gig memory

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: 64 gig memory
Newsgroups: alt.folklore.computers
Date: Sun, 30 Sep 2007 13:48:43 -0400
paul c <toledobythesea@oohay.ac> writes:
About twenty years later, I was helping a medium-size European airline go bankrupt. I remember that their real-time flight data using a variation of ACP/PARS occupied about 300 MB on disk. Most of the people in charge there were of my own vintage and were totally committed to their mainframes and count-key-data disk drives. By this time, some PC's had real memory that matched that amount and even exceeded the real storage of some of their mainframes. Not to say that was their only problem, for every plane, they had about nine people in IT!

recent post in bit.listserv.ibm-main mentioning ckd disks
https://www.garlic.com/~lynn/2007p.html#37 Writing 23FDs

and lots of other posts mentioning ckd disks, multi-track searches, (and FBA alternative)
https://www.garlic.com/~lynn/submain.html#dasd

my wife did short stint as chief architect for amadeus
https://www.garlic.com/~lynn/2001g.html#49 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2001g.html#50 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2001h.html#76 Other oddball IBM System 360's ?
https://www.garlic.com/~lynn/2003d.html#67 unix
https://www.garlic.com/~lynn/2003n.html#47 What makes a mainframe a mainframe?
https://www.garlic.com/~lynn/2004b.html#6 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004b.html#7 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004m.html#27 Shipwrecks
https://www.garlic.com/~lynn/2004o.html#23 Demo: Things in Hierarchies (w/o RM/SQL)
https://www.garlic.com/~lynn/2004o.html#29 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005f.html#22 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
https://www.garlic.com/~lynn/2006o.html#4 How Many 360/195s and 370/195s were shipped?
https://www.garlic.com/~lynn/2006r.html#9 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006y.html#14 Why so little parallelism?
https://www.garlic.com/~lynn/2007d.html#19 Pennsylvania Railroad ticket fax service
https://www.garlic.com/~lynn/2007e.html#52 US Air computers delay psgrs
https://www.garlic.com/~lynn/2007h.html#12 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007k.html#72 The top 10 dead (or dying) computer skills
https://www.garlic.com/~lynn/2007o.html#59 ACP/TPF

old story about (later) rewriting ROUTES for one of the large airline res. systems ... rewrite including leveraging significantly increased real storage sizes
https://www.garlic.com/~lynn/99.html#136a checks (was S/390 on PowerPC?)
https://www.garlic.com/~lynn/2000f.html#20 Competitors to SABRE?
https://www.garlic.com/~lynn/2001d.html#69 Block oriented I/O over IP
https://www.garlic.com/~lynn/2002g.html#2 Computers in Science Fiction
https://www.garlic.com/~lynn/2002j.html#83 Summary: Robots of Doom
https://www.garlic.com/~lynn/2003o.html#17 Rationale for Supercomputers
https://www.garlic.com/~lynn/2004b.html#6 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004o.html#23 Demo: Things in Hierarchies (w/o RM/SQL)
https://www.garlic.com/~lynn/2004q.html#85 The TransRelational Model: Performance Concerns
https://www.garlic.com/~lynn/2005o.html#24 is a computer like an airport?
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
https://www.garlic.com/~lynn/2006o.html#18 RAMAC 305(?)
https://www.garlic.com/~lynn/2006q.html#22 3 value logic. Why is SQL so special?
https://www.garlic.com/~lynn/2007g.html#22 Bidirectional Binary Self-Joins
https://www.garlic.com/~lynn/2007g.html#41 US Airways badmouths legacy system
https://www.garlic.com/~lynn/2007h.html#41 Fast and Safe C Strings: User friendly C macros to Declare and use C Strings
https://www.garlic.com/~lynn/2007j.html#28 Even worse than UNIX

India is outsourcing jobs as well

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: India is outsourcing jobs as well
Newsgroups: alt.folklore.computers, bit.listserv.ibm-main
Date: Sun, 30 Sep 2007 18:05:47 -0400
re:
https://www.garlic.com/~lynn/2007p.html#39 Inda is outsourcing jobs as well

Why Is US Grad School Mainly Non-US Students?
http://ask.slashdot.org/askslashdot/07/09/29/2027210.shtml

from above:
I am a new graduate student in Computer Engineering. I would like to get my MS and possibly my Ph.D. I have learned that 90% of my department is from India and many others are from China.

... snip ...

somewhat related recent post
https://www.garlic.com/~lynn/2007o.html#76 Graduate Enrollment in 2005

giving stats showing it slightly closing between 2001 & 2005, i.e. foreign/US; 2001: 6500/2500 and 2005: 4500/3500

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Mon, 01 Oct 2007 08:47:37 -0400
"Jukka Aho" <jukka.aho@iki.fi> writes:
MAC addresses are used on Layer 2 of the OSI model - "data link layer"; the lowest level above the actual physical wire.

small digression ... osi model doesn't really have addresses at the data link layer ... there were originally thought of as point-to-point links. addressing is up in layer 3, network layer.

we were on the xtp technical advisery board and somewhat involved in pushing high-speed protocol work item in x3s3.3 (iso chartered ansi standards group responsible for osi layer 3/4 standards work). iso had guidelines/rules that only network/transport standards could be done for things that corresponded to the osi model ... and therefor the high-speed protocol work item was shot down .. based on HSP work item violating osi model:

• supported internet/interworking ... layer that doesn't exist in osi model

• supported mac/lan ... interface that is somewhere in the middle of layer 3/networking ... which isn't defined

• went directly from layer 4/trasport interface directly to mac/lan interface ... bypassing layer3/layer4 interface

...

misc. past posts mentioning xtp, hsp, and/or osi
https://www.garlic.com/~lynn/subnetwork.html#xtphsp

Translation of IBM Basic Assembler to C?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers
Date: Mon, 01 Oct 2007 10:42:24 -0400
Howard S Shubs <howard@shubs.net> writes:
Does anyone know of an automated method for doing this? Maybe a commercial service?

misc. topic drift

i had done this pli program in the early 70s that read assembler listing and one of the things it spit out was pli/pascal like psuedo code (it was later looked at possibly spitting out pl.8 code). misc. past posts mentioning program
https://www.garlic.com/~lynn/94.html#12 360 "OS" & "TSS" assemblers
https://www.garlic.com/~lynn/2000d.html#36 Assembly language formatting on IBM systems
https://www.garlic.com/~lynn/2001.html#52 Review of Steve McConnell's AFTER THE GOLD RUSH
https://www.garlic.com/~lynn/2001l.html#24 mainframe question
https://www.garlic.com/~lynn/2003n.html#34 Macros and base register question
https://www.garlic.com/~lynn/2004d.html#21 REXX still going strong after 25 years
https://www.garlic.com/~lynn/2005e.html#52 Where should the type information be?
https://www.garlic.com/~lynn/2006e.html#32 transputers again was: The demise of Commodore
https://www.garlic.com/~lynn/2006p.html#1 Greatest Software Ever Written?
https://www.garlic.com/~lynn/2006t.html#9 32 or even 64 registers for x86-64?
https://www.garlic.com/~lynn/2006u.html#31 To RISC or not to RISC
https://www.garlic.com/~lynn/2007n.html#64 IBM System/360 DOS still going strong as Z/VSE

for additional topic drift ... i had been talking to one of the people (that had been at los gatos vlsi lab) responsible for the 370 pascal compiler (was used for chip tools, and eventually become vs/pascal on both 370 and rs/6000) about doing a c-language front-end. before effort got very far, he left and joined a company over in santa cruz.

not long afterwards, when acis was looking at doing a product porting BSD to 370, they were looking around for a 370 c-compiler, i suggested the company he had joined. before the BSD port was released for 370 ... the effort was retargeted to pc/rt (which shipped as AOS and required the company to do a romp backend in place of 370 backend).

various collected posts mentioning 801, risc, romp, rios, pl.8, cp.r, fort knox, power, power/pc, etc
https://www.garlic.com/~lynn/subtopic.html#801

misc. past posts mentioning the company/compiler used for AOS
https://www.garlic.com/~lynn/2000e.html#20 Is Al Gore The Father of the Internet?^
https://www.garlic.com/~lynn/2002n.html#66 Mainframe Spreadsheets - 1980's History
https://www.garlic.com/~lynn/2002q.html#19 Beyond 8+3
https://www.garlic.com/~lynn/2003h.html#52 Question about Unix "heritage"
https://www.garlic.com/~lynn/2004d.html#71 What terminology reflects the "first" computer language ?
https://www.garlic.com/~lynn/2004f.html#42 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004n.html#30 First single chip 32-bit microprocessor
https://www.garlic.com/~lynn/2004q.html#35 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2004q.html#38 CAS and LL/SC
https://www.garlic.com/~lynn/2004q.html#39 CAS and LL/SC
https://www.garlic.com/~lynn/2004q.html#61 will there every be another commerically signficant new ISA?
https://www.garlic.com/~lynn/2005b.html#14 something like a CTC on a PC
https://www.garlic.com/~lynn/2005e.html#0 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005e.html#1 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005s.html#33 Power5 and Cell, new issue of IBM Journal of R&D
https://www.garlic.com/~lynn/2006b.html#8 Free to good home: IBM RT UNIX
https://www.garlic.com/~lynn/2007j.html#14 Newbie question on table design

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Mon, 01 Oct 2007 10:53:54 -0400
"Jukka Aho" <jukka.aho@iki.fi> writes:
However, if you search for layman descriptions of the current Ethernet + TCP/IP model - and especially descriptions which try to explain how the Ethernet + TCP/IP model relates to the OSI layers - in these (perhaps rather simplified)descriptions, Ethernet frames / MAC are typically placed on Layer 2 and IP on Layer 3.

re:
https://www.garlic.com/~lynn/2007p.html what does xp do when system is copying

there were large number of individuals, organizations, educational institutions, standards bodies and governments heavily invested in OSI and pushing for things like elimination of internetworking protocol and adopting the one true (networking) religion; which floundered. one could possibly conjecture that with so much invested, that there were would be attempts to at least salvage some of that enormous investment (for instance, all the educational material)

misc. past posts
https://www.garlic.com/~lynn/subnetwork.html#xtphsp

Newsweek article--baby boomers and computers

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Newsweek article--baby boomers and computers
Newsgroups: alt.folklore.computers
Date: Mon, 01 Oct 2007 15:53:16 -0400
greymaus <greymausg@mail.com> writes:
Local companies exporting to the US are getting worried, I suppose all part of a 'self-correcting' process that is part of the process.

peculiar way that the first of the problems surfaced through Europe, first I heard of the 'subprime' (aside from an idiot trying to get me to invest, sure sign that things are past their best) was a German bank in Dublin having to be rescued.


past several days ... "experts" interviewed on programs like bloomberg channel, talked about foreigners (and others) worried about confidence in the securitized mortgages bonds (as well as other securitized instruments).

it is somewhat a combination of subprime loans and rating of securitized mortgage bonds. in olden times, banks would offer mortgages on properties and the bank loan officer would maintain oversight on the property, mortgage payments etc (along with much more detailed knowledge of the quality, risks and other details associated with the loans).

old long-winded post touching on mortgages, evaluation issues, and securitizing mortgages for bond sale (and how can the instrument valuations be really trusted), etc (from nearly a decade ago):
https://www.garlic.com/~lynn/aepay3.htm#riskm Thread Between Risk Management and Information Security

part of the issue was that a lot of the subprime mortgages had fairly high-level of risk attached (even tho these actually represented only a small percentage of total mortgages).

however, the other part of the issue is that this mortgage risk valuation accuracy could get obfuscated as it underwent the securitized packaging and sale as bonds (several levels of indirection between how mortgages used to be managed and the new age mortgage management). finding that some of their holdings had much higher risk than previously thot ... then led to questioning how wide-spread and pervasive are the inaccurate risk evaluations (and how can any of the security instrument evaluations be trusted for making investment decisions).

so how many of the investors knew what the risk was and bought the instruments anyway, how many of the investors should have realized the risk (and also bought the instruments), and how many were misled by the amount of risk (possibly somewhat analogous to enron or worldcom scenario) ... however, whatever the case, possibly all the investors would prefer some gov. program to help cover/limit losses.

even tho the subprime mortgage risk only involves a small percentage of total mortgages, the uncertainty regarding accurate risk evaluations for these securitized instruments extends across the whole market.

misc. recent posts mentioning subprime loans
https://www.garlic.com/~lynn/2007j.html#81 IBM Unionization
https://www.garlic.com/~lynn/2007j.html#82 IBM Unionization
https://www.garlic.com/~lynn/2007k.html#10 IBM Unionization
https://www.garlic.com/~lynn/2007k.html#12 IBM Unionization
https://www.garlic.com/~lynn/2007o.html#0 The Unexpected Fact about the First Computer Programmer

Translation of IBM Basic Assembler to C?

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers
Date: Mon, 01 Oct 2007 16:17:03 -0400
re:
https://www.garlic.com/~lynn/2007p.html#48 Translation of IBM Basic Assembler to C?

for total other topic drift ... one of the people from the science center
https://www.garlic.com/~lynn/subtopic.html#545tech

responsible for the implementation used in the internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet

many years later was working with one of the major real-time systems implementated in C-language and thot he noticed something familar. Checking the core monitor/dispatching routine ... it appeared to be a hand translation from 370 assembler to C ... of the equivalent routine from the internal network implementation ... down to preserving all the original statement comment fields.

The Downside of Shared Services

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: The Downside of Shared Services
Newsgroups: alt.folklore.computers
Date: Mon, 01 Oct 2007 18:50:29 -0400
The Downside of Shared Services
http://www.cioupdate.com/article.php/3702741

from above:
The mainframe days of chargeback's are coming into vogue again but the issues are much more complex, just like IT itself.

... snip ...

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Tue, 02 Oct 2007 15:40:36 -0400
Steve O'Hara-Smith <steveo@eircom.net> writes:
Yep that sounds reasonable - the modem is essentially acting as a remote bridge in conjunction with a similar device at the other end of the cable (at your ISP). So effectively your router is bridged on to a LAN segment at your ISP.

the other way of thinking about it, is view the part as part of a "circuit" infrastructure ... rather than the network/routing infrastructure. There are huge parts of the infrastructure that are circuit oriented ... something coming-in one specific interface, always goes out another specific interface ... w/o any "network" addressing component ... of course then there is some amount of "virtual circuit" operation ... where point-to-point circuits are emulated using various kinds of per packet addressing fields ... potentially totally unrelated to internetworking and/or ieee802.

Industry Standard Time To Analyze A Line Of Code

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Industry Standard Time To Analyze A Line Of Code
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Tue, 02 Oct 2007 15:55:50 -0400
jbaker314@ibm-main.lst (John P Baker) writes:
Back in the 80s, we operated under the premise that a seasoned programmer should be able to produce 20 lines of bug-free assembler code per day.

there have been periodic statements that code generation can be the simplest part of the problem.

we've periodically commented that the effort to produce a service can be 4-10 times that of a straight-forward application (or taking a well-tested and well-debugged application and turning it into a service can take 4-10 times the effort of the original application development). frequently this may have only a little to do with lines-of-code.

we were called in to consult with a small client/server startup that wanted to do payment transactions on servers ... they had this technology called SSL ... and subsequently the activity has frequently been referred to as electronic commerce. Part of the infrastructure that the server payment application talked to was something called a payment gateway ... misc. past posts mentioning payment gateway activity
https://www.garlic.com/~lynn/subnetwork.html#gateway

the initial take was to take transaction message formats from existing circuit-based infrastructure and map them to packets in internet infrastructure. this somewhat ignored a whole lot of telco provisioning that went into circuit-based operation ... and provided a basis for business critical dataprocessing ... which was all missing in the initial transition to internet-based operation. as part of supporting an operational environment (as opposed to somewhat trivial technology demonstration) ... we had to invent a lot of compensating processes for the internet environment.

some other recent posts raising the issue about business critical dataprocessing
https://www.garlic.com/~lynn/2007f.html#37 Is computer history taught now?
https://www.garlic.com/~lynn/2007g.html#51 IBM to the PCM market(the sky is falling!!!the sky is falling!!)
https://www.garlic.com/~lynn/2007h.html#78 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007n.html#10 The top 10 dead (or dying) computer skills
https://www.garlic.com/~lynn/2007n.html#76 PSI MIPS
https://www.garlic.com/~lynn/2007n.html#77 PSI MIPS
https://www.garlic.com/~lynn/2007o.html#23 Outsourcing loosing steam?

Is Parallel Programming Just Too Hard?

Refed: **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Is Parallel Programming Just Too Hard?
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Wed, 03 Oct 2007 09:03:05 -0400
Choice Overload In Parallel Programming
http://developers.slashdot.org/developers/07/10/03/0021253.shtml

from above:
"And then we show them the parallel programming environments they can work with: MPI, OpenMP, Ct, HPF, TBB, Erlang, Shmemm, Portals, ZPL, BSP, CHARM++, Cilk, Co-array Fortran, PVM, Pthreads, windows threads, Tstreams, GA, Java, UPC, Titanium, Parlog, NESL,Split-C... and the list goes on and on. If we aren't careful, the result could very well be a 'choice overload' experience with software vendors running away in frustration."

... snip ...

and ...

Embedded software stuck at C
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=202102427

from above:
"The inability of C/C++ code to parallelize coupled with its ubiquity throughout the embedded market is a major issue for multi-core going forward," Heikkila wrote in a follow up email to EE Times. "Any alternative parallel programming languages certainly won't materialize in the embedded market, but instead will more likely gain momentum in a more mainstream computing market before making its way into embedded applications," he added.

... snip ...

past posts in thread:
https://www.garlic.com/~lynn/2007l.html#24 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007l.html#26 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007l.html#34 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007l.html#38 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007l.html#60 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007l.html#63 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#5 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#13 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#14 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#19 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#22 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#26 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#29 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#37 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#39 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#49 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#51 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#52 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#53 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#54 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#58 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#59 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#61 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007m.html#70 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#1 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#3 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#6 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#25 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#28 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#38 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#39 Is Parallel Programming Just Too Hard?

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Wed, 03 Oct 2007 09:27:56 -0400
Steve O'Hara-Smith <steveo@eircom.net> writes:
The internet is already a global public utility that neither the US nor any other government has any business getting involved in trying to control. Uf they did they would probably be told where to go in no uncertain terms by the rest of the world's users - well by the regional registries and the larger ISPs around the world.

part of that view may be partially attributed to the infrastructure cultural reaction to failed/aborted OSI push backed by so many govs. and other institutions ... which included elimination of internet/internetworking.

a couple recent posts
https://www.garlic.com/~lynn/2007p.html#47 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#49 what does xp do when system is copying

other posts touching on the subject:
https://www.garlic.com/~lynn/subnetwork.html#xtphsp

misc. posts mentioning internet/arpanet, etc
https://www.garlic.com/~lynn/subnetwork.html#internet

misc. posts mentioning nsfnet backbone activity
https://www.garlic.com/~lynn/subnetwork.html#nsfnet

... tcp/ip has been protocol/technology foundation for modern internet, nsfnet backbone was the origin of the operational foundation for modern internet, and cix was the origin of the business foundation for the modern internet.

Translation of IBM Basic Assembler to C?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers,comp.lang.asm370
Date: Wed, 03 Oct 2007 13:02:33 -0400
re:
https://www.garlic.com/~lynn/2007p.html#48 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#51 Translation of IBM Basic Assembler to C?

topic drift and x-over from
https://www.garlic.com/~lynn/2007p.html#54 Industry Standard Time To Analyze A Line Of Code

the pli program i wrote in the early 70s to analyze assembler listings created an abstract representation of each instruction and things like condition code, etc. Then when trying to represent the assembler as (pli/pascal like) psuedo code ... there were attempts to do if/then/else and do/while representations from assembler code sequences.

for some assembler code this worked fairly straight-forward ... but there were cp67 and vm370 kernel routines that had fairly straight-forward assembler code sequences ... although quite dense with various condition code setting instructions followed with branch conditions ... which would have extremely complex and convoluted translated psuedo code (attempting to use if/then/else, do/while, etc representation). One such, fairly short and very straight-forward test/branch assembler sequence translated into nested if/then/else more than 20-deep.

old thread discussinh some of the issue
https://www.garlic.com/~lynn/2006p.html#1 Greatest Software Ever Written?
https://www.garlic.com/~lynn/2006p.html#4 Greatest Software Ever Written?

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 08:42:04 -0400
Bernd Felsche <bernie@innovative.iinet.net.au> writes:
Rules of thumb: • no more than 10 transacting users per independently addressible set of heads.

• no more than 20 query users per set of heads.

• no more than 5 gigabytes of active data per set of heads.


there is large variability ... in the 70s, i 1st started raising the issue of other system components getting faster than disks were getting and therefor disks were more and more frequently becoming major system thruput bottleneck ... recent post mentioning that having originated scheduling to the bottleneck as part of dynamically adaptive resource management in the 60s ... it was somewhat easier to realize that major system thruput bottlenecks:
https://www.garlic.com/~lynn/2007p.html#13 IBM Releases Office Desktop Software at No Charge to Foster Collaboration

other posts mentioning dynamic adaptive resource management
https://www.garlic.com/~lynn/subtopic.html#fairshare

a few old posts comparing thruput of 360/67 cp67 system with 45 disk arms against 3081 vm370 system with 32 disk arms
https://www.garlic.com/~lynn/93.html#31 Big I/O or Kicking the Mainframe out the Door
https://www.garlic.com/~lynn/94.html#43 Bloat, elegance, simplicity and other irrelevant concepts
https://www.garlic.com/~lynn/94.html#55 How Do the Old Mainframes Compare to Today's Micros?
https://www.garlic.com/~lynn/95.html#10 Virtual Memory (A return to the past?)
https://www.garlic.com/~lynn/98.html#46 The god old days(???)
https://www.garlic.com/~lynn/99.html#4 IBM S/360

one of the frequent themes that runs thru some of these threads is the increasing use of real storage caching to help compensate for decline in the relative system thruput of disks. this aided in closing the performance gap between IMS and relational ... at least as far as frequently used data like relational indexes ... lots of past posts about original relational/sql implementation
https://www.garlic.com/~lynn/submain.html#systemr

however, there are IMS deployments that still may get ten times the thruput of equiivalent implementation in relational (and there have been claims in recent years that the amount of data in IMS may still be larger than relational ... although this may just be for really business critical data and/or in large mainframe installations).

however, the transactional issue is that cache really addresses just read mostly data ... it doesn't do a lot for data that has to be written. there has been various foreys into various strategies for write data. a lot of work has been done on attempting to highly optimize transaction logs as sequential writes on possibly dedicated disk arms.

there are also issues with things like fast commits with large caches ... allow processing activity to continue as soon as the log record has been written ... but allow the actual database record to the database "home" location to be "lazy" ... allowing actual database record write queues to be reordered into optimal seek and rotational ... rather than temporal. misc. posts mentioning fast commits
https://www.garlic.com/~lynn/2001.html#40 Disk drive behavior
https://www.garlic.com/~lynn/2002k.html#8 Avoiding JCL Space Abends
https://www.garlic.com/~lynn/2003i.html#70 A few Z990 Gee-Wiz stats
https://www.garlic.com/~lynn/2003j.html#7 A few Z990 Gee-Wiz stats
https://www.garlic.com/~lynn/2004q.html#70 CAS and LL/SC
https://www.garlic.com/~lynn/2005f.html#32 the relational model of data objects *and* program objects
https://www.garlic.com/~lynn/2005m.html#38 Massive i/o
https://www.garlic.com/~lynn/2006c.html#8 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006o.html#33 When Does Folklore Begin???
https://www.garlic.com/~lynn/2007i.html#27 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007n.html#49 VLIW pre-history

there have also been implementations for both filesystem data as well as database records ... where record writes are always done to new database locations. A database example was Ilustra which then leveraged the implementation to also support "versioning" (Ilustra was subsequently acquired by Informix which then was bought by IBM) ... recent post
https://www.garlic.com/~lynn/2007n.html#33 What I miss in my OS

Some old posts mentioning filesystem implementation example as log strucutured filesystems
https://www.garlic.com/~lynn/93.html#28 Log Structured filesystems -- think twice
https://www.garlic.com/~lynn/93.html#29 Log Structured filesystems -- think twice
https://www.garlic.com/~lynn/2000.html#93 Predictions and reality: the I/O Bottleneck
https://www.garlic.com/~lynn/2000c.html#24 Hard disks, one year ago today
https://www.garlic.com/~lynn/2000g.html#38 4M pages are a bad idea (was Re: AMD 64bit Hammer CPU and VM)
https://www.garlic.com/~lynn/2001c.html#28 The Foolish Dozen or so in This News Group
https://www.garlic.com/~lynn/2001f.html#59 JFSes: are they really needed?
https://www.garlic.com/~lynn/2001f.html#60 JFSes: are they really needed?
https://www.garlic.com/~lynn/2001m.html#56 Contiguous file system
https://www.garlic.com/~lynn/2002b.html#20 index searching
https://www.garlic.com/~lynn/2002l.html#36 Do any architectures use instruction count instead of timer
https://www.garlic.com/~lynn/2002m.html#4 Handling variable page sizes?
https://www.garlic.com/~lynn/2002n.html#9 Asynch I/O
https://www.garlic.com/~lynn/2003b.html#69 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003f.html#5 Alpha performance, why?
https://www.garlic.com/~lynn/2003f.html#9 Alpha performance, why?
https://www.garlic.com/~lynn/2004f.html#0 c.d.theory glossary (repost)
https://www.garlic.com/~lynn/2004g.html#22 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2005l.html#41 25% Pageds utilization on 3390-09?
https://www.garlic.com/~lynn/2005n.html#22 Code density and performance?
https://www.garlic.com/~lynn/2005n.html#36 Code density and performance?
https://www.garlic.com/~lynn/2006j.html#3 virtual memory
https://www.garlic.com/~lynn/2006j.html#10 The Chant of the Trolloc Hordes
https://www.garlic.com/~lynn/2006x.html#3 Why so little parallelism?
https://www.garlic.com/~lynn/2007.html#30 V2X2 vs. Shark (SnapShot v. FlashCopy)
https://www.garlic.com/~lynn/2007i.html#27 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007n.html#6 Is Parallel Programming Just Too Hard?
https://www.garlic.com/~lynn/2007n.html#33 What I miss in my OS

Translation of IBM Basic Assembler to C?

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 08:11:01 -0400
jmfbahciv writes:
I don't see how this reverses the process. Sorry, Howard. I guess I misread your question since I seem to be the only one who read it that way.

assembler -> C question wasn't about reversing some process ... it was about programs that were originally written in 360/370 assembler (take programs wirtten in 360/370 assembler and attempt to create a C-language equivalent).

this is similar, but different than reverse engineering applications that take object/executable (originally written in C) and attempts to recreate the original C language statements.

the original had been separately x-posted to both (at least?) alt.folklore.computers and comp.lang.asm370 newsgroups (the thread in comp.lang.asm370 has somewhat more discussion of the characteristics of programming directly in 360/370 assembler, as well as there has been improvement in assembler features over the last 40 yrs)

re:
https://www.garlic.com/~lynn/2007p.html#48 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#51 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#57 Translation of IBM Basic Assembler to C?

what does xp do when system is copying

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 12:14:05 -0400
Roland Hutchinson <my.spamtrap@verizon.net> writes:
As Morton pointed out, changing the DNS infrastructure could be done in less than a day. (Much easier, in fact, than implementing the GFoC.) We -- or rather, they -- would then find out pretty fast whether there was enough network capacity to route around the US backbones.

a little DNS fed gov. topic drift from this morning

Feds pull the domain name plug on State of California
http://news.yahoo.com/s/macworld/20071004/tc_macworld/domain20071004
Feds pull the domain name plug on State of California
http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9040858
Feds pull the domain name plug on State of California
http://www.networkworld.com/news/2007/100907-internet2.html
Feds pull the domain name plug on State of California
http://www.infoworld.com/article/07/10/04/Feds-pull-domain-name-plug-on-California_1.html
Feds Deleted California s Gov Domains
http://www.securitypronews.com/insiderreports/insider/spn-49-20071004FedsDeletedCaliforniasGovDomains.html
Feds Shut Down California's Domain Name
http://www.pcworld.com/article/id,138048-c,currentevents/article.html

for other topic drift, lots of past posts mentioning ssl domain name digital certification infrastructure
https://www.garlic.com/~lynn/subpubkey.html#sslcerts
and posts mentioning domain name system catch-22 for various pki operations
https://www.garlic.com/~lynn/subpubkey.html#catch22

aka, when we were asked to consult with small client/server startup that wanted to do payment transactions on their server ... part of the effort was something called payment gateway
https://www.garlic.com/~lynn/subnetwork.html#gateway

however, this startup also had something called SSL ... which included these things called ssl domain name certificates that were issued by something called certification authorities ... and part of our process included going around and doing some end-to-end detailed audits of of these operations calling themselves certification authorities.

... and misc. other topic drift ... other recent posts mentioning domain name infrastructure
https://www.garlic.com/~lynn/2007k.html#33 Even worse than UNIX
https://www.garlic.com/~lynn/2007k.html#65 Non-Standard Mainframe Language?
https://www.garlic.com/~lynn/2007k.html#79 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007l.html#0 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007l.html#2 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007l.html#6 John W. Backus, 82, Fortran developer, dies
https://www.garlic.com/~lynn/2007m.html#41 X.509 weakness?
https://www.garlic.com/~lynn/2007m.html#62 nouns and adjectives
https://www.garlic.com/~lynn/2007n.html#32 What I miss in my OS
https://www.garlic.com/~lynn/2007n.html#41 Windows: Monitor or CUSP?
https://www.garlic.com/~lynn/2007n.html#71 Poll: oldest computer thing you still use
https://www.garlic.com/~lynn/2007p.html#41 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#42 what does xp do when system is copying

Damn

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Damn ....
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 12:41:34 -0400
Frank McCoy <mccoyf@millcomm.com> writes:
As pointed-out previously, this was before Arthur C. Clarke wrote his paper suggesting geostationary as an option in 1945. Before that, nobody else seemed to have thought of the idea. Of course, much before that, satellites themselves were a completely Science-Fiction Idea, and thought by most people to be as fantastic as flying to the moon.

part of my hsdt (high-speed data transport) project
https://www.garlic.com/~lynn/subnetwork.html#hsdt

was getting both terrestrial and satellite high-speed links. for the satellite links, i got to help spec satellite tdma earth station (with lots of help from experts helping me understand what i was doing) ... which we then had some external vendors build to the specs. later the vendors said that they had been approached by a large telco requesting that earth stations be built for them to the same specs (little industrial espionage going on here). there was also a lot of FEC and cryptography involved.

we were eventually assigned a transponder on SBS4 ... also had a VIP invitation to attend the launch (one of the people that had walked on the moon was a few seats over in the stands)

launch reference:
http://science.ksc.nasa.gov/shuttle/missions/41-d/mission-41-d.html

misc. past posts referencing the work/launch
https://www.garlic.com/~lynn/2000b.html#27 Tysons Corner, Virginia
https://www.garlic.com/~lynn/2003k.html#14 Ping: Anne & Lynn Wheeler
https://www.garlic.com/~lynn/2004b.html#23 Health care and lies
https://www.garlic.com/~lynn/2005h.html#21 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2006m.html#11 An Out-of-the-Main Activity
https://www.garlic.com/~lynn/2006m.html#16 Why I use a Mac, anno 2006
https://www.garlic.com/~lynn/2006p.html#31 "25th Anniversary of the Personal Computer"
https://www.garlic.com/~lynn/2006v.html#41 Year-end computer bug could ground Shuttle

Damn

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Damn ....
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 15:14:07 -0400
Anne & Lynn Wheeler <lynn@garlic.com> writes:
part of my hsdt (high-speed data transport) project
https://www.garlic.com/~lynn/subnetwork.html#hsdt

was getting both terrestrial and satellite high-speed links. for the satellite links, i got to help spec satellite tdma earth station (with lots of help from experts helping me understand what i was doing) ... which we then had some external vendors build to the specs. later the vendors said that they had been approached by a large telco requesting that earth stations be built for them to the same specs (little industrial espionage going on here). there was also a lot of FEC and cryptography involved.


re:
https://www.garlic.com/~lynn/2007p.html#61 Damn ....

some other recent crypto thread drift
https://www.garlic.com/~lynn/2007p.html#60 what does xp do when system is copying

one of the things for the internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet

was that all transmission leaving pysical premises were required to be encrypted. in the mid-80s, there was some claim that the internal network had more than half of all link encryptors in the world.

one of the issues for hsdt in the period was that link encryptors at these data rates were really expensive ... so one of the things that got involved in for hsdt was design of encryption hardware that was significantly less expensive (and while doing it, might as well add some additional features).

for slight digression, galois field was involved in both the ECC (error correcting code FEC, i.e. reed-solomon) as well as ECC (elliptical curve cryptography) ... misc. past posts mentioning ECC and/or ECC:
https://www.garlic.com/~lynn/93.html#28 Log Structured filesystems -- think twice
https://www.garlic.com/~lynn/99.html#115 What is the use of OSI Reference Model?
https://www.garlic.com/~lynn/99.html#210 AES cyphers leak information like sieves
https://www.garlic.com/~lynn/99.html#224 X9.59/AADS announcement at BAI this week
https://www.garlic.com/~lynn/2000c.html#38 Does the word "mainframe" still have a meaning?
https://www.garlic.com/~lynn/2001b.html#80 Disks size growing while disk count shrinking = bad performance
https://www.garlic.com/~lynn/2001k.html#71 Encryption + Error Correction
https://www.garlic.com/~lynn/2002e.html#53 Mainframers: Take back the light (spotlight, that is)
https://www.garlic.com/~lynn/2002p.html#53 Free Desktop Cyber emulation on PC before Christmas
https://www.garlic.com/~lynn/2003e.html#27 shirts
https://www.garlic.com/~lynn/2003h.html#3 Calculations involing very large decimals
https://www.garlic.com/~lynn/2003j.html#73 1950s AT&T/IBM lack of collaboration?
https://www.garlic.com/~lynn/2004b.html#30 A POX on you, Dennis Ritchie!!!
https://www.garlic.com/~lynn/2004f.html#37 Why doesn't Infiniband supports RDMA multicast
https://www.garlic.com/~lynn/2004h.html#11 Mainframes (etc.)
https://www.garlic.com/~lynn/2004o.html#43 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2005j.html#4 private key encryption - doubts
https://www.garlic.com/~lynn/2005k.html#25 The 8008
https://www.garlic.com/~lynn/2005n.html#27 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005r.html#52 Go-Back-N protocol?
https://www.garlic.com/~lynn/2005t.html#50 non ECC
https://www.garlic.com/~lynn/2006u.html#44 waiting for acknowledgments
https://www.garlic.com/~lynn/2006u.html#45 waiting for acknowledgments
https://www.garlic.com/~lynn/2007.html#29 Just another example of mainframe costs
https://www.garlic.com/~lynn/2007j.html#4 Even worse than UNIX
https://www.garlic.com/~lynn/2007j.html#67 open source voting

misc. past posts mentioning link encryptors
https://www.garlic.com/~lynn/aadsm14.htm#0 The case against directories
https://www.garlic.com/~lynn/aadsm14.htm#1 Who's afraid of Mallory Wolf?
https://www.garlic.com/~lynn/aadsm18.htm#50 link-layer encryptors for Ethernet?
https://www.garlic.com/~lynn/aadsm18.htm#51 link-layer encryptors for Ethernet?
https://www.garlic.com/~lynn/aadsm23.htm#7 PGP "master keys"
https://www.garlic.com/~lynn/aadsm25.htm#34 Mozilla moves on security
https://www.garlic.com/~lynn/aadsm26.htm#23 It's a Presidential Mandate, Feds use it. How come you are not using FDE?
https://www.garlic.com/~lynn/aadsm27.htm#20 307 digit number factored
https://www.garlic.com/~lynn/aepay11.htm#37 Who's afraid of Mallory Wolf?
https://www.garlic.com/~lynn/2002b.html#56 Computer Naming Conventions
https://www.garlic.com/~lynn/2002d.html#9 Security Proportional to Risk (was: IBM Mainframe at home)
https://www.garlic.com/~lynn/2002d.html#11 Security Proportional to Risk (was: IBM Mainframe at home)
https://www.garlic.com/~lynn/2002j.html#52 "Slower is more secure"
https://www.garlic.com/~lynn/2003e.html#34 Use of SSL as a VPN
https://www.garlic.com/~lynn/2003e.html#36 Use of SSL as a VPN
https://www.garlic.com/~lynn/2003i.html#62 Wireless security
https://www.garlic.com/~lynn/2004g.html#33 network history
https://www.garlic.com/~lynn/2004g.html#34 network history
https://www.garlic.com/~lynn/2004p.html#44 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004p.html#51 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004p.html#55 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2004q.html#57 high speed network, cross-over from sci.crypt
https://www.garlic.com/~lynn/2005c.html#38 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005r.html#10 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2005s.html#28 MVCIN instruction
https://www.garlic.com/~lynn/2005u.html#60 1970s data comms (UK)
https://www.garlic.com/~lynn/2006e.html#37 The Pankian Metaphor
https://www.garlic.com/~lynn/2006j.html#45 Arpa address
https://www.garlic.com/~lynn/2006l.html#46 Mainframe Linux Mythbusting (Was: Using Java in batch on z/OS?)
https://www.garlic.com/~lynn/2006n.html#36 The very first text editor
https://www.garlic.com/~lynn/2006t.html#50 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2006u.html#45 waiting for acknowledgments
https://www.garlic.com/~lynn/2006v.html#22 vmshare
https://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
https://www.garlic.com/~lynn/2007g.html#66 Memory Mapped Vs I/O Mapped Vs others

Damn

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Damn ....
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 22:13:22 -0400
CBFalconer <cbfalconer@yahoo.com> writes:
But you want that signal to get to the other side of the earth.

re:
https://www.garlic.com/~lynn/2007p.html#61 Damn
https://www.garlic.com/~lynn/2007p.html#62 Damn

lots of transponder from geostationary orbit have much smaller footprint ... site with some footprint maps:
http://www.kusat.com/go.php?path=/install/foot.php

transponder receives and then repeats to stations in the same footprint. west coast to uk is double hop (up from west coast over continental us, down to east coast, back up from east coast over atlantic, down to UK) relatively directly overhead has the lowest signal absorbtion by atmospheric moisture ...

misc. post about double hop between west coast and uk
https://www.garlic.com/~lynn/93.html#28 Log Structured filesystems -- think twice
https://www.garlic.com/~lynn/94.html#22 CP spooling & programming technology
https://www.garlic.com/~lynn/99.html#212 GEOPLEX
https://www.garlic.com/~lynn/2002q.html#35 HASP:
https://www.garlic.com/~lynn/2003j.html#19 tcp time out for idle sessions
https://www.garlic.com/~lynn/2004k.html#19 FAST TCP makes dialup faster than broadband?
https://www.garlic.com/~lynn/2004o.html#60 JES2 NJE setup
https://www.garlic.com/~lynn/2004o.html#61 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2006m.html#16 Why I use a Mac, anno 2006
https://www.garlic.com/~lynn/2006s.html#17 bandwidth of a swallow (was: Real core)
https://www.garlic.com/~lynn/2007j.html#39 Newbie question on table design

low-orbit swarms have done inter-satellite forwarding ... get all the way around the world with much lower latency

Damn

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Damn ....
Newsgroups: alt.folklore.computers
Date: Thu, 04 Oct 2007 22:39:30 -0400
Anne & Lynn Wheeler <lynn@garlic.com> writes:
part of my hsdt (high-speed data transport) project
https://www.garlic.com/~lynn/subnetwork.html#hsdt

was getting both terrestrial and satellite high-speed links. for the satellite links, i got to help spec satellite tdma earth station (with lots of help from experts helping me understand what i was doing) ... which we then had some external vendors build to the specs. later the vendors said that they had been approached by a large telco requesting that earth stations be built for them to the same specs (little industrial espionage going on here). there was also a lot of FEC and cryptography involved.


re:
https://www.garlic.com/~lynn/2007p.html#61 Damn
https://www.garlic.com/~lynn/2007p.html#62 Damn
https://www.garlic.com/~lynn/2007p.html#63 Damn

a vendor doing the RF gear was on the other side of the pacific.

the friday before we left on a business trip to do a review, one of the people from the corporate communication organization announced a new internal discussion group ... including the following definitions for basis of discussions
low-speed <9.6kbits medium-speed 19.2kbits high-speed 56kbits very high-speed 1.5mbits

monday morning on the wall of a conference room on the other side of the pacific
low-speed <20mbits medium-speed 100mbits high-speed 200-300mbits very high-speed >600mbits

past posts mentioning the juxtaposition
https://www.garlic.com/~lynn/94.html#33b High Speed Data Transport (HSDT)
https://www.garlic.com/~lynn/2000b.html#69 oddly portable machines
https://www.garlic.com/~lynn/2000e.html#45 IBM's Workplace OS (Was: .. Pink)
https://www.garlic.com/~lynn/2003m.html#59 SR 15,15
https://www.garlic.com/~lynn/2004g.html#12 network history
https://www.garlic.com/~lynn/2005j.html#58 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005n.html#25 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005r.html#9 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006e.html#36 The Pankian Metaphor
https://www.garlic.com/~lynn/2006l.html#4 Google Architecture

Translation of IBM Basic Assembler to C?

Refed: **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers
Date: Fri, 05 Oct 2007 09:39:05 -0400
Mickey <mickeyb@comcast.net> writes:
Me too, as there are several issues I'd like to see the resolution for. I coded IBM's DOS/VSE to MVS BAL converter, and even there, we had issue that simply could not be handled by an automated tool.

re:
https://www.garlic.com/~lynn/2007p.html#48 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#51 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#57 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#59 Translation of IBM Basic Assembler to C?

the application started out trying to capture and represent possible assembler code path execution. i found i was "shooting" a lot of system failures involving incorrect register contents ... typically anomolous code path not initializing the register. attempts to provide psuedo-code representation was somewhat an after thot. i was mainly using it against kernel code that had been written with relatively consistent coding guidelines ... but there were a number of assembler coding possibilities that the application just had to flag and punt ... requiring human assistance to resolve. i did some examples of source updates that tried to demonstrate helping with automated analysis as well as helping with human understandability.

the application also came up flagging some code segments that were likely "dead" code ... not having any obvious code path connectivity ... as well as flagging possible code path sequences resulting in "used" before "set" registers.

the other characteristic already mentioned was that there was some kernel assembler code sequences that were dense test/conditional-branch coding sequences ... that appeared relatively understandable in assembler but became quite convoluted when attempting to represent in higher level psuedo-code if/then/else, do/while, etc. previously referenced thread that discussed this in a little more detail
https://www.garlic.com/~lynn/2006p.html#1 Greatest Software Ever Written?
https://www.garlic.com/~lynn/2006p.html#4 Greatest Software Ever Written?

later, somewhat as an early demonstration of the power of REX(X) i did a kernel debugger tool implemented in REX(X). the "demonstation" part was to effectively create a "replacement" for an existing kernel debugging tool ... written all in assembler (was something like 80kbytes of machine code). The demonstration was to take half-time over three months, and achieve 10 times the function at the same time being 10 times faster (some coding tricks since REX(X) was purely interpreted compared to the assembled implemention). misc. past posts
https://www.garlic.com/~lynn/submain.html#dumprx

the overlap between this and the earlier application was at any particular failure ... what indications were available to reconstruct (aka failure forensics) the code flow leading up to the failure

for some reason, while the failure analysis application was used extensively, world-wide within the corporation ... couldn't quite get it to the point of releasing it to customers.

the assembler application was also looked at somewhat in conjunction with some of the fort knox activities. one of the first uses targeted for 801/risc processors was an effort to replace a large number of internal microprocessors developed for all sorts of purposes with common microprossesors ... including several that were used in low and mid-range 370s ... aka core engine used for emulating 370 instruction. one of the possible "added" features ... in addition to the straight-forward instruction emulation ... was there the possibility of dynamically doing high-use code path recognition ... and doing just-in-time code snippet conversion (aka analyzing 370 code snippet sequences and dynamically converting to 801 instruction sequences). This was originally targeted that the 4331/4341 follow-on processors (i.e. 4361 and 4381) would use 801 as core platform microengine. turns out i helped with the justification killing this effort ... i.e. silicon was becoming dense enuf that it was becoming possible to implement much of 370 directly silicon ... starting the move away from the emulation based paradigm. misc. posts mentioning risc, romp. rios, fort knox and other 801 activities
https://www.garlic.com/~lynn/subtopic.html#801

this dynamic, just-in-time (JIT) capability would have been somewhat equivalent to the ECPS effort ... but done dynamically on the fly ... rather than static, recent post mentioning/discussing ECPS
https://www.garlic.com/~lynn/2007p.html#8 what does xp do when system is copying
https://www.garlic.com/~lynn/2007p.html#36 Writing 23FDs

another project in the 80s, involved looking at the tss/370 kernel as core platform for various operating system efforts. the vm370 kernel had gotten quite complex with lots of spaghetti code from the contributions of hundreds of different people having worked on it over a period of years. by comparison ... after tss/360 was decommuted, the tss/360 (and later tss/370) kernel became fairly tightly coded supported by small number of dedicated people. vm370 had been loosly its original micro-kernel implementation ... somewhat as more and more people with "operating system" background thought it to be the place to throw in everything, including the kitchen sink.

there was a proposal to look at possibly doing something that returned the implementation to a micro-kernel. one of the suggestions was to leveraging the existing tss/370 kernel code as a starting point (as opposed to starting completely from scratch). this was in the period where the tss/370 kernel had undergone the exercise that used a stripped down version with unix api layered ontop for bell. So there was look at comparing the overall sizes and complexity of the existing vm370 kernel code base vis-a-vis the tss/370 kernel code base. I also used my pli application to try and create representation of the code path complexity of the vm370 kernel code vis-a-vis the tss/370 kernel code. The analysis program ran against the assembler listing output which would also attempt to include the instruction "displacement" fields to help resolve ambiquity. One of the differences between the os/360 genre of assemblers and the tss/370 assembler was that the tss/370 assembler included a space identifier for each displacement field (i.e. explicitly identifying which csect or dsect a displacement applied to). in os/360 it remained ambiquous which possible space the assembler was taking a symbolic reference from (aka to resolve that information would have required modifying the assembler application to preserve the information).

old post/thread discussion the complexity investigation comparing tss and vm
https://www.garlic.com/~lynn/2001m.html#53 TSS/360

what does xp do when system is copying

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Fri, 05 Oct 2007 13:36:36 -0400
greymaus <greymausg@mail.com> writes:
No insurance policy I have ever seen will cover unlimited costs. Somewhere in that policy is a proviso. (The cost of damage to the car is limited to the value of the car, the cost of damage to the driver is unlikely to be covered completely)

then there can be various levels of triage that goes on ... at some point when resources are becoming saturated ... attempt to allocate resources for maximum return on investment (the optimal outcomes using the available resources). i was once on a flt seated nxt to a couple paramedics that had volunteered to assist with some major natural disaster in the Caribbean ... they were going thru their supplies including a pile of body triage tags ... i came away with a tutorial on triage and a couple souvenirs.

slightly related previous subthread about lifetime costs for individuals born to addicted mothers
https://www.garlic.com/~lynn/2007o.html#74 Horrid thought about Politics, President Bush, and Democrats

along with mention of various programs that seem to start out small but even with simple middle school arithmetic showing that they could eventually exceed all available resources.

and even more drift along this line
https://www.garlic.com/~lynn/2007p.html#22 U.S. Cedes Top Spot in Global IT Competitiveness

what does xp do when system is copying

Refed: **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: what does xp do when system is copying
Newsgroups: alt.folklore.computers
Date: Fri, 05 Oct 2007 13:54:32 -0400
Morten Reistad <first@last.name> writes:
You can in a sense call the IP number a global ppn, except it has three parts; one that is the global discriminator, one that is the isp-internal discriminator, and one that is the network-local one. These occupy different numbers of bits. It is difficult to see, but the routers know.

the original infrastructure somewhat supported total routing anarchy ... (any ip-address could theoretically get routed in any direction) which was quickly showing that it didn't scale.

during the time that we had been called in to consult with this small client/server startup that wanted to do payment transactions .... now frequently referred to as "electronic commerce"

we were applying a lot of the high availability strategies that we had developed during our work on our ha/cmp product
https://www.garlic.com/~lynn/subtopic.html#hacmp

to the "payment gateway" deployment
https://www.garlic.com/~lynn/subnetwork.html#gateway

and we were looking at both advertising alternate routes for ip-addresses (when there were various kinds of faults in the internet infrastructure) as well as advertising multiple A-records in dns (i.e. associated multiple, different ip address with a single host name).

it was in this period that the internet backbone infrastructure made the decision to migrate to hierarchical routing (which scaled significantly better) ... which cut off our plans to be able to advertise arbitrary routes for our various ip-addresses ... leaving just multiple a-records as a high availability mechanism.

misc. past posts mentioning internet and/or arpanet
https://www.garlic.com/~lynn/subnetwork.html#internet

and misc. past posts mentioning working with various aspects applicable to nsfnet backbone
https://www.garlic.com/~lynn/subnetwork.html#nsfnet

one of the issues was that we had sign-off on numerous aspects of server operation related to payment transactions ... so we could make sure that webserver tcp/ip code supported multiple a-records when making connections to the payment gateway. We also claimed that the major webservers were having increasing requirement for improving availability ... primarily using multiple a-record strategy. The issue then was that the client/browser code needed to support multiple a-record strategy when making connections. We spent nearly a year working on getting the client/browser code to include multiple a-record support. initially the response was that multiple a-record support was too advance and complex (i.e. it hadn't been taught in some introductory tcp/ip programming close) ... we responded with several examples from ancient 4.3 tahoe code showing examples of client multiple a-record support.

misc. past posts mentioning multiple a-record support:
https://www.garlic.com/~lynn/96.html#34 Mainframes & Unix
https://www.garlic.com/~lynn/99.html#16 Old Computers
https://www.garlic.com/~lynn/99.html#158 Uptime (was Re: Q: S/390 on PowerPC?)
https://www.garlic.com/~lynn/99.html#159 Uptime (was Re: Q: S/390 on PowerPC?)
https://www.garlic.com/~lynn/99.html#164 Uptime (was Re: Q: S/390 on PowerPC?)
https://www.garlic.com/~lynn/2002.html#23 Buffer overflow
https://www.garlic.com/~lynn/2002.html#32 Buffer overflow
https://www.garlic.com/~lynn/2002.html#34 Buffer overflow
https://www.garlic.com/~lynn/2003.html#30 Round robin IS NOT load balancing (?)
https://www.garlic.com/~lynn/2003c.html#8 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#12 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#24 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#25 Network separation using host w/multiple network interfaces
https://www.garlic.com/~lynn/2003c.html#57 Easiest possible PASV experiment
https://www.garlic.com/~lynn/2004k.html#32 Frontiernet insists on being my firewall
https://www.garlic.com/~lynn/2004o.html#53 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2005f.html#55 What is the "name" of a system?
https://www.garlic.com/~lynn/2005g.html#21 Protocol stack - disadvantages (revision)
https://www.garlic.com/~lynn/2005n.html#5 Wildcard SSL Certificates
https://www.garlic.com/~lynn/2005n.html#34 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005o.html#24 is a computer like an airport?
https://www.garlic.com/~lynn/2005r.html#32 How does the internet really look like ?
https://www.garlic.com/~lynn/2005r.html#39 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2006j.html#15 30 hop limit
https://www.garlic.com/~lynn/2007d.html#36 MAC and SSL
https://www.garlic.com/~lynn/2007i.html#44 latest Principles of Operation
https://www.garlic.com/~lynn/2007p.html#34 what does xp do when system is copying

Translation of IBM Basic Assembler to C?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers
Date: Fri, 05 Oct 2007 14:02:32 -0400
Mickey <mickeyb@comcast.net> writes:
This was EXACTLY the point I was making. If one cannot convert 100% of VSE BAL to MVS BAL without human intervention, the path to C will be FAR more problematic. The basics of the VSE to MVS conversion was that we were able to convert 95% of the code, but the 5% that remained took 95% of the time to9 x :)

note, i believe that some of the newer generation of 370 emulators running on i86 platforms do have the capability of performing 370 code snippet dynamic JIT-translation to i86 (however, there may be all sort of caveats, restrictions, and limitations)

re:
https://www.garlic.com/~lynn/2007p.html#48 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#51 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#57 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#59 Translation of IBM Basic Assembler to C?
https://www.garlic.com/~lynn/2007p.html#65 Translation of IBM Basic Assembler to C?

GETMAIN/FREEMAIN and virtual storage backing up

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: GETMAIN/FREEMAIN and virtual storage backing up
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Fri, 05 Oct 2007 15:57:33 -0400
peter.hunkeler@ibm-main.lst (Hunkeler Peter , KIUK 3) writes:
OS/360 was a real storage only operating system. DAT was introduced with S/370. OS/390 could run on that hardware but not use DAT (and other new hardware facilites).

DAT was introduced on 360/67 ... basically 360/65 with dynamic address translation ... at least in its single processor version (although 360/67 offered both 24-bit as well as 32-bit virtual addressing modes). The 360/67 multiprocessor did offer some additional features vis-a-vis 360/65 multiprocessor ... like all 360/67 processors could directly address all physical channels (while 360/65 multiprocessor was limited to addressing common real storage ... but didn't provide channel multiprocessor connectivity).

tss/360 was to be the official operating system supporting 360/67 but ran into lots of problems and was decommuted.

however, the science center
https://www.garlic.com/~lynn/subtopic.html#545tech

did do a virtual machine monitor called cp40 for a 360/40 with custom hardware dynamic address translation modifications ... and then morphed it into cp67 when production 360/67 machines became available. cp67 was the precursor to vm370 when virtual memory support was announced for 370.

the initial prototype for os/vs2 svs ... precursor to os/vs2 mvs ... was a custom modified mvt system ... initially running on 360/67 machines. it had hack on the side to create a single 16mbyte virtual address space and some simple interrupt handler for page faults. it also had CCWTRANS (and associated routines) from cp67 wired into the side to handle the application channel programs (from excp/svc0) to "real" channel program translation.

This is an issue common for both virtual machine monitors and the os/vs genre of operation systems ... where the applications built channel programs that were then passed to be directly executed. The 360/370 genre of channels required "real" addresses for execution ... but the application (and/or virtual machine) built channel programs all had "virtual address" specifications. To handle the situation, a copy of the original channel program had to be created with the specified virtual addresses replaced with the corresponding real addresses.

for other topic drift ... charlie's work on fine-grain locking supporting cp67 multiprocessor operation resulted in his invention of the compare&swap instruction (mnemonic chosen because CAS are charlie's initials). initial forey with pok and 370 architecture owners were met with brick wall resistance because the pok favorite son operating system people claimed that the test-and-set instruction (from 360 days) were more than sufficient for all multiprocessor support. The challenge was in order to justify comapre-and-swap instruction was a non-multiprocessor use had to be defined/invented. The result was the multi-threaded use description (whether or not the environment was multiprocessor) that current shows up in appendix section in principles of operation. misc. posts mentioning multiprocessor and/or compare&swap instruction
https://www.garlic.com/~lynn/subtopic.html#smp

somewhat related to the original thread subject ... when i first got a copy of cp67 at the university as an undergraduate ... when virtual machine logged on ... the virtual address space "backing store" (for the virtual machine) were all initialized to a single, special "zeros" page on the cp67 ipl/boot volume. Each corresponding page table entry that pointed to the "zeros" page also had a flag that if the virtual page was ever modified/changed (after being fetched into real storage), it was to have a new (disk paging) backing location dynamically allocated.

an early enhancement that i made to cp67 ... was to initialize freshly, created virtual storage with indication that on initial page fault, that instead of fetching the virtual page from some disk location ... that a real page was to be allocated and then simply cleared to zeros (i used a bxle loop with stm of ten registers that had been all cleared to zeros).

The "recompute" flag still remained the same ... i.e. if virtual execution subsequently "modified" a zeros page ... it would have a new back disk page location dynamically allocated.

GETMAIN/FREEMAIN and virtual storage backing up

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: GETMAIN/FREEMAIN and virtual storage backing up
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Fri, 05 Oct 2007 19:16:06 -0400
DASDBill2 writes:
This has always intrigued me. What was done to eliminate the possibility that the channel had to access a virtual page that had been paged out? An enabled application or system code that is copying and translating virtual-to-real addresses can always suffer a page fault, wait for the page-in, and resume as if nothing had happened, but channels cannot wait for page-fault resolution. Or could they?

re:
https://www.garlic.com/~lynn/2007p.html#69 GETMAIN/FREEMAIN and virtual storage backing up

part of CCWTRANS creation of "shadow" channel programs (with real addresses) included pinning/locking the associated virtual pages (to those real-addresses). after the real i/o had completed (running with the "shadow" channel program), there was an UNTRANS process ... that included unpinning the associated virtual pages.

the original 370 virtual memory architecture included some number of features that didn't actually make it out. i've posted before about some features that the 165 hardware engineers ran into problems ... creating full 370 virtual memory hardware retrofit to the 165 ... and in escalation where they claimed they could pickup six months on the delivery schedule if they could drop the features ... and the pok favorite son operating system expressed they could see no use for the features. dropping the features then met that all the other processors had to undo their implementation and any software that was already completed that would use the additional features ... and to be reworked.

there had been channel operation with virtual addresses defined (including being able to suspend because of a page-fault and then be resumed) and there was folklore there was even patents on such channel operation with virtual addresses. this never got very far into the 370 architecture.

for lots of topic drift ... past posts mentioning issue with 370/165 virtual memory hardware retrofit schedule and dropping a number of features to make up six monhts
https://www.garlic.com/~lynn/95.html#3 What is an IBM 137/148 ???
https://www.garlic.com/~lynn/99.html#7 IBM S/360
https://www.garlic.com/~lynn/99.html#204 Core (word usage) was anti-equipment etc
https://www.garlic.com/~lynn/99.html#209 Core (word usage) was anti-equipment etc
https://www.garlic.com/~lynn/2000d.html#82 "all-out" vs less aggressive designs (was: Re: 36 to 32 bit transition)
https://www.garlic.com/~lynn/2000f.html#35 Why IBM use 31 bit addressing not 32 bit?
https://www.garlic.com/~lynn/2000f.html#55 X86 ultimate CISC? No. (was: Re: "all-out" vs less aggressive designs)
https://www.garlic.com/~lynn/2000f.html#63 TSS ancient history, was X86 ultimate CISC? designs)
https://www.garlic.com/~lynn/2000g.html#10 360/370 instruction cycle time
https://www.garlic.com/~lynn/2000g.html#15 360/370 instruction cycle time
https://www.garlic.com/~lynn/2000g.html#16 360/370 instruction cycle time
https://www.garlic.com/~lynn/2000g.html#21 360/370 instruction cycle time
https://www.garlic.com/~lynn/2001.html#63 Are the L1 and L2 caches flushed on a page fault ?
https://www.garlic.com/~lynn/2001b.html#37 John Mashey's greatest hits
https://www.garlic.com/~lynn/2001k.html#8 Minimalist design (was Re: Parity - why even or odd)
https://www.garlic.com/~lynn/2002.html#48 Microcode?
https://www.garlic.com/~lynn/2002.html#50 Microcode?
https://www.garlic.com/~lynn/2002.html#52 Microcode?
https://www.garlic.com/~lynn/2002g.html#47 Why are Mainframe Computers really still in use at all?
https://www.garlic.com/~lynn/2002l.html#51 Handling variable page sizes?
https://www.garlic.com/~lynn/2002m.html#2 Handling variable page sizes?
https://www.garlic.com/~lynn/2002m.html#68 Tweaking old computers?
https://www.garlic.com/~lynn/2002n.html#10 Coherent TLBs
https://www.garlic.com/~lynn/2002n.html#15 Tweaking old computers?
https://www.garlic.com/~lynn/2002n.html#23 Tweaking old computers?
https://www.garlic.com/~lynn/2002n.html#32 why does wait state exist?
https://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
https://www.garlic.com/~lynn/2002p.html#44 Linux paging
https://www.garlic.com/~lynn/2003e.html#12 Resolved: There Are No Programs With >32 Bits of Text
https://www.garlic.com/~lynn/2003f.html#56 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003g.html#19 Multiple layers of virtual address translation
https://www.garlic.com/~lynn/2003g.html#20 price ov IBM virtual address box??
https://www.garlic.com/~lynn/2003h.html#37 Does PowerPC 970 has Tagged TLBs (Address Space Identifiers)
https://www.garlic.com/~lynn/2003m.html#34 SR 15,15 was: IEFBR14 Problems
https://www.garlic.com/~lynn/2003m.html#37 S/360 undocumented instructions?
https://www.garlic.com/~lynn/2004c.html#6 If the x86 ISA could be redone
https://www.garlic.com/~lynn/2004p.html#8 vm/370 smp support and shared segment protection hack
https://www.garlic.com/~lynn/2005b.html#53 The mid-seventies SHARE survey
https://www.garlic.com/~lynn/2005b.html#62 The mid-seventies SHARE survey
https://www.garlic.com/~lynn/2005e.html#53 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005e.html#57 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005e.html#59 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005f.html#1 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005f.html#45 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005g.html#17 DOS/360: Forty years
https://www.garlic.com/~lynn/2005h.html#10 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005h.html#18 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005j.html#39 A second look at memory access alignment
https://www.garlic.com/~lynn/2005p.html#45 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2005r.html#51 winscape?
https://www.garlic.com/~lynn/2005s.html#23 winscape?
https://www.garlic.com/~lynn/2006.html#13 VM maclib reference
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006e.html#0 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#5 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#12 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#46 using 3390 mod-9s
https://www.garlic.com/~lynn/2006i.html#4 Mainframe vs. xSeries
https://www.garlic.com/~lynn/2006i.html#9 Hadware Support for Protection Bits: what does it really mean?
https://www.garlic.com/~lynn/2006i.html#23 Virtual memory implementation in S/370
https://www.garlic.com/~lynn/2006j.html#5 virtual memory
https://www.garlic.com/~lynn/2006j.html#31 virtual memory
https://www.garlic.com/~lynn/2006j.html#41 virtual memory
https://www.garlic.com/~lynn/2006k.html#57 virtual memory
https://www.garlic.com/~lynn/2006l.html#22 Virtual Virtualizers
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006n.html#16 On the 370/165 and the 360/85
https://www.garlic.com/~lynn/2006r.html#36 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006s.html#30 Why magnetic drums was/are worse than disks ?
https://www.garlic.com/~lynn/2006s.html#61 Is the teaching of non-reentrant HLASM coding practices ever defensible?
https://www.garlic.com/~lynn/2006t.html#1 Is the teaching of non-reentrant HLASM coding practices ever
https://www.garlic.com/~lynn/2006u.html#60 Why these original FORTRAN quirks?
https://www.garlic.com/~lynn/2006y.html#26 moving on
https://www.garlic.com/~lynn/2006y.html#35 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2006y.html#40 Multiple mappings
https://www.garlic.com/~lynn/2007d.html#32 Running OS/390 on z9 BC
https://www.garlic.com/~lynn/2007f.html#7 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007f.html#14 more shared segment archeology
https://www.garlic.com/~lynn/2007f.html#16 more shared segment archeology
https://www.garlic.com/~lynn/2007g.html#72 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007j.html#43 z/VM usability
https://www.garlic.com/~lynn/2007k.html#28 IBM 360 Model 20 Questions
https://www.garlic.com/~lynn/2007n.html#35 IBM obsoleting mainframe hardware
https://www.garlic.com/~lynn/2007o.html#26 Tom's Hdw review of SSDs
https://www.garlic.com/~lynn/2007o.html#41 Virtual Storage implementation
https://www.garlic.com/~lynn/2007o.html#53 Virtual Storage implementation

Translation of IBM Basic Assembler to C?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Translation of IBM Basic Assembler to C?
Newsgroups: alt.folklore.computers
Date: Sat, 06 Oct 2007 09:49:03 -0400
Frank McCoy <mccoyf@millcomm.com> writes:
Yup. Never found a single thing I could do in Pascal I couldn't do in C. The reverse, is not so true. C really *is* a language that allows you to shoot yourself in the foot very thoroughly ... Almost as much as Assembly-language will.

for instance ... that nature of the pascal language contributed significantly to avoiding writing code that would result in failures related to lengths and/or buffers ... which is almost the inverse for C language (it seems to go out of its way to encourage the writing of code that results in length and buffer related failures) ... misc. past posts mentioning the issue
https://www.garlic.com/~lynn/subintegrity.html#overflow

discussed before is that it isn't necessarily directly the C language ... but the whole environment related C language implementations.

somewhat earlier in this thread ...
https://www.garlic.com/~lynn/2007p.html#65 Translation of IBM Basic Assembler to C?

i mentioned doing extensive investigation into what caused failures in the cp67 and vm370 kernels ... both completely implemented in 360/370 mainframe assembler. Even tho, the implementations were completely in assembler ... there were actually extremely few buffer length related coding errors. It wasn't that the assembler prevented it from happening ... but that the cp67 and vm370 coding conventions (which also occurs in a broad range of mainframe assembler environments) were that there was normally explicitly implemented lengths. The common C-language coding conventions with implemently implemented lengths via null-terminated strings seems to have greatly encouraged faulty coding conventions resulting in very high percentage of failures related to length processing.

a high percentage of cp67 and vm370 kernel failures were related to register content management (frequently anomolous execution paths that failed to establish register contents that were needed later) and inadequate synchronization/serialization (things like dangling references to dynamic storage that had been previously de-allocated/released).

i've mentioned before that as part of releasing my (dynamic, adaptive) resource manager,
https://www.garlic.com/~lynn/subtopic.html#fairshare
https://www.garlic.com/~lynn/subtopic.html#wsclock

i included a complete redo of the kernel serialization functions. Part of this was that in preparation for releasing the resource manager, had developed an automated benchmarking process
https://www.garlic.com/~lynn/submain.html#benchmark

the final benchmarking sequence perparing for the release of the resource manager involved 2000 benchmarks that took three months elapsed time to run. a lot of the benchmarks were involved in calibrated and validating the dynamic adaptive resource manager operation across a broad range of workloads and configurations. however, there were also an extensive set of extreme stress benchmarking ... loads that were 10+ times what might be seen in any sort of live configuration. One benchmark so heavily loaded the paging systems ... that the elapsed time to service a page fault request was on the order of one second (because the number of page requests in the queue was so large ... even operating in excess of 300 page i/os per second).

A question for the Wheelers - Diagnose instruction

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: A question for the Wheelers - Diagnose instruction
Newsgroups: alt.folklore.computers
Date: Sat, 06 Oct 2007 09:26:09 -0400
Paul Hinman <paul.hinman@shaw.ca> writes:
The PoP or POO, take your choice, said that the diagnose instruction was model dependent. Out of curiosity what sort of things did it do when invoked. I am not asking for an exhaustive list, just an indication of the sort of things that it might have done.

as indicated in other responses ... it basically allowed extensive access to internal machine operations ... it was used routinely for various field engineering diagnostic applications. most 360s were implemented as (vertical) microcode ... and the actual processor engine for each model was different ... so interactions with the native processor engine would tend to be "model dependent"

however, for other topic drift ... as an undergraduate, i had done extensive performance enhancements work on os/360 ... and then lots of cp67 performance enhancments; pathlength reductions, algorithms, etc ... for os/360 running in virtual machine. old posting with reference to part of old presentation that i gave at fall '68 share meeting in boston
https://www.garlic.com/~lynn/94.html#18 CP/67 & OS MFT14

i then turned my attention to doing some performance enhancements for cms execution environment. one of the largest overheads for cms environment was involved asynchronous disk i/o simulation; sio instruction, channel program translation, lpsw wait state, i/o interrupt simulation, etc ... recent post/thread mentioning channel program translation
https://www.garlic.com/~lynn/2007p.html#69 GETMAIN/FREEMAIN and virtual storage backing up
https://www.garlic.com/~lynn/2007p.html#70 GETMAIN/FREEMAIN and virtual storage backing up

since cms was single user environment ...... it didn't actually overlap any execution with asynchronous disk i/o. also all of cms filesystem disk i/o followed a very simple pattern. so first step was to define a new CCW op-code that was defined as performing the complete cms disk i/o operation ... so rather than general case translation of multiple CCW channel program ... the single CCW effectively flagged the operation performing the complete operation. This cut down on the CCWTRANs channel program translation overhead. The CCW was also defined as an immediate operation ... i.e. the SIO that initiated the channel program would complete with CC=1, CSW-stored ... i.e. rather than simulating a whole sequence of CMS operation associated with asynchronous disk i/o ... CMS execution would continue until the disk channel program had completed.

so in dealing with people at science center (primarily Bob Adair):
https://www.garlic.com/~lynn/subtopic.html#545tech

the implementation with the custom CCW op-code was criticized as violating the principles of operation ... however, the resulting performance improvement for cms environments was too significant to completely ignore. the "suggestion" was that all (cp67 virtual machine) violations of principles of operation needed to be implemented via the "diagnose" instruction ... i.e. the cp67 kernel "becomes" the model dependent implementation of the virtual machine ... and any access by the virtual machine to (cp67 kernel) virtual machine "model" dependent features needed to be implemented via a (virtual) diagnose instruction.

misc. past posts mentioning (virtual) diagnose instruction
https://www.garlic.com/~lynn/99.html#95 Early interupts on mainframes
https://www.garlic.com/~lynn/2001b.html#32 z900 and Virtual Machine Theory
https://www.garlic.com/~lynn/2001m.html#45 Commenting style (was: Call for folklore)
https://www.garlic.com/~lynn/2002d.html#31 2 questions: diag 68 and calling convention
https://www.garlic.com/~lynn/2002h.html#62 history of CMS
https://www.garlic.com/~lynn/2003.html#60 MIDAS
https://www.garlic.com/~lynn/2003m.html#36 S/360 undocumented instructions?
https://www.garlic.com/~lynn/2003p.html#9 virtual-machine theory
https://www.garlic.com/~lynn/2003p.html#40 virtual-machine theory
https://www.garlic.com/~lynn/2004.html#8 virtual-machine theory
https://www.garlic.com/~lynn/2004d.html#66 System/360 40 years old today
https://www.garlic.com/~lynn/2004f.html#23 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2004f.html#47 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
https://www.garlic.com/~lynn/2005b.html#23 360 DIAGNOSE
https://www.garlic.com/~lynn/2005b.html#38 Relocating application architecture and compiler support
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005o.html#35 Implementing schedulers in processor????
https://www.garlic.com/~lynn/2005t.html#8 2nd level install - duplicate volsers
https://www.garlic.com/~lynn/2006w.html#29 Descriptive term for reentrant program that nonetheless is
https://www.garlic.com/~lynn/2007d.html#28 SVCs
https://www.garlic.com/~lynn/2007e.html#19 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007f.html#33 Historical curiosity question
https://www.garlic.com/~lynn/2007h.html#8 whiny question: Why won't z/OS support the HMC 3270 emulator

GETMAIN/FREEMAIN and virtual storage backing up

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: GETMAIN/FREEMAIN and virtual storage backing up
Newsgroups: bit.listserv.ibm-main
Date: Sat, 06 Oct 2007 11:46:18 -0400
peter.hunkeler@ibm-main.lst (Hunkeler Peter , KIUK 3) writes:
I based my statement on the IBM brochure "MVS... a long and rich heritage" (GC28-1594); I haven't been in that business yet back then, so I admit, I do not know from own experience.

The details in your statement make it look very trustworthy to me. Thanks.


re:
https://www.garlic.com/~lynn/2007p.html#69 GETMAIN/FREEMAIN and virtual storage backing up
https://www.garlic.com/~lynn/2007p.html#70 GETMAIN/FREEMAIN and virtual storage backing up

for 360/67 reference, try functional characteristics (GA27-2719) at bitsavers (... there is both a -0 and a -2)
http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/

GETMAIN/FREEMAIN and virtual storage backing up

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: GETMAIN/FREEMAIN and virtual storage backing up
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Sat, 06 Oct 2007 13:37:52 -0400
"Bill Ogden" <wogden@attglobal.net> writes:
The statements about the 360/67 are correct. It was a little ahead of its time in several ways. The 67's DAT design was a bit different than the later S/370 DAT that was used by MVS, and is typically not considered in the history lines for MVS.

re:
https://www.garlic.com/~lynn/2007p.html#69 GETMAIN/FREEMAIN and virtual storage backing up
https://www.garlic.com/~lynn/2007p.html#70 GETMAIN/FREEMAIN and virtual storage backing up
https://www.garlic.com/~lynn/2007p.html#73 GETMAIN/FREEMAIN and virtual storage backing up

other than original os/vs2 prototype implementation was done with mvt kernel modified with a lot of code borrowed from cp67 running on 360/67

i had done a lot of work with virtual memory as an undergraduate
https://www.garlic.com/~lynn/subtopic.html#wsclock
and then later after joining the science center
https://www.garlic.com/~lynn/subtopic.html#545tech

and in the early 70s several of us would make frequent sojourns to pok (out the mass pike and down the taconic) for architecture meetings (virtual memory, multiprocessing, etc) ... including architecture meetings where several features were pulled from 370 virtual memory architecture in order to buy 370/165 engineers six month schedule in their hardware implementation.

there were other issues in the os/vs2 virtual memory implementation (spanning both svs and mvs) ... one had to do with the page replacement algorithm implementation ... the standard is LRU (least recently used) or various approximations related of LRU. The pok performance modeling group had discovered that (at a micro-level) that if a non-changed page was selected for replacement ... that the latency to service a page fault was much less than if a changed page was selected for replacement (non-changed pages could be immediately discarded, without needing to write, relying on copy already out on disk). However, i repeatedly pointed out to them that weighting the replacement algorithm based on changed bit as opposed to the reference bit ... severely negated any recently used strategy. They went ahead with it anyway (possibly they didn't have very good macro-level simulation capability and stuck with just the micro-level simulation, couldn't make an informed judgement). in any case, it was well into a number of MVS releases before somebody got an award for improving MVS performance by changing to give more weight to the reference use in replacement decisions (example was that under the earlier strategy, the replacement algorithm was selecting high-use, shared/system, executable linkpack virtual pages for replacement before private, lower-use application data virtual pages).

another influence of cp67 and the science center was a joint project between endicott and the science center to do custom modifications to cp67 to provide "370" (virtual memory architecture) virtual machines. For instance, this required cp67 simulating 370 architecture hardware format virtual memory tables ... rather than 360/67 architecture hardware format virtual memory tables ... internally, this was commonly referred to as "cp67h" system. After that was done, there were modifications to cp67 to make it run on 370 hardware ... building 370 format tables ... rather than 360/67 format tables. Internally, this was commonly referred to as cp67i.

The first operational 370 hardware supporting virtual memory was a 370/145 engineering processor. However, cp67h with cp67i running in a 370 virtual machine was in regular operation a year before the 370/145 engineering box was operational. In fact, cp67i system was used as initial software brought up on the 370/145 engineering box (first 370 hardware with working virtual memory)

One of the complexities in the cp67h & cp67i development was it was all done on the science center cp67 timesharing service. Information about virtual memory for 370 was an extremely tightly held corporate secret ... and there were a variety of non-employees (from numerous education institutions in the cambridge area) with regular access to the science center timesharing service. As a result ... nearly all of the cp67h work went on in a 360/67 virtual machine (not on the bare hardware) to isolate it from any non-employee prying eyes.

lots of past posts about use of cp67 for timesharing service ... both internally and externally (including mentioning it being used to address various security issues)
https://www.garlic.com/~lynn/submain.html#timeshare

misc past posts mentioning cp67h and/or cp67i systems:
https://www.garlic.com/~lynn/2002j.html#0 HONE was .. Hercules and System/390 - do we need it?
https://www.garlic.com/~lynn/2004b.html#31 determining memory size
https://www.garlic.com/~lynn/2004h.html#27 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004p.html#50 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2005c.html#59 intel's Vanderpool and virtualization in general
https://www.garlic.com/~lynn/2005d.html#66 Virtual Machine Hardware
https://www.garlic.com/~lynn/2005g.html#17 DOS/360: Forty years
https://www.garlic.com/~lynn/2005h.html#18 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005i.html#39 Behavior in undefined areas?
https://www.garlic.com/~lynn/2005j.html#50 virtual 360/67 support in cp67
https://www.garlic.com/~lynn/2005p.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006e.html#7 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006f.html#5 3380-3390 Conversion - DISAPPOINTMENT
https://www.garlic.com/~lynn/2006l.html#21 Virtual Virtualizers
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006o.html#19 Source maintenance was Re: SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006q.html#1 Materiel and graft
https://www.garlic.com/~lynn/2006q.html#45 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006q.html#49 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006w.html#3 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007b.html#20 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
https://www.garlic.com/~lynn/2007i.html#16 when was MMU virtualization first considered practical?




previous, next, index - home