From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: FBA rant Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Thu, 08 Mar 2007 13:49:58 -0700DASDBill2@ibm-main.lst wrote:
for other drift ... if the geometry characteristics were to be ignored then you could treat the six byte seek argument as the track number (allowing the device to interpret the physical characteristics ... somewhat similar to what FBA does in the locate command for the record number).
i.e. CKD seek command is six byte field
https://www.garlic.com/~lynn/gcard.html#26.1
treated as purely a 2**48 bit numeric would allow for nearly 300 trillion tracks
and FBA locate command
https://www.garlic.com/~lynn/gcard.html#26.2
is eight byte number, which could allow for 2**64 512-byte records (i.e. 2**9 times 2**64 bytes, 2**73 bytes per device)
for something complete different, quicky search engine use turned up
this (IBM) patent reference on mapping tof CKD to native FBA hardware
http://www.patentstorm.us/patents/6112277-description.html
and title of above:
Method and means for reducing device contention by random accessing
and partial track staging of records according to a first DASD format
but device mapped according to a second DASD format
... snip ...
The above patent also references another patent:
Reference should be made to Menon, U.S. Pat. No. 5,301,304, "Emulating
Records in One Record Format in Another Record Format", issued Apr. 5,
1994. Menon exemplifies the state of the art in format conversion disclosing
an emulation method for rapidly accessing CKD records in which the CKD records
are stored on a disk drive in FBA format.
... snip ...
now as suggested in previous post
https://www.garlic.com/~lynn/2007e.html#46 FBA rant
what would be the difficulty in modifying whatever MVS calls its current incantation of CCWTRANS ... to morph application space EXCP CCWs that are still doing things like multi-track VTOC/PDS search into FBA operations ... aka there are hardware control units and hypervisor software that perform such morphing ... then if the original VS2 started out with (cp67's) CCWTRANS moved into the VS2 kernel ... why can't more current hypervisor technology be moved directly into the VS2 kernel
here is decade-plus old descriptive narative of ECKD (from vm mailing list)
... basically discussing the retrofitting FBA-like channel commands to
CKD architecture:
http://listserv.uark.edu/scripts/wa.exe?A2=ind9604&L=ibmvm&T=0&P=9321
from above:
ECKD channel programs completely describe the nature and scope of data
transfer operation before the first data transfer command is executed.
These "predictive" channel programs "remove all possible surprise" from
the storage subsystem during data transfer operations. Like Fixed-Block
Architecture (FBA) DASD, ECKD uses the DEFINE EXTENT channel command to
delimit the range of tracks which may be affected by a channel program.
ECKD is still CKD: each record can contain Count, Key, and Data areas.
However, the count need not be CCHHR, as on conventional CKD DASD; one
could number the records sequentially, like FBA blocks.
... snip ...
as opposed to post
https://www.garlic.com/~lynn/2007e.html#40 FBA rant
with my nearly 25yr old email commenting on ECKD
https://www.garlic.com/~lynn/2007e.html#email820907
slightly older random email reference to CALYPSO and ECKD ... in the
following DMKTRD is the vm370 kernel module responsible for cp
"trace" command related to tracing virtual machine i/o and ccws.
Date: 10/10/80 15:28:17
To: wheeler
Lynn,
The new DMKTRD will trace CALYSPO' new Define Extent and Locate Record
CCW's. A 16 byte argument is displayed on the trace, immediately below the
trace of the CCW itself
Fix was tested virtual VM under VM and will go on 31B at STL by next
Tuesday.
... snip ... top of post, old email index
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Thu, 08 Mar 2007 16:27:46 -0700Patrick O'Keefe wrote:
followed by TIC CCW to location "8" (assuming it is a CCW) and when the I/O operation completes does a LPSW on location zero.
for three card loader, you would have
first card read by IPL button with 24 bytes containing
8 byte PSW 8 byte READ CCW for 80 bytes of 2nd card, command chained to 8 byte READ CCW for 80 bytes of 3rd card
with TIC operation to +8, the first read CCW.
you now have a 160byte program+data and the PSW is setup to start with the first instruction just read. this small program would loop reading (following) cards until it got to last card and then branch to the start of the program just read.
all of this came out of BPS. In fact, the CP67 kernel process was to collect all the CP67 kernel TXT files and slap BPS loader on the front. The BPS loader resolves all the ESD symbols and when finished branchs to the address/symbol in the LDT card ... which pointed to the "SAVECP" entry point. SAVECP would take the freshly loaded core/storage image and write it to disk.
The CCWs were compatible between cards and tape ... so you could have actual physical cards ... and/or have placed card image on tape and performed the IPL operation on tape drive (instead of card reader).
in cp67 and vm370, the 3card loader was used to slap on the front of single module "stand alone" utilities (like DDR, physical tape<->disk copy routine).
3card loader could handle card deck containing single assemble, TXT file.
BPS loader could handle card deck with multiple TXT decks ... needing to resolve ESDs adcons between TXT decks
a couple old posts mentioning 3card loader:
https://www.garlic.com/~lynn/99.html#135 sysprog shortage - what questions would you ask?
https://www.garlic.com/~lynn/2001c.html#87 "Bootstrap"
CP67 didn't originally ship with source for the BPS loader (although it shipped with source for everything else). One of the modifications I made at the university involved changes to support "paging" portions of the (fixed) cp67 kernel ... the process I used created a quite a few new ESD entry symbols. Basic BPS loader provided with CP67 only supported 256 ESD symbols ... which I managed to exceed. It was real pain trying to deal with the number of ESD limitation until i found a copy of the BPS loader source that i could fix/modify.
The simplest way then to create a "new" BPS loader was to assemble the source and slap a 3card loader on the front of the BPS TXT file.
Even easier was to include 3 assembler "PUNCH" statements in the source of the stand-alone utility (including the BPS assembler source) that punched hex image for the 3card loader (in front of the TXT deck being generated).
this has discussion of 3card loader in conjunction with DDRXA
http://www.cbttape.org/~jjaeger/cdrom.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: FBA rant Newsgroups: bit.listserv.ibm-main Date: Thu, 08 Mar 2007 16:58:15 -0700DASDBill2 writes:
there is
https://www.garlic.com/~lynn/index.html
that has a number of URLs in different categories
including a pointer to html file:
https://www.garlic.com/~lynn/2007e.html
this particular HTML file has index with 66 articles (numeric labels 0-65)
the specific URL I was referencing in the post was
https://www.garlic.com/~lynn/2007e.html#64
most browsers would position within the file at label "64". If your
browser isn't capable of handling a URL that includes positioning
within a file ... then the index at the front of file
https://www.garlic.com/~lynn/2007e.html
has 66 entries and "64" is the next to the last index entry (numbered from zero). I'm not sure that will do you any good though ... since if your browser can handle the original URL with relative position ... it also can't handle the relative URL in the index either.
Now there is another possibility that you may be having. I recently
updated file
https://www.garlic.com/~lynn/2007e.html
with most recent posts. If your browser has a earlier version of 2007e.html cached, that was obtained before the last couple postings were added to the file ... then it would not be able to find the new relative position (within the file as specified) and just position you at the front of the file.
It also depends on how you may have configured your browser cache settings ... some browsers have an option to check on consistency of what is in the cache and the original either once per file after each startup or check for consistency on every reference.
In any case, you usually can synchronize what might be in your browser cache and the original file by hitting the reload button.
Now you repeat your same comment with respect to "there being 100
articles on that web page" ... and have used the comment both with
respect to
https://www.garlic.com/~lynn/2007e.html#64
and
https://www.garlic.com/~lynn/gcard.html#26.1
Looking at the body of your post ... there seems to be some issue with whatever you are using that has trailing underscore on some flavors of URL ... I don't know whether your browser processor is adding that trailing underscore or not ... it doesn't exist in the original.
Now, I can see where your browser might have a stale cached copy of
2007e.html ... and not being able to find relative href/name "64"
within the file ... but the file gcard.html has had href/name of
"26.1" since it was first made available ... so it would seem unlikely
that you would have stale caching problems with both
https://www.garlic.com/~lynn/2007e.html#64
and
https://www.garlic.com/~lynn/gcard.html#26.1
not being able to find the relative position in both files. Possibly you are having browser problems? Other possibility is possibly you have some DNS cache poisoning and your browser isn't actually getting to my real web pages at all?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: FBA rant Newsgroups: bit.listserv.ibm-main,alt.foiklore.computers Date: Thu, 08 Mar 2007 18:25:42 -0700DASDBill2@ibm-main.lst wrote:
i don't know. as implied in this post ... where i raised the question
about a number of code names
https://www.garlic.com/~lynn/2007e.html#38 FBA rant
including 2321 ... somebody then posted an answer providing what they thot to have been the 2321 original project code name. that answer as to the 2321 code name then appeared to initiate some additional topic drift with respect to 2321.
I then subsequently posted that the univ. where i was undergraduate had
obtained a 2321 as part of an ONR library automation grant and needed to
make sure it ran with both CICS and cp67
https://www.garlic.com/~lynn/2007e.html#51 FBA rant
I also happened to mention here
https://www.garlic.com/~lynn/2007e.html#63 FBA rant
that i happened to run into an engineer many years later that claimed to have been part of the original 2321 development team.
i apologize that i've not done what you have instructed me to do. maybe you should also try ordering some number of other people to also answer your questions.
i apologize that i've not done what you have instructed me to do. maybe you should also try ordering some number of other people to also answer your questions.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: ISAM and/or self-modifying channel programs Newsgroups: bit.listserv.ibm-main Date: Thu, 08 Mar 2007 21:40:11 -0700Art Celestini wrote:
under vm there is diagnose x'98' ... real i/o that allows similar capability, for virtual machine to do lock, unlock and real ccw execution.
description here:
http://publibz.boulder.ibm.com/epubs/pdf/hcse5b11.pdf
from above:
The subfunctions of DIAGNOSE code X'98' are LOCK, UNLOCK, and
SSCH-Real. The requested subfunction is identified by a code in the
Rx register. The LOCK subfunction locks a single 4 KB page of virtual
machine storage in host real storage. In addition, it returns to the
virtual machine the absolute storage address of the frame used to lock
the guest page. The UNLOCK subfunction unlocks a single 4 KB page of
virtual machine storage that was previously locked by DIAGNOSE code
X'98'.
... snip ...
recent posts self-modifying channel program
https://www.garlic.com/~lynn/2007e.html#14 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#19 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#27 IBM S/360 series operating systems history
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: FBA rant Newsgroups: bit.listserv.ibm-main,alt.foiklore.computers Date: Thu, 08 Mar 2007 23:17:27 -0700Anne & Lynn Wheeler <lynn@garlic.com> writes:
part of the reason that i don't really know the definitive answer to your question is that BB in BBCCHH may have been planned for a number of related products ... besides the 2321. i have some vague recollection of discussions related to 1360/pdss which may have also motivated the inclusion of BB in 360 ckd dasd architecture; i.e. even if 2321 hadn't shipped ... the decision to include BB may have been made assuming a variety of products that might use it.
in this 1360/PDSS reference
https://en.wikipedia.org/wiki/IBM_1360
it mentions having a total capacity of 2,250 "cells" possibly helping motivate two digit BB field (as opposed to ten 2321 cells) under some assumption that such devices might also eventually appear attached to 360 channels.
this may have also contributed to the DASD acronym for direct access storage device ... because of the variety of storage technologies that were being used in the period (not just disk and not just magnetic).
the above article implies that 1360 saw limited deployment, in part because of various follow-on magnetic related storage devices like 3850 (however, it doesn't mean that the senior engineers hadn't originally anticipated that such devices might be attached to 360 channels).
3850 reference
https://en.wikipedia.org/wiki/IBM_3850
there is mention in the above that the tape cartridges originally were to be directly addressed ... possibly also using BB specification ... but it was eventually changed to the virtualized 3330 implementation. So there is possibility that 3850 originally was envisioned as (also) being much more of a 2321 kind of operation (having up to 4720 cartridges ... possibly also fitting into the BB specification).
other past posts in this thread mentioning 2321:
https://www.garlic.com/~lynn/2007e.html#38 FBA rant
https://www.garlic.com/~lynn/2007e.html#51 FBA rant
https://www.garlic.com/~lynn/2007e.html#63 FBA rant
https://www.garlic.com/~lynn/2007e.html#64 FBA rant
https://www.garlic.com/~lynn/2007f.html#0 FBA rant
part of the issue is all of the senior people that would have likely
been involved in thinking about justification for including "BB" as
part of the standard architecture were gone by the time i showed
up. the senior people having moved on was also the excuse given for
periodically calling me in to play disk engineer ... recent posts
mentioning periodically getting called in to play disk engineer:
https://www.garlic.com/~lynn/2007b.html#28 What is "command reject" trying to tell me?
https://www.garlic.com/~lynn/2007e.html#40 FBA rant
https://www.garlic.com/~lynn/2007e.html#63 FBA rant
lots of past posts mentioning getting to play around in dasd
engineering lab (bldg 14) and dasd product test lab (bldg 15) ... sort
of across the street from sjr in bldg. 28.
https://www.garlic.com/~lynn/subtopic.html#disk
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 09 Mar 2007 09:41:25 -0700Mark H. Young wrote:
so you could sort of say that MVT ran native with a DAT box with a bunch of stuff from CP67 hacked into the MVT kernel ... but they changed its name to SVS.
Something similar but different had been done earlier to MVT by some customers ... but running in virtual machine under CP67 called "hand shaking" ... CP67 would present a page fault interrupt to MVT under certain conditions (i.e. virtual problem state, non-key-zero) ... which allowed MVT to perform a task-switch. Later when missing page had been fetch ... MVT would be presented a new kind of interrupt as indication that missing page was now in real storage.
Later the VM370 and VS1 would have similar modifications as part of
VS1 "handshaking" support. In this case, something like a 4mbyte
virtual machine would be defined for VS1. VS1 would then build a
4mbyte virtual address space table ... where there was a one-for-one
mapping between each VS1 virtual page and the virtual machine page. In
effect, VS1 would no longer have any paging responsibility ... having
turned it all over to the VM370 kernel. VM370 would present page
interrupt to VS1, allowing VS1 to perform task switch ... while
waiting for vm370 to perform the page operation. when the page
operation was complete, vm370 would present a psuedo page i/o complete
interrupt to vs1. For a lot of workloads ... this (and misc. other
stuff) allowed VS1 to run faster in a vm370 virtual machine than it
did running directly on the hardware w/o vm370 ... at least on
processors with the ECPS VM microcode assists (started with 370 138s
& 148s) ... old post discussing ECPS
https://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist
There actually had been an earlier modification to MVT release 13 done
by Boeing Huntsville running on 360/67 SMP ... (I believe partitioned
running as two uni-processors). MVT had virtual address space the same
size as real storage (slightly analogous to the VS1 configuration)
... and did no paging and/or page fault operations. The issue was to
handle storage fragmentation. MVT had horrendous problem with storage
fragmentation ... especially with long running applications. Boeing
Huntsville machines were primarily being used for long-running 2250
display/design applications ... would experience large amounts
of storage fragmentation. The use of virtual address space ... wasn't
to make it look like there was more memory than really available
... but to re-arrange storage locations to appear contiguous. recent
posting mentioning Boeing Huntsville hack to MVT-13.
https://www.garlic.com/~lynn/2007b.html#45 Is anyone still running
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 09 Mar 2007 12:16:35 -0700Rick Fochtman wrote:
DAT Hardware for 165-II was especially big hit ... there was bunch of stuff in 370 virtual memory architecture (i.e. "redbook" was cms script file, depending on the options set, it either produced the full architecture redbook or the subset 370 principles of operation). at one point there was an escalation meeting where the 165 engineers proposed dropping a bunch of stuff from the DAT architecture on the grounds that they could get virtual memory hardware out six months earlier if they didn't have to do all the extra stuff. It was eventually agreed to ... and then all the other products that already had full 370 virtual memory architecture implemented ... had to go back and remove all the stuff dropped to help 165 improve their delivery schedule.
360/67 was originally for something called tss/360 ... which never
really got out of development ... there were all these release 0.xx
something in customer shops ... but the performance was really
horrible (among other issues). cp67/cms started as bootlegged project
at the cambridge science center
https://www.garlic.com/~lynn/subtopic.html#545tech
and eventually found customer installation at a lot of places that had orderd 360/67 for tss/360. another project that saw some amount of installations was MTS (michigan terminal system) done at UofM ... that made use of the 360/67 dat box.
The morph from cp67 to vm370 had barely made it into customer installations and POK discovered that it had enormous problem with MVS/XA development schedule. POK was able to convince corporate to kill off the vm370 product and have all of the vm370/cms development group transferred to POK to help with MVS/XA development. At the last minute, Endicott managed to salvage a little of the vm370 product development mission and acquire a small part of the development staff ... in order to keep the product going.
for a lot more on the early 360/67 period, including science center
implementing early virtual machine cp40 & cms on a custom modified
360/40 (with virtual memory hardware added) before 360/67 machines
became available ... see Melinda's history
https://www.leeandmelindavarian.com/Melinda/
https://www.leeandmelindavarian.com/Melinda#VMHist
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Fri, 09 Mar 2007 13:32:20 -0700jmfbahciv writes:
consider the issues that gave rise to the federal "do not call" list.
junk faxes got so bad at one point that we don't turn the fax on unless we get a (regular) phone call saying that a fax is coming in.
one of the things in the x9.59 financial standard was that every
transaction required (strongly) authenticated authorization.
https://www.garlic.com/~lynn/x959.html#x959
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM S/360 series operating systems history Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 09 Mar 2007 15:05:56 -0700Bob Halpern wrote:
at one time there was this joke about there possibly being 1200 people in mohansic working on tss/360 and total of 12 people at the cambridge science center working on cp67/cms (and aggregate productivity of the science center exceeding the aggregate productivity of the 1200 people in mohansic).
tss/360 did have a few loyal customers that hung on ... like GM research ... and after tss/360 product was canceled there was enuf interest for keeping a small group in place supporting some existing customers, including doing a conversion to 370.
tss/370 saw some return to life at AT&T where there was a UNIX kernel built on top of a stripped down tss/370 kernel (only available for internal AT&T)
at some point, IBM Germany looked at putting out a similar tss/370 mainframe unix product and put in place an official (new) product group ... bringing some number of the tss/370 people over from the states ... however this never made it out the door.
There were also number of vm-based unix projects under way in the early to mid 80s which also never made it out the door.
There was effort started to do BSD offering on vm370 ... but part way thru, it got retargeted to the PC/RT and released as a product for the PC/RT called AOS (not to be confused with the AOS SVS prototype).
What finally made it out the doors was (unix-like) UCLA's "LOCUS" offered as AIX/370 (under VM) and AIX/PS2 ... providing single-system-image type operation, not only across mainframe systems ... but also between mainframes and PS2s (sort of what SAA from the period claimed to aspire to).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Beyond multicore Newsgroups: comp.arch Date: Sat, 10 Mar 2007 09:28:31 -0700nmm1@cus.cam.ac.uk (Nick Maclaren) writes:
past posts with any mention of smp activity (including 195 dual
i-stream)
https://www.garlic.com/~lynn/subtopic.html#smp
comment that I remember (vaguely, long ago and far away) being told was that biggest transition from 360/195 to 370/195 was some of the new fangled instruction retry that was showing up in 370s. claim was that 195 had large number of components and along with the rate that 195 operated, the mean-time-between (soft) failure of some component was on the order of ? (small number of) weeks (2-8?), which could be masked by new fangled hardware instruction retry logic (besides the couple new instructions announced with original 370 ... predating any of the 370 virtual memory announcement).
SJR continued to operate 370/195 service running MVT until '78 (when
it was replaced with 168-3 & MVS)
Date: 12/18/78 08:33:18
To: wheeler
lynn--
Now that the /195 is gone, vm has acquired another printer (address
001) for class y output. Somehow, no one bothered to do a sysgen to
add the new printer. XXXXXX knows about this, but i doubt he knows
what to do. Could you see to it that the gen is done?
Now for some good news, the vm 168 has been approved along with the
additional head count. Question now is, when will it arrive? Mgmnt
trying to establish a firm ship date (tenative date is in
July). Obviously, they are trying to move up that date.
... snip ... top of post, old email index
And for a whole lot of topic drift, SJR had been running a vm 158 in
the datacenter and the computer science group had an additional vm
145.
https://www.garlic.com/~lynn/submain.html#systemr
Date: 01/17/80 08:12:39
From: wheeler
There are/were three different projects.
A long time ago and far away, some people from YKT come up to CSC and
we worked with them on the 'G' updates for CP/67 (running on a 67)
which was to provide virtual 4-way 370 support. Included as part of
that was an additional 'CPU' (5-way) for debug purposes which was a
super set of the other four and could selectively request from CP that
events from the 4-way complex be sent to the super CPU for handling
(basically it was going to be a debug facility). All of this was going
to be for supporting the design & debug of a new operating
system. When FS started to get into trouble the YKT project was
canceled (something like 50 people at its peak) and the group was
moved over to work on FS in hopes that they might bail it out.
2) One or two people from that project escaped and got to SJR. Here,
primarily Vera Watson, wrote initial R/W shared segment support for VM
(turns out it was a simple subset of the 'G' updates) in support of
System R (relational data base language). Those updates are up and
running and somewhat distributed (a couple customers via joint studies
and lots of internal sites).
3) Independent of that work, another group at SJR has a 145 running a
modified VM with extremely enhanced modifed timer event support. The
objective is to allow somebody to specify what speed CPU and how fast
the DASD are for a virtual machine operator test. VM calculates how
fast the real CPU & DASD are and 'adjust' the relative occurance of
all events so that I/O & timer interrupts occur after the appropriate
number of instructions have been executed virtually. These changes do
not provide multiple CPU support
... snip ... top of post, old email index
Turns out that at least one of the other people involved in the "G" cp67 activity was 195 engineer (and I believe was the vector that got us involved in the 195 dual i-stream stuff, again, long ago and far away)
and of course lots of past posts mentioning FS (future system)
https://www.garlic.com/~lynn/submain.html#futuresys
and of course by the time of the above email, Vera had already found
her resting place on Anapurna ... old post
https://www.garlic.com/~lynn/2002g.html#60 Amiga Rexx
other references:
http://lomaprieta.sierraclub.org/lp0012_TheSeventies.html
http://www.mcjones.org/System_R/SQL_Reunion_95/sqlr95-Vera.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Sat, 10 Mar 2007 09:52:04 -0700a 370/195 archeological reference recently posted in comp.arch
includes old email
https://www.garlic.com/~lynn/2007f.html#email800117
that raises connections between:
virtual 370 work done on cp67 at the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
multiprocessor support
https://www.garlic.com/~lynn/subtopic.html#smp
future system project
https://www.garlic.com/~lynn/submain.html#futuresys
relational database
https://www.garlic.com/~lynn/submain.html#systemr
and lisp and computer AI
http://www.mcjones.org/System_R/SQL_Reunion_95/sqlr95-Vera.html
then for other drift ... connections between electronic commerce, DBMS, transactions:
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray is Missing
https://www.garlic.com/~lynn/2007d.html#37 MAC and SSL
and an old post mentioning other kinds of connections between loosely-coupled,
sysplex, cluster, supercomputers and electronic commerce
https://www.garlic.com/~lynn/2001i.html#52
part of the above involves ha/cmp and medusa ... old emails
https://www.garlic.com/~lynn/lhwemail.html#medusa
specific mention of database scale-up
https://www.garlic.com/~lynn/2006x.html#email920129
in this post
https://www.garlic.com/~lynn/2006x.html#3
and electronic commerce work involving several of the people in this meeting
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/96.html#15
indirect reference
https://www.garlic.com/~lynn/2001n.html#83
commented on in these posts
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: FBA rant Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sat, 10 Mar 2007 13:33:30 -0700Anne & Lynn Wheeler wrote:
for other topic drift ... this post started out as a question about
the difference between 360/195 and 370/195 in comp.arch
https://www.garlic.com/~lynn/2007f.html#10 Beyond multicore
and it wanders off into mentioning 195 engineer that had worked on the
"G" cp67 updates. In this old email (in the above referenced post)
https://www.garlic.com/~lynn/2007f.html#email800117
it mentions that group getting shanghaied to help bail out the floundering FS project ... and Vera Watson escaping to SJR (to work on system/r). The 195 engineer escaped to Boulder and I believe did some of the work on 3850.
this follow-on posts mentions some of the connections between various
efforts
https://www.garlic.com/~lynn/2007f.html#11 Is computer history taught now?
including some obscure connection between system/r, lisp and computer AI.
and a referenced footnote
http://www.mcjones.org/System_R/SQL_Reunion_95/sqlr95-Vera.html#fn2
on VM/370 modifications to support system/r development
[3] J.N. Gray and V. Watson. A Shared Segment and Inter-Process
Communication Facility for VM/370. IBM Research Report RJ1579. San
Jose, California (May 1975).
now appears to have both authors lost; Vera on Anapurna and now Jim
appears to have been lost at sea
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#33 Jim Gray Is Missing
for other drift ... some engineers from endicott had come out to the
science center
https://www.garlic.com/~lynn/subtopic.html#545tech
for joint project to modify cp67 to provide 370 virtual machines ... including support for (unannounced) 370 virtual memory. These were the "H" updates to cp67. Then came the "I" updates to cp67 ... modifying the cp67 kernel to run in 370 virtual machine (i.e. instead of in a 360/67 virtual machine or on real 360/67). The "cp67-i" system was in regular operation a year before the first engineering 370 machine with virtual memory support was even operational (and then, cp67-i for a long time was the only operating system that ran on real 370 machines with virtual memory).
The cp67 "G" level updates (to provide virtual 4-way 370 smp support)
were built ontop of the cp67 "H" updates (providing 370 virtual
machines). for other drift ... past posts mentioning mutliprocessor
support and/or compare&swap instruction
https://www.garlic.com/~lynn/subtopic.html#smp
The project for "L", "H", "I" (and "G") cp67 source updates ... also spawned the CMS multi-level source update process.
misc. past post mentioning project to do cp67 support for 370 virtual
machines:
https://www.garlic.com/~lynn/2002h.html#50 crossreferenced program code listings
https://www.garlic.com/~lynn/2002j.html#0 HONE was .. Hercules and System/390 - do we need it?
https://www.garlic.com/~lynn/2002j.html#70 hone acronym (cross post)
https://www.garlic.com/~lynn/2004.html#44 OT The First Mouse
https://www.garlic.com/~lynn/2004b.html#31 determining memory size
https://www.garlic.com/~lynn/2004d.html#74 DASD Architecture of the future
https://www.garlic.com/~lynn/2004h.html#27 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004p.html#50 IBM 3614 and 3624 ATM's
https://www.garlic.com/~lynn/2005c.html#59 intel's Vanderpool and virtualization in general
https://www.garlic.com/~lynn/2005d.html#58 Virtual Machine Hardware
https://www.garlic.com/~lynn/2005d.html#66 Virtual Machine Hardware
https://www.garlic.com/~lynn/2005g.html#17 DOS/360: Forty years
https://www.garlic.com/~lynn/2005h.html#18 Exceptions at basic block boundaries
https://www.garlic.com/~lynn/2005i.html#39 Behavior in undefined areas?
https://www.garlic.com/~lynn/2005j.html#50 virtual 360/67 support in cp67
https://www.garlic.com/~lynn/2005p.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005p.html#45 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006e.html#7 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006f.html#5 3380-3390 Conversion - DISAPPOINTMENT
https://www.garlic.com/~lynn/2006l.html#21 Virtual Virtualizers
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006o.html#19 Source maintenance was Re: SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006q.html#1 Materiel and graft
https://www.garlic.com/~lynn/2006q.html#45 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006q.html#49 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006w.html#3 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007b.html#20 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Why is switch to DSL so traumatic? Newsgroups: alt.folklore.computers Date: Mon, 12 Mar 2007 10:17:23 -0600"Joe Morris" <j.c.morris@verizon.net> writes:
in one of the escalation arguments on whether PROFS group had written the email processing in PROFS or had borrowed VMSG source ... the VMSG author was able to point out that his initials appeared at the end of every network tag comment field for every email sent by PROFS (or VMSG).
misc. past posts mentioning vmsg
https://www.garlic.com/~lynn/99.html#35 why is there an "@" key?
https://www.garlic.com/~lynn/2000c.html#46 Does the word "mainframe" still have a meaning?
https://www.garlic.com/~lynn/2001k.html#35 Newbie TOPS-10 7.03 question
https://www.garlic.com/~lynn/2001k.html#39 Newbie TOPS-10 7.03 question
https://www.garlic.com/~lynn/2001k.html#40 Newbie TOPS-10 7.03 question
https://www.garlic.com/~lynn/2002f.html#14 Mail system scalability (Was: Re: Itanium troubles)
https://www.garlic.com/~lynn/2002h.html#58 history of CMS
https://www.garlic.com/~lynn/2002h.html#64 history of CMS
https://www.garlic.com/~lynn/2002j.html#4 HONE, ****, misc
https://www.garlic.com/~lynn/2002p.html#34 VSE (Was: Re: Refusal to change was Re: LE and COBOL)
https://www.garlic.com/~lynn/2003b.html#45 hyperblock drift, was filesystem structure (long warning)
https://www.garlic.com/~lynn/2003j.html#56 Goodbye PROFS
https://www.garlic.com/~lynn/2004p.html#13 Mainframe Virus ????
https://www.garlic.com/~lynn/2005t.html#43 FULIST
https://www.garlic.com/~lynn/2005t.html#44 FULIST
https://www.garlic.com/~lynn/2005u.html#4 Fast action games on System/360+?
https://www.garlic.com/~lynn/2006n.html#23 sorting was: The System/360 Model 20 Wasn't As Bad As All That
https://www.garlic.com/~lynn/2006t.html#42 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: more shared segment archeology Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers Date: Mon, 12 Mar 2007 13:21:48 -0600One of the reasons the vm development group picked up so much from the science center
to ship in the (vm370 product) release 3/4 time-frame was a lot of
the resources had been diverted to FS ... similar to the reference in
this post
https://www.garlic.com/~lynn/2007f.html#10 Beyond multicore
in this old email
https://www.garlic.com/~lynn/2007f.html#email800117
and some followup to the above
https://www.garlic.com/~lynn/2007f.html#11 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
and lots of past posts mentioning future system project
https://www.garlic.com/~lynn/submain.html#futuresys
and then there was a relatively short window between the demise of FS
(and return of the diverted resources) and when POK convinced
corporate to completely shutdown VM and move all the people to POK to
support MVS/XA development ... as part of trying to get MVS/XA out the
door (everybody was scrambling to make up for lost time because of
FS). The reference in this post to POK convincing corporate about VM
shutdown and all the people diverted to MVS/XA (and Endicott salvaging
some of the VM mission) ... glosses over the period with lots of
resources diverted to work on FS
https://www.garlic.com/~lynn/2007f.html#7 IBM S/360 series operating systems history
In addition to development group having to play catch-up (by picking
up stuff from the science center for product ship; because of period
when a lot of resources were diverted to FS), there were also some
amount of stuff that had been dropped in the morph from cp67 to
vm370. I continued to work on cp67 during this period and then when
the science center got a 370/155-II ... ported a bunch of stuff to
vm370. Old communication from 1973 about porting/enhancing a bunch of
science center stuff from cp67 to vm370
https://www.garlic.com/~lynn/2006v.html#email731212
in this post
https://www.garlic.com/~lynn/2006v.html#36 Why these original FORTRAN quirks?
and related email from 1975 ... creating an "enhanced" vm rel2 system
for shipment to internal accounts:
https://www.garlic.com/~lynn/2006w.html#email750102
in this post
https://www.garlic.com/~lynn/2006w.html#7 Why these original FORTRAN quirks?
and
https://www.garlic.com/~lynn/2006w.html#email750430
in this post
https://www.garlic.com/~lynn/2006w.html#8 Why these original FORTRAN quirks?
One of the items was whole restructuring for what I called virtual memory management ... which included a bunch of bells and whistles related to virtual memory segments as well as being integrated with page mapped filesystem changes for CMS.
Much of the internal restructuring for handling virtual memory segments was picked up as part of release 3 DCSS ... however only a small subset of the function that utilized that restructuring was actually shipped as part of release 3 DCSS.
I had also gotten roped into doing a lot of the ECPS work for Endicott,
old reference here
https://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#27 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#28 370 ECPS VM microcode assist
and at the same time various SMP work ... old VAMPS email from 1975
https://www.garlic.com/~lynn/2006w.html#email750827
in this post
https://www.garlic.com/~lynn/2006w.html#10 long ago and far away, vm370 from early/mid 70s
lots of other posts mentioning VAMPS (5-way SMP project)
https://www.garlic.com/~lynn/submain.html#bounce
and lots of posts making general mention of SMP and/or
compare&swap instruction
https://www.garlic.com/~lynn/subtopic.html#smp
Another shared segment "feature" was a line item called DWSS that was part of system/r technology transfer from SJR to Encidott for SQL/DS product ... which allowed for shared segments that were "writable" (i.e. not r/o protected). A big issue with DWSS was what to do about ECPS microcode already in the field that supported "r/o protection" games for all segments identified as shared.
This was another downstream fall-outs of letting the 165 hardware
engineers gain six months in the vritual memory hardware change
schedule for 165-ii ... by letting them drop various features from the
370 virtual memory architecture. recent references
https://www.garlic.com/~lynn/2007f.html#6 IBM S/360 series operating systems history
One of the features dropped was the hardware segment table
"protection" bit ... which allowed specification of hardware r/o
protection for virtual memory segments on a virtual address space
basis (i.e. some address spaces could be allowed r/w segment storage
operation while other address spaces were not allowed to change the
same shared segment). This also caused a big retrofit hit to vm370
since cp&cms had already been re-organized to take advantage of the
feature ... when it was dropped ... a real cludge was created ... also
referenced here
https://www.garlic.com/~lynn/2007d.html#32 Running OS/390 on z9 BC
effectively the original basis leading to the conflict with ECPS
and DWSS ... work referenced in this old email (also above)
https://www.garlic.com/~lynn/2007f.html#email800117
mentions shared segment extensions done initially at SJR in the
mid-70s for support of system/r (DWSS) ... original relational/sql ...
various posts mentioning system/r
https://www.garlic.com/~lynn/submain.html#systemr
This post (also mentioned above)
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
references a san jose research report from May '75 ... about shared
segment and inter-processor communication for vm370 in support of
system/r effort. also mentioned in this SQL reunion item:
http://www.mcjones.org/System_R/SQL_Reunion_95/sqlr95-Vera.html#Index5
something similar also mentioned being shipped in this internal
release2 plc15 system (besides the virtual memory management stuff)
was also the (POK) SPM (which had originally been implemented by the
Pisa Science Center on cp67 and later converted to vm370)
https://www.garlic.com/~lynn/2006w.html#email750430
other posts mentioning DWSS:
https://www.garlic.com/~lynn/2000.html#18 Computer of the century
https://www.garlic.com/~lynn/2000b.html#55 Multics dual-page-size scheme
https://www.garlic.com/~lynn/2002g.html#59 Amiga Rexx
https://www.garlic.com/~lynn/2004f.html#23 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2004f.html#26 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2006t.html#16 Is the teaching of non-reentrant HLASM coding practices ever defensible?
https://www.garlic.com/~lynn/2006t.html#39 Why these original FORTRAN quirks?
https://www.garlic.com/~lynn/2006w.html#11 long ago and far away, vm370 from early/mid 70s
https://www.garlic.com/~lynn/2006y.html#26 moving on
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Designing database tables for performance? Newsgroups: comp.databases.theory Date: Mon, 12 Mar 2007 13:33:08 -0600Bob Badour <bbadour@pei.sympatico.ca> writes:
I had sponsored Boyd at corporate seminars in the early 80s.
misc. past posts mentioning Boyd
https://www.garlic.com/~lynn/subboyd.html#boyd
and various URLs from around the web with Boyd references
https://www.garlic.com/~lynn/subboyd.html#boyd2
now for something different, an obscure archeological relationship between
rdbms, lisp, and computer ai ... mentioned in this post
https://www.garlic.com/~lynn/2007f.html#11 Is computer history taught now?
the result of a little topic drift about 370/195
https://www.garlic.com/~lynn/2007f.html#10 Beyond multicore
and here:
http://www.mcjones.org/System_R/SQL_Reunion_95/sqlr95-Vera.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: more shared segment archeology Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers Date: Tue, 13 Mar 2007 09:28:09 -0600jmfbahciv writes:
370 virtual memory had/has two level tables for virtual memory ... each address space had a segment table with segment table entries pointing to individual page tables (for each segment). Shared segments was achieved by having different segment tables entiries point at the same page table.
the original 370 virtual memory architecture had a flag in the segment table entry indicating whether there was r/w or r/o access (by a virtual address space) to a segment. this got dropped from 370 virtual memory architecutre (before ever shipping to customers) as part of improving schedule for 165-11 virtual memory by six months.
as a result, vm had to go back and create a cludge for supporting
protection of shared segments (actually a couple generations of
cludges). a flavor of this protection involved some amount of kernel
code ... which also got copied into the ECPS microcode assist (a 10:1
performance improvement in code that was moved from kernel 370
instructions into machine microcode ... or at least 10:1 improvement
for some heavily microcoded machines). lots of past post mentioning
machine microcoding
https://www.garlic.com/~lynn/submain.html#mcode
system/r effectively had semi-privilged "shadow" processes for doing
database work (running in their separate virtual address space
... slightly analogous ... but different to setuid root process).
these "shadow" processes needed to be able to have r/w access to
common shared memory (across all processes operating on the same
database). lots of past post mentioning original relational/sql
https://www.garlic.com/~lynn/submain.html#systemr
this requirement for shared r/w access to common shared memory created a product ship issue conflicting with standard kernel support. If it was just software kernel ... then just ship new kernel with the necessary changes ... however there were already quite a number of of machines in customer shops where parts of the kernel were now part of the machine microcode. The ECPS microcode created a (significant) "service" expense issue to make sure that a field engineer updated the machine microcode at the same time the new kernel for system/r operation was installed. For instance who was to absorb the expense of this field engineer microcode update coordination ... even the expense to sending all possible field engineers to update class ... or even developing the field engineer documentiation.
for other topic drift ... system/r related post in comp.databases.theory
https://www.garlic.com/~lynn/2007f.html#15 Designing database tables for performance
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Wed, 14 Mar 2007 11:02:27 -0600pechter@pechter.dyndns.org (William Pechter) writes:
For some reason, it was decided to cancel the project and the group in
Provo was allowed to retain rights to what they had been implementing
... I never knew the reason why ... and it seems to have been too early
to be the results of the political forces related to terminal emulation
that saw some number of projects canceld later in the 80s ... misc.
post mentioning terminal emulation and some of the political aspects
https://www.garlic.com/~lynn/subnetwork.html#emulation
misc. past posts mentioning DataHub project:
https://www.garlic.com/~lynn/96.html#4a John Hartmann's Birthday Party
https://www.garlic.com/~lynn/2000g.html#40 No more innovation? Get serious
https://www.garlic.com/~lynn/2002f.html#19 When will IBM buy Sun?
https://www.garlic.com/~lynn/2002g.html#79 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2002o.html#33 Over-the-shoulder effect
https://www.garlic.com/~lynn/2003e.html#26 MP cost effectiveness
https://www.garlic.com/~lynn/2003f.html#13 Alpha performance, why?
https://www.garlic.com/~lynn/2004f.html#16 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2005p.html#23 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#9 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#36 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006l.html#39 Token-ring vs Ethernet - 10 years later
https://www.garlic.com/~lynn/2006y.html#31 "The Elements of Programming Style"
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What to do with extra storage on new z9 Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Wed, 14 Mar 2007 13:46:46 -0600Mark Bodenstein wrote:
LRU replacements algorithms basically tend to assume that storage used in the recent past will assumed to be used in the near future (and therefor replace storage that has been least recently used). This is supported by studies that have observed program behavior with respect to "recently" used storage. The issue is that its usefulness for predicting future storage use patterns can significantly degrade as the history interval becomes too large (i.e. no longer represents "recent" behavior). A lot of reference use algorithms tends to approximate LRU by resetting a storage reference bit ... on a frequency that is proportional to both the amount of storage and the demand for storage (if the reset frequency drops below some threshold, the information can become useless).
so various issues to go to static partition allocation offsetting the benefits of optimized global dynamic allocation
1) resource management doesn't know how to deal with global storage infrastructure with lots of different kinds of competing demands
2) different competing uses may benefit from application specific policies for replacement
3) partitioning storage is more likely to increase the frequency of various reference use reset intervals ... improving the quality of the subsequent replacement decisions.
With respect to #3, one of the characteristics of "two-handed" clock replacement algorithm was to not make resetting of reference information exactly synchronous with the testing of the reference information. the "hand" doing the reference reset was offset from the "hand" doing the reference testing. The degree of offset would be adjusted to compensate for "large" storage sizes that resulted in the reset frequency dropping below useful threshold.
I had implemented global LRU clock-like replacement algorithms as
undergraduate in the 60s ... lots of posts mentioning replacement
algorithms
https://www.garlic.com/~lynn/subtopic.html#wsclock
Also, various old email mentioning global LRU and replacement algorithms
https://www.garlic.com/~lynn/lhwemail.html#globallru
In the early 80s, there was some issues raised with somebody working
on global LRU replacement algorithms for Stanford PHD ... and I was
asked to provide supporting detail from my work when I was an
undergraduate in the 60s ... old communication on the subject
https://www.garlic.com/~lynn/2006w.html#email821019
in this post
https://www.garlic.com/~lynn/2006w.html#40 The Future of CPUs: What's After Multi-Core?
previous posts touching on the subject that a well-implemented dynamic
adaptive resource management should be able to outperform a
partitioned operation ... in discussion/threads mentioning whether it
is better to partition between XSTORE and normal storage ... or have
everything as single, unpartitioned storage.
https://www.garlic.com/~lynn/95.html#15 multilevel store
https://www.garlic.com/~lynn/2001m.html#25 ESCON Data Transfer Rate
https://www.garlic.com/~lynn/2001m.html#53 TSS/360
https://www.garlic.com/~lynn/2002c.html#53 VAX, M68K complex instructions (was Re: Did Intel Bite Off More Than It Can Chew?)
https://www.garlic.com/~lynn/2002e.html#26 Crazy idea: has it been done?
https://www.garlic.com/~lynn/2002e.html#32 What goes into a 3090?
https://www.garlic.com/~lynn/2003j.html#2 Fix the shuttle or fly it unmanned
https://www.garlic.com/~lynn/2003p.html#41 comp.arch classic: the 10-bit byte
https://www.garlic.com/~lynn/2003p.html#46 comp.arch classic: the 10-bit byte
https://www.garlic.com/~lynn/2005.html#17 Amusing acronym
https://www.garlic.com/~lynn/2005h.html#13 Today's mainframe--anything to new?
https://www.garlic.com/~lynn/2005j.html#13 Performance and Capacity Planning
https://www.garlic.com/~lynn/2006.html#16 Would multi-core replace SMPs?
https://www.garlic.com/~lynn/2006l.html#43 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006r.html#35 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006r.html#36 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006s.html#16 memory, 360 lcs, 3090 expanded store, etc
https://www.garlic.com/~lynn/2006s.html#17 bandwidth of a swallow (was: Real core)
https://www.garlic.com/~lynn/2007c.html#23 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Thu, 15 Mar 2007 07:52:48 -0600jmfbahciv writes:
and what provo, utah lan server company was formed shortly later (hint: starts with the letter "N")?
a possible conjecture might have been that some decisions was made
about not spreading out into disk business other than CKD mainframe
(i.e. mainframe as the server ... not promoting proliferation of other
kinds of servers) the flyer for non-CKD disk from the 70s could be
considered FBA 3310 (piccolo) and 3370 (NFP) ... misc. recent posts
about FBA:
https://www.garlic.com/~lynn/2007e.html#35 FBA rant
https://www.garlic.com/~lynn/2007e.html#38 FBA rant
https://www.garlic.com/~lynn/2007e.html#39 FBA rant
https://www.garlic.com/~lynn/2007e.html#40 FBA rant
https://www.garlic.com/~lynn/2007e.html#42 FBA rant
https://www.garlic.com/~lynn/2007e.html#43 FBA rant
https://www.garlic.com/~lynn/2007e.html#46 FBA rant
https://www.garlic.com/~lynn/2007e.html#51 FBA rant
https://www.garlic.com/~lynn/2007e.html#59 FBA rant
https://www.garlic.com/~lynn/2007e.html#60 FBA rant
https://www.garlic.com/~lynn/2007e.html#63 FBA rant
https://www.garlic.com/~lynn/2007e.html#64 FBA rant
https://www.garlic.com/~lynn/2007f.html#0 FBA rant
https://www.garlic.com/~lynn/2007f.html#2 FBA rant
https://www.garlic.com/~lynn/2007f.html#3 FBA rant
https://www.garlic.com/~lynn/2007f.html#5 FBA rant
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
of course the later battles over restricting mainframe access to
terminal emulation could be considered to have helped accelerate
other types of servers
https://www.garlic.com/~lynn/subnetwork.html#emulation
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: re: Historical curiosity question Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers Date: Fri, 16 Mar 2007 02:06:01 -0600"McKown, John" wrote:
it also avoided the horrendous overhead of multi-track search that
os/360 used to search the volume VTOC on every open. lots of past
posts mentioning multi-track paradigm for VTOC & PDS directory was
io/memory trade-off ... os/360 target in the mid-60s was to burn
enormous i/o capacity to save having in-memory index.
https://www.garlic.com/~lynn/submain.html#dasd
that resource trade-off had changed by at least the mid-70s ... and it wasn't ever true for the machine configurations that cp67 ran on.
the other characteristic was that both cp67 and cms treated disks as fixed-block architecture ... even if they were CKD ... CKD disks would be formated into fixed-blocks ... and then treated as fixed-block devices ... and avoid the horrible i/o performance penalty of ever doing multi-track searches for looking up location and/or other information on disk.
recent thread in bit.listserv.ibm-main
https://www.garlic.com/~lynn/2007e.html#35 FBA rant
https://www.garlic.com/~lynn/2007e.html#38 FBA rant
https://www.garlic.com/~lynn/2007e.html#39 FBA rant
https://www.garlic.com/~lynn/2007e.html#40 FBA rant
https://www.garlic.com/~lynn/2007e.html#42 FBA rant
https://www.garlic.com/~lynn/2007e.html#43 FBA rant
https://www.garlic.com/~lynn/2007e.html#46 FBA rant
https://www.garlic.com/~lynn/2007e.html#51 FBA rant
https://www.garlic.com/~lynn/2007e.html#59 FBA rant
https://www.garlic.com/~lynn/2007e.html#60 FBA rant
https://www.garlic.com/~lynn/2007e.html#63 FBA rant
https://www.garlic.com/~lynn/2007e.html#64 FBA rant
https://www.garlic.com/~lynn/2007f.html#0 FBA rant
https://www.garlic.com/~lynn/2007f.html#2 FBA rant
https://www.garlic.com/~lynn/2007f.html#3 FBA rant
https://www.garlic.com/~lynn/2007f.html#5 FBA rant
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
the one possible exception was loosely-coupled single-system-image
support done for HONE system. HONE mini-disk volumes had an in-use
bitmap directory on each volume ... that was used to manage "LINK"
consistency across all machines in the cluster. it basically used
a channel program with search operation to implement i/o logical
equivalent to the atomic compare&swap instruction ... avoiding having
to do reserve/release with intervening i/o operations. I have some
recollection talking to the JES2 people about them trying a similar
strategy for multi-system JES2 spool allocation. post from above
mentioning HONE compare&swap channel program for multi-system
cluster operation
https://www.garlic.com/~lynn/2007e.html#38 FBA rant
HONE was vm-based online interactive for world-wide sales, marketing,
and field people. It originally started in the early 70s with a clone
of the science center's cp67 system
https://www.garlic.com/~lynn/subtopic.html#545tech
and eventually propagated to several regional US datacenters ... and also started to propagate overseas. I provided highly modified cp67 and then later vm370 systems for HONE operation for something like 15 yrs. I also handled some of the overseas clones ... like when EMEA hdqtrs moved from the states to just outside paris in the early 70s. In the mid-70s, the US HONE datacenters were consolidated in northern cal. ... and single-system-image software support quickly emerge ... running multiple "attached processors" in cluster operation. HONE applications were heavily APL ... so it was quite compute intensive. With four-channel controllers and string-switch ... you could get eight system paths to every disk. Going with "attached processors" ... effectively two processors made use of a single set of channels ... so you could get 16 processors in single-system-image ... with load-balancing and failure-fallover-recovery.
Later in the early 80s, the northern cal. HONE datacenter was replicated first in Dallas and then a third center in Boulder ... for triple redundancy, load-balancing and fall-over (in part concern about natural disasters like earthquakes).
lots of past posts mentioning HONE
https://www.garlic.com/~lynn/subtopic.html#hone
At one point in SJR after the 370/195 machine ... recent reference
https://www.garlic.com/~lynn/2007f.html#10 Beyond multicore
https://www.garlic.com/~lynn/2007f.html#11 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
was replaced with mvs/168 system ... and vm was running on 370/158 ... there were multiple strings of 3330 dasd ... with whole strings supposedly dedicated to vm and other strings dedicated to mvs. there were "rules" that mvs packs should never be mounted on vm "strings" (because of the horrendous vtoc & pds directory multi-track search overhead hanging channel, control units, string switches, and drives).
Periodically it would happen .. in specific instances ... users would be calling the operator within five minutes claiming vm/cms interactive response and totally deteriorated. Then it would require tracking down the offending MVS pack. One of the events, the MVS operator refused to take down the pack and move it ... because some long running application had just started. So to give them a taste of their own medicine ... we brought up a highly optimized VS1 system in a virtual machine on the (loaded) vm/158 with a couple packs on MVS string and proceeded to start some operations that brought MVS to its knees ... drastically inhibiting the long running MVS application from getting any useful thruput (and effectively negating its debilitating effect of vm/cms interactive response). The MVS operator then quickly reconfigured everything and agreed that MVS would keep its packs off VM disk strings.
some old posts retelling the sjr mvs/168 and vm/158 response story:
https://www.garlic.com/~lynn/94.html#35 mainframe CKD disks & PDS files (looong... warning)
https://www.garlic.com/~lynn/2001l.html#40 MVS History (all parts)
https://www.garlic.com/~lynn/2002.html#10 index searching
https://www.garlic.com/~lynn/2002d.html#22 DASD response times
https://www.garlic.com/~lynn/2002f.html#8 Is AMD doing an Intel?
https://www.garlic.com/~lynn/2002l.html#49 Do any architectures use instruction count instead of timer
https://www.garlic.com/~lynn/2003.html#15 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003b.html#22 360/370 disk drives
https://www.garlic.com/~lynn/2003c.html#48 "average" DASD Blocksize
https://www.garlic.com/~lynn/2003f.html#51 inter-block gaps on DASD tracks
https://www.garlic.com/~lynn/2003k.html#28 Microkernels are not "all or nothing". Re: Multics Concepts For
https://www.garlic.com/~lynn/2003m.html#56 model 91/CRJE and IKJLEW
https://www.garlic.com/~lynn/2003o.html#64 1teraflops cell processor possible?
https://www.garlic.com/~lynn/2004g.html#11 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#51 Channel busy without less I/O
https://www.garlic.com/~lynn/2004l.html#20 Is the solution FBA was Re: FW: Looking for Disk Calc
https://www.garlic.com/~lynn/2004n.html#52 CKD Disks?
https://www.garlic.com/~lynn/2005r.html#19 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2005u.html#44 POWER6 on zSeries?
https://www.garlic.com/~lynn/2006s.html#15 THE on USS?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 02:17:02 -0600John Ahlstrom <AhlstromJK@comcast.net> writes:
360/67 functional characteristics (dated 1967, from bitsavers):
http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A27-2719-0_360-67_funcChar.pdf
in transition to 370 virtual memory, only 24-bit addressing was supported.
370-xa re-introduced virtual addressing larger than 24-bits ... but it was only 31-bits (instead of 32-bits) ... and operating system had to support 24-bit applications, 31-bit applications, and mixed-mode applications. things got a lot more complicated when 64-bit addressing was introduced ... and having to support three different addressing modes.
recent principles of operations
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/CCONTENTS?SHELF=DZ9ZBK03&DN=SA22-7832-03&DT=20040504121320
from above ... 1.1.5 Trimodel Addressing
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/1.1.5?SHELF=DZ9ZBK03&DT=20040504121320
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 06:47:47 -0600re:
then there was ROMP in the early 80s. It was 801/RISC running CP.r and PL.8 compiler. There was claim that ROMP had 40-bit addressing.
The issue was that there was 32-bit addressing ... however, there was no protection domain. Virtual memory was inverted tables ... with segmented address space. Top 4 bits of 32-bit virtual address would index 16 "segment registers". A segment register was 12bits which was combined with the remaining 28-bits of the virtual address ... for 40-bit effective value for doing TLB lookup ... to find the real address.
PL.8 supposedly would only generate correct code and CP.r would only load correct/valid PL.8 generated code for execution. As a result there was an assumption that applications could change a segment register value as easily as applications could change general registers used in addressing. The implication was that applications had complete control over general register values as part of addressing as well as complete control over segment register values for addressing. Therefor "applications" had full access to "40-bit" addressing (i.e. up to 4096 different "segments" that are 2**28 each).
All of this was joint research/opd (office product division) project for follow-on to displaywriter. When that got killed, there was some investigation what could be done to avoid killing the whole operation. There was this "new" thing UNIX ... and lots of places were shipping hardware w/o having to invent/create an operating system from scratch (which was getting to be more expensive that creating the hardware). The idea was to retarget ROMP to the unix workstation market ... hiring the company that had done the unix port for pc/ix to do one for ROMP.
The issue now was that UNIX paradigm had protection domain between the kernel and applications ... and applications weren't allowed to directly change virtual memory segment values. This effectively restricted unix romp application paradigm to straight 32-bit addressing.
For RIOS (power/rs6000), the segment register size was doubled to 24bits. Early rs6000 technology documents continued to talk about the "52-bit" addressing (as continuation of the ROMP 40-bit addressing) ... even tho system paradigm had long changed from CP.r to UNIX.
misc. "old" email mentioning 801, iliad, romp, etc
https://www.garlic.com/~lynn/lhwemail.html#801
including these mentioning figuring out how to simulate a larger
number of "small" shared segments (rather than being restricted to
sixteen 28-bit segments).
https://www.garlic.com/~lynn/2006y.html#email841114c
https://www.garlic.com/~lynn/2006y.html#email841127
and any past posts happening to mention 801, iliad, romp, rios,
somerset, power/pc, etc
https://www.garlic.com/~lynn/subtopic.html#801
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 07:05:38 -0600jmfbahciv writes:
also the larger bureaucracy, the more you might have individuals
afflicted with Boyd's characterization about rigid, top/down
command and control ... recent posts
https://www.garlic.com/~lynn/2007e.html#45 time spent/day on a computer
https://www.garlic.com/~lynn/2007e.html#55 time spent/day on a computer
and as i've previously mentioned, there were quite a few that
I might not have been particularly partial to ... misc. references
https://www.garlic.com/~lynn/2007.html#22 MS to world: Stop sending money, we have enough
https://www.garlic.com/~lynn/2007.html#26 MS to world: Stop sending money, we have enough
https://www.garlic.com/~lynn/2007b.html#29 How many 36-bit Unix ports in the old days
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 09:00:50 -0600krw <krw@att.bizzzz> writes:
and you took a lot more heat if you were predicting such stuff in the mid-80s,
a couple past posts
https://www.garlic.com/~lynn/2005j.html#32 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005s.html#16 Is a Hurricane about to hit IBM ?
https://www.garlic.com/~lynn/2006.html#21 IBM up for grabs?
https://www.garlic.com/~lynn/2006.html#22 IBM up for grabs?
https://www.garlic.com/~lynn/2006l.html#17 virtual memory
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 09:47:27 -0600John Ahlstrom <AhlstromJK@comcast.net> writes:
Endicott managed to salvage some of the mission and keep the product from totally being canceled.
a few recent posts mentioning the event:
https://www.garlic.com/~lynn/2007.html#23 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007e.html#41 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007f.html#14 more shared segment archeology
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 12:47:55 -0600Peter Flass <Peter_Flass@Yahoo.com> writes:
i've commented several times that when FS was finally killed ... there
was big scramble to catch-up for all the years of lost time ... one
could claim that POK convincing corporate to kill-off VM ... so that
all the VM development people could be moved to POK to help
get MVS/XA out the door. some recent comments:
https://www.garlic.com/~lynn/2007.html#23 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007e.html#41 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007f.html#7 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007f.html#14 more shared segment archeology
https://www.garlic.com/~lynn/2007f.html#25 The Perfect Computer - 36 bits?
I've also commented that it may have not only indirectly contributed
to the clone processor business (i.e. distracted the company from
bread&butter legacy systems with all attention focused on turning out
this fabulous new FS thing) but also possibly directly
contributed. I've commented before that at a talk that Amdahl gave in
large MIT auditorium in the early 70s ... he was asked how he was
able to make the business case for starting a clone processor company
... his comment was something about there already being so much
customer application software ... that even if ibm was to totally walk
away from 360 (possibly vieled reference to FS), there was enough
customer application software to keep him in business thru the end of
the century. recent posts mentioning Amdahl
https://www.garlic.com/~lynn/2007.html#11 vm/sp1
https://www.garlic.com/~lynn/2007.html#14 vm/sp1
https://www.garlic.com/~lynn/2007.html#38 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007.html#44 vm/sp1
https://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#3 Has anyone ever used self-modifying microcode? Would it even be useful?
https://www.garlic.com/~lynn/2007e.html#5 Is computer history taugh now?
https://www.garlic.com/~lynn/2007e.html#41 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007e.html#42 FBA rant
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
supposedly the justification for FS was all the clone controller and
device business ... I had worked on one such when I was an
undergraduate in the 60s ... and some article was written blaming us
(at least in part) for the clone controller (and clone device)
business. misc past post
https://www.garlic.com/~lynn/submain.html#360pcm
but then the sidetrack into Future System project significantly
aided the clone processor business. posts with some specific comments
https://www.garlic.com/~lynn/2006r.html#36 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006w.html#2 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007f.html#10 Beyond multicore
https://www.garlic.com/~lynn/2007f.html#11 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
i have vague recollection that so much money and resources went into the failed FS project ... that if it had been any other company ... they would have quickly gone under
i've also conjuctured that a lot of 801/risc was possibly also
reaction to FS ... attempting to go to the exact opposite extreme from
FS hardware complexity. lots of past 801/risc related posts
https://www.garlic.com/~lynn/subtopic.html#801
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 16 Mar 2007 19:06:00 -0600Peter Flass <Peter_Flass@Yahoo.com> writes:
the small business computer s/38 ... implemented some number of FS
features (as well as 48bit addressing):
https://en.wikipedia.org/wiki/System/38
there was some discussion that as part of fort knox ... the myriad of
corporate microprocessors would be moved to 801/risc (iliad); low-end
and mid-range 370s, s/38 follow-on and many others. in thread last fall,
iliad ran into all sorts of schedule problems ... a couple refs:
https://www.garlic.com/~lynn/2006u.html#37 To RISC or not to RISC
https://www.garlic.com/~lynn/2006u.html#38 To RISC or not to RISC
and rochester quickly did a cisc processor for as/400. later rochester
got involved with somerset/powerpc ... and finally did move to a
variety of that risc.
https://en.wikipedia.org/wiki/AS/400
from above:
The AS/400 and its successors survive since their instruction set
(called TIMI for "Technology Independent Machine Interface" by IBM)
allows the operating system and application programs to take advantage
of advances in hardware and software without recompilation. TIMI is a
virtual instruction set; it is not the instruction set of the
underlying CPU. All user-mode programs are stored as TIMI
instructions, which means that it is not possible for them to use the
instruction set of the underlying CPU, thus ensuring hardware
independence. This is conceptually somewhat similar to the virtual
machine architecture of programming environments such as Smalltalk,
Java and .NET. The key difference is that it is embedded so deeply
into the AS/400's design as to make all applications and even the bulk
of its operating systems binary-compatible across different processor
families.
.. snip ...
misc. old email and other posts mentioning iliad and/or fort knox
https://www.garlic.com/~lynn/2006r.html#24 A Day For Surprises (Astounding Itanium Tricks)
https://www.garlic.com/~lynn/2006r.html#26 A Day For Surprises (Astounding Itanium Tricks)
https://www.garlic.com/~lynn/2006t.html#7 32 or even 64 registers for x86-64?
https://www.garlic.com/~lynn/2006u.html#29 To RISC or not to RISC
https://www.garlic.com/~lynn/2006u.html#31 To RISC or not to RISC
https://www.garlic.com/~lynn/2006u.html#32 To RISC or not to RISC
https://www.garlic.com/~lynn/2006u.html#39 P390
https://www.garlic.com/~lynn/2006v.html#6 Reasons for the big paradigm switch
https://www.garlic.com/~lynn/2006v.html#20 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006x.html#0 What's a mainframe?
https://www.garlic.com/~lynn/2006x.html#21 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2006y.html#36 Multiple mappings
https://www.garlic.com/~lynn/2006y.html#40 Multiple mappings
https://www.garlic.com/~lynn/2007b.html#16 V2X2 vs. Shark (SnapShot v. FlashCopy)
https://www.garlic.com/~lynn/2007b.html#44 Why so little parallelism?
https://www.garlic.com/~lynn/2007b.html#57 "The Elements of Programming Style"
other posts in this thread:
https://www.garlic.com/~lynn/2007f.html#21 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#23 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#24 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#25 The Perfect Computer - 36 bits?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 17 Mar 2007 09:31:17 -0600jmfbahciv writes:
early '76 ... the issue on cancelling vm370 and moving the resources to getting mvs/xa out the door ... wasn't particularly tied to the general economy ... it was that the corporation had been so focused on turning out FS (as a 360/370 replacement) ... that the 360/370 product pipeline was bare.
wiki article mentioning first VAX (11/780) was introduced on 25OCT77.
https://en.wikipedia.org/wiki/OpenVMS
the sidetrack into FS, (also) helped (360/370) clone processors to gain foothold.
then when FS was finally canceled, there was a realization that
several years of "lost time" (in 360/370 product area) had to be made
up.
https://www.garlic.com/~lynn/2007f.html#26 The Perfect Computer - 36bits?
lots of past posts mentioning FS
https://www.garlic.com/~lynn/submain.html#futuresys
one of the final nails in the FS coffin was report by the Houston Science Center ... something about if you took ACP/TPF running on 370/195 and moved it to equivalent FS machine (made out of fastest hardware then available) ... the thruput would appprox. be that of running ACP/TPF on 370/145 (i.e. something like 20 to 30 times slower).
a few other refereces to FS ... which i've previously posted, can be
found here:
https://www.ecole.org/en/session/49-the-rise-and-fall-of-ibm
https://www.ecole.org/en/session/49-the-rise-and-fall-of-ibm
from above:
IBM tried to react by launching a major project called the 'Future
System' (FS) in the early 1970's. The idea was to get so far ahead
that the competition would never be able to keep up, and to have such
a high level of integration that it would be impossible for
competitors to follow a compatible niche strategy. However, the
project failed because the objectives were too ambitious for the
available technology. Many of the ideas that were developed were
nevertheless adapted for later generations. Once IBM had acknowledged
this failure, it launched its 'box strategy', which called for
competitiveness with all the different types of compatible
sub-systems. But this proved to be difficult because of IBM's cost
structure and its R&D spending, and the strategy only resulted in a
partial narrowing of the price gap between IBM and its rivals.
... snip ...
i.e. focusing on high-level of integration as countermeasure to
the clone controllers & device business ... as previously
mentioned, I've been blamed for helping start (project worked on as
undergraduate in the 60s).
https://www.garlic.com/~lynn/submain.html#360pcm
The decision to shutdown the burlington mall group and move everybody to POK had been made, but it appeared that the people weren't going to be told until just before they had to be moved ... leaving people with little or no time to make the decision and/or make alternative plans.
Then there was a "leak" ... and a subsequent "witch hunt" attempting
to identify the source of the leak ... this created a very chilling
effect walking down the halls of the old SBC bldg (which had been
emptied and the people moved after the settlement with CDC ... before
the vm370 development group moved in). previous post mentioning the
"witch hunt"
https://www.garlic.com/~lynn/2006o.html#51 The Fate of VM - was: Re: Baby MVS???
part of filling the gap in 360/370 (hardware) product pipeline was the 303x processors. as i've mentioned before, the 303x "channel director" was repackaged 370/158 engine with the 370/158 integrated channel microcode (and w/o the 370/158 370 microcode) as independent processor. Then the 3031 was a repackaged 370/158 (with only the 370 microcode and no integraged channel microcode) coupled with a (external) "channel director". The 3032 was repackaged 370/168 coupled with one (or more) channel directors. The 3033 started out as 370/168 wiring diagram mapped to chips that were faster (than the ones used in the 168). The chips were about 20% faster which would have made the 3033 about 20% faster than 168. The chips also had a lot more circuits/chip ... which originally were to go unused. Somewhere in the cycle there was targeted effort to redesign critical pieces of logic to make better use the denser circuits (doing more "on-chip" in each chip). This eventually resulted in the 3033 shipping out at about 50% faster than 168-3 (instead of only 20% faster)
some earlier posts mentioning 303x channel director
https://www.garlic.com/~lynn/2007b.html#18 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#21 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#62 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#32 I/O in Emulated Mainframes
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 17 Mar 2007 09:57:02 -0600krw <krw@att.bizzzz> writes:
are you referring to me?
maybe datamation had an article mentioning something to that effect ... however, i never saw any such stuff. it possibly more was a situation that after demonstrating some immunity to not having career, promotions and/or raises ... there wasn't a lot left that they could do (except out and out fire you).
it was more akin to Boyd's quote ... in this post
https://www.garlic.com/~lynn/2007.html#20 MS to world: Stop sending money, we have enough - was Re: Most ... can't run Vista
except I appeared to have been afflicted long before I met Boyd.
another related reference:
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 17 Mar 2007 10:39:34 -0600re:
oh, and during the hey day of FS ... i wouldn't join in with the rest
of the crowd and the stampede ... indirect reference:
https://www.garlic.com/~lynn/2007f.html#14 more shared segment archeology
i had even made unflattering references with comparison to a long-playing (decade plus) cult film playing down in central sq ... and something about the inmates being in charge of the institution.
recent posts in this thread mentioning future system project
https://www.garlic.com/~lynn/2007f.html#26 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
other posts mentioning panning FS as career enhancing move
https://www.garlic.com/~lynn/99.html#100 Why won't the AS/400 die? Or, It's 1999 why do I have to learn how to use
https://www.garlic.com/~lynn/2000f.html#16 [OT] FS - IBM Future System
https://www.garlic.com/~lynn/2001f.html#33 IBM's "VM for the PC" c.1984??
https://www.garlic.com/~lynn/2003b.html#8 Card Columns
https://www.garlic.com/~lynn/2005f.html#1 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2005f.html#19 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2005j.html#32 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005p.html#39 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005s.html#16 Is a Hurricane about to hit IBM ?
https://www.garlic.com/~lynn/2005u.html#5 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2006d.html#15 Hercules 3.04 announcement
https://www.garlic.com/~lynn/2006h.html#52 Need Help defining an AS400 with an IP address to the mainframe
https://www.garlic.com/~lynn/2006i.html#33 virtual memory
https://www.garlic.com/~lynn/2006m.html#44 Musings on a holiday weekend
https://www.garlic.com/~lynn/2006p.html#50 what's the difference between LF(Line Fee) and NL (New line) ?
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is that secure : <form action="https" from a local HTML page ? Newsgroups: comp.security.misc Date: Sat, 17 Mar 2007 14:25:13 -0600Volker Birk <bumens@dingens.org> writes:
this was quickly subverted by most electronic commerce deployments
when they discovered that using SSL cut their thruput/performance
by 80-90 percent ... a couple past post mentioning consulting for
a small client/server startup that wanted to process payments on
their servers ... they had this technology called SSL and it needed
to be applied to real business processes ... it frequently is now
referred to as electronic commerce
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
the default became you typed in (non-https) URL and did all your
shopping online (no MITM countermeasure) and then the webserver
provided a button that you clicked on that got you an SSL connection
to the payment process. Since the individual no longer had any
awareness of the relationship between the URL and the payment website
... and no longer provided the URL ... the subsequent certificate
checking was only validating that the website had a valid
certificate. The scenario about the website, that you thought you were
talking to, is actually the website you are talking to, was broken. The
only thing now being proven was that the website corresponded to the
website URL that the website claimed to be. lots of past posts about
SSL domain name certificates (many referring to early days of SSL
deployments and original assumptions)
https://www.garlic.com/~lynn/subpubkey.html#sslcert
A bogus MITM-website could be handling all the shopping (since that part wasn't being checked) ... and then it handed it off to a bogus "payment" URL (for some website that the attackers were able to obtain a valid certificate). Again, the whole scenario about are you really talking to the website that you thot you were talking to ... has been compromised.
Later email phishing took advantage of this same disconnect by having people click on a URL in the phishing email. The email claimed that the URL was for something else than what the URL actually was (i.e. original SSL assumption based on the person knowing the connection between the website and the URL was circumvented). The attackers could have the provided URL be an SSL connection to a website for which they had a valid certificate (since the browser is only checking the correspondence between the domain name in the provided URL and the domain name in the certificate).
Bascially SSL was designed as MITM countermeasure to ip-address hijacking and/or stuff like DNS cache poisoning (attacking the correspondence/mapping between a domain name and an ip-address). To actually have SSL serve as a generalized MITM countermeasure required that the user know the correspondence between the website/URL, that they thot they were talking to, and the website/URL, that they actually were actually talking to. When that was lost ... lots of attacks were possible in the infrastructure. An MITM-attack could even provide a valid SSL URL (via email) for connection to their website ... which then transparently established a second SSL connection to the "real" website.
The problem with phishing using bogus impersonation websites
(regardless of whether SSL was used or not) become prevalent enuf to
justify some institutions looking at other countermeasures to website
impersonation (i.e. additional website identification mechanisms so
the user had additional confidence that the website, that they thot they
were talking to, was actually the website they were talking
to). However, these mechanisms typically haven't had any
countermeasures to MITM-attacks ... aka phishing points
to a MITM, bogus website that transparently creates a connection to
the "real website". some posts in recent threads touching on the
subject:
https://www.garlic.com/~lynn/aadsm26.htm#25 EV - what was the reason, again?
https://www.garlic.com/~lynn/aadsm26.htm#26 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#27 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#28 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#30 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#31 man in the middle, SSL
https://www.garlic.com/~lynn/aadsm26.htm#40 PKI: The terrorists's secret weapon
https://www.garlic.com/~lynn/aadsm26.htm#41 PKI: The terrorists's secret weapon (part II)
lots of other posts mentioning MITM attacks
https://www.garlic.com/~lynn/subintegrity.html#mitm
so after consulting for this small client/server startup (that had
this technology they called SSL) on what was to become what is now
called electronic commerce, we spent some time in the x9a10 financial
standard working group. In the mid-90s, the x9a10 financial standard
working group had been given the requirement to preserve the
integrity of the financial infrastructure for all retail
transactions. the result was the x9.59 financial standard.
https://www.garlic.com/~lynn/x959.html#x959
x9.59 transactions now have end-to-end authentication armoring ... as
countermeasure to attackers using any information (from previous
transaction for replay attacks) for generating new, fraudulent
transactions. This eliminates the risk of evesdropping/replay attacks
... and therefor there is no pressing need to actually encrypt the
transaction and/or hiding the information during transmission (which
is the current major, wide-spread electronic commerce use for SSL in
the world today). The x9.59 standard also eliminates the risk in the
majority of the data breaches and security breaches where the
attackers are able to turn around and use the information to generate
fraudulent transactions (it doesn't eliminate such data breaches and
security breaches, it just makes most of the information useless to
the attackers ... eliminating majority of the financial motivation for
the bad guys for performing the breaches). some topic drift about
security proportional to risk around many of the breaches
https://www.garlic.com/~lynn/2001h.html#61
this somewhat involves the security acronym "PAIN"
P - privacy (or sometimes CAIN, confidential) A - authentication I - integrity N - non-repudiation
... in effect, X9.59 is using end-to-end authentication and integrity (transaction armoring) as a countermeasure to fraudulent financial transactions ... in lieu of SSL's "privacy" (which is only hiding/encrypting the information during internet transmission).
now, SSL countermeasures to MITM vulnerabilities have other issues.
the typical business process for a domain name SSL certificate has the applicant providing a lot of identification information. Nominally the certification authority (before generating the certificate) is supposed to perform the (time-consuming, error prone, and expensive) task of matching the applicant's identification information with the identification information on file with the domain name infrastructure (for the real domain name owner). Since the root fundamentals of the whole infrastructure is then dependent on the validity of this information (at the domain name infrastructure); things like domain name hijacking (where the domain name ownership information is modified) ... can also create a big vulnerability in the whole infrastructure (i.e. attacker performs domain name hijacking using a bogus corporation under the attacker's control ... and then applies for an ssl certificate).
So there are some proposals (even backed by the certification authority industry) for improving the integrity of domain name infrastructure operation. This also creates something of a dilemma, since a large part of the justification for SSL (in the first place) involved there being integrity issues/problems with the domain name infrastructure. Fixing some number of these integrity issues, significantly reduces the justification for having SSL (certificates).
Even more than a dilemma, there is a real catch-22. Part of the integrity improvements and countermeasure for domain name hijacking has the domain name owner registering a public key as part of ownership. Then all future communication is digital signed (and the digial signature validated with the on-file public key, NOTE no digital certificates are involved). This eliminates some amount of unauthorized, bogus communication perporting to transfer domain name ownership (reducing the risk of domain name hijacking).
The certification authority industry can even can make use of this feature and require SSL domain name certificate applications to be digitally signed. Then the certication authority can replace the error-prone, time-consuming, complex and possibly very expensive identification matching process with a much more reliable, simpler, and less-expensive authentication process (by also doing real-time retrival of the on-file public key from the domain name infrastructure to validate the digital signature on the certificate application).
The catch-22 is that if the certification authority industry can start
making use of (and base their whole business on) real-time retrieval
of public keys (from the domain name infrastructure) ... then it is
possible that the rest of the world could also start doing real-time
retrieval of public keys ... totally eliminating the requirement for
SSL domain name digital certificates (and the certification
authority industry). misc. past posts mentioning this catch-22
for the certification authority industry (end-users getting
information directly from the authoritative agency responsible
for the information ... rather than going thru certificaton
authority intermediaries).
https://www.garlic.com/~lynn/subpubkey.html#catch22
There is even the possibility of a new, highly optimized SSL-like
protocol using domain name infrastructure real-time public keys
... and no digital certificates. misc. past posts mentioning public
key operation w/o requiring the use of digital certificates
https://www.garlic.com/~lynn/subpubkey.html#certless
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: A database theory resource - ideas Newsgroups: comp.databases.theory Date: Sat, 17 Mar 2007 14:39:33 -0600"Bruce C. Baker" <bcbakerXX@cox.net> writes:
While going to school, Stu was also doing a lot of work at the science
center.
https://www.garlic.com/~lynn/subtopic.html#545tech
Among other things, he implemented the CMS SCRIPT command ... document
formater. He also left around some number of "MAD" labels in various
places in the source. Of course it was also during this period that
"G", "M", and "L" invented GML at the science center ... and GML tag
processing was added to CMS SCRIPT command. GML later evolved into
SGML, HTML, XML, and other forms. misc. past posts
https://www.garlic.com/~lynn/submain.html#sgml
And the first webserver in the states (and outside Europe) was on the
vm/cms system at SLAC ... from recent thread:
https://www.garlic.com/~lynn/2007d.html#29 old tapes
https://www.garlic.com/~lynn/2007d.html#39 old tapes
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Historical curiosity question Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers Date: Sat, 17 Mar 2007 19:56:35 -0600Rob van der Heij wrote:
some long winded topic drift ...
as undergraduate i had done a lot of modifications to the cp67 kernel ... a lot oriented towards significantly improving pathlength for os360 guest virtual machines, new resource management algorithms, and dynamic adaptive resource control.
I had also looked at doing some stuff for CMS ... one of the things I realized that CMS was simulating the operation of doing synchronous disk transfers with overhead of sio/lpsw-wait/interrupt paradigm. so i defined a new CCW opcode that would do synchronous disk transfers ... and the virtual machine would get back CC=1, csw stored on the SIO operation ... indicating the operation had already completed.
This i got somewhat slammed on by the people at the science center as having violated 360 machine architecture and principles of operation. Eventually it was explained that it would be possible to use the 360 "DIAGNOSE" instruction to implement such "violations" ... since the principles of operation defined the DIAGNOSE instruction implementation as model dependent. Define an abstract 360/virtual machine model and the way that the DIAGNOSE instruction work for that "model". However, the pathlength improvement for the change was pretty significant ... so the synchronous disk transfer operation was eventually re-implemented with DIAGNOSE instruction.
Later when I joined the science center ... one of the things that i
did for cp67/cms (that never shipped in the product) was the cp67 and
cms changes to support page-mapped filesystem operation. This was
combined in general set of stuff that I referred to as virtual memory
management. Later it was some of the stuff that was ported to vm370
... old communication with reference
https://www.garlic.com/~lynn/2006v.html#email731212
a small subset of the virtual memory management stuff made it out in
vm370 as DCSS (but not the page mapped filesystem stuff or a lot of
other stuff) ... recent post
https://www.garlic.com/~lynn/2007f.html#14 more shared segment archeology
Note that even with the DIAGNOSE operation there was still a lot of
overhead related to emulated channel programs that require real
addresses for execution (shadows of the virtual channel program
created with real addresses of the virtual pages which have been
pinned in real storage). This is not only true for virtual machine
emulation ... but anything that has applications building channel
programs in a virtual address space. For reference, posts about
originally prototype OS/360 to VS2 virtual memory operation by hacking
a copy of cp67's CCWTRANS into the side of MVT (to create translated,
shadow channel programs with real address and pinned virtual pages)
https://www.garlic.com/~lynn/2007e.html#19 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#27 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007e.html#46 FBA rant
https://www.garlic.com/~lynn/2007f.html#0 FBA rant
https://www.garlic.com/~lynn/2007f.html#6 IBM S/360 series operating systems history
so the page mapped filesystem support, changes to both cp67 to provide the DIAGNOSE instruction API) and changes to low-level CMS filesystem function to use the cp67 API (pretty much leaving the high-level CMS filesystem interfaces "as-is") ... eliminated most of the rest of this channel program translation overhead gorp. It also moved the CMS disk paradigm interface even beyond the simplifications possible with FBA disks.
Having drastically simplified the disk paradigm interface ... the implementation of a lot of other features became significantly easier. For instance, it was possible to dynamically adjust how requested page transfers were actually performed being able to dynamically do either synchronous transfers and/or even asynchronous transfers (transparent to the synchronous CMS virtual machine paradigm by fiddling the page invalid bits).
The simple, original implementation just mapped a set of contiguous page records ... to contiguous cylinders supported leveraging existing minidisk definitions. However, it also become extremely straight-forward to do other types of enhancements (having removed the binding for the cms virtual machine to explicit ckd disk hardware characteristics), like having multiple sequentially chained blocks of pages ... at discontiguous locations on the same or different disks ... emulated a single set of (contiguous) page records (aka enabling relatively trivial implementation support for various kinds of cms filesystems spanning multiple disks).
A lot of this is analogous to the features that showed up in more advance controllers and the logical volume manager (LVM for unix systems being able to specify filesystems as possibly multiple discontiguous groups of records ... either as concatenated discontiguous allocation or various kinds of RAID operation).
lots of past posts mentioning (cms filesystem) page mapped work
https://www.garlic.com/~lynn/submain.html#mmap
I also later leveraged the kernel diagnose API for page mapping to do
a prototype implementation that moved the cp spoolfile system into a
virtual address space. part of it was I needed to speed up spool file
thruput for the vnet/rscs virtual machine by a couple orders of
magnitude to correspond with the high-speed backbone work ... misc
posts
https://www.garlic.com/~lynn/subnetwork.html#hsdt
and misc. pasts posts mentioning the spool file system prototype
work
https://www.garlic.com/~lynn/2000b.html#43 Migrating pages from a paging device (was Re: removal of paging device)
https://www.garlic.com/~lynn/2001n.html#7 More newbie stop the war here!
https://www.garlic.com/~lynn/2002b.html#44 PDP-10 Archive migration plan
https://www.garlic.com/~lynn/2003b.html#33 dasd full cylinder transfer (long post warning)
https://www.garlic.com/~lynn/2003b.html#44 filesystem structure, was tape format (long post)
https://www.garlic.com/~lynn/2003b.html#46 internal network drift (was filesystem structure)
https://www.garlic.com/~lynn/2003g.html#27 SYSPROF and the 190 disk
https://www.garlic.com/~lynn/2003k.html#26 Microkernels are not "all or nothing". Re: Multics Concepts For
https://www.garlic.com/~lynn/2003k.html#63 SPXTAPE status from REXX
https://www.garlic.com/~lynn/2004g.html#19 HERCULES
https://www.garlic.com/~lynn/2004m.html#33 Shipwrecks
https://www.garlic.com/~lynn/2004p.html#3 History of C
https://www.garlic.com/~lynn/2005d.html#38 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005j.html#58 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005n.html#36 Code density and performance?
https://www.garlic.com/~lynn/2005s.html#28 MVCIN instruction
https://www.garlic.com/~lynn/2005s.html#46 Various kinds of System reloads
https://www.garlic.com/~lynn/2005s.html#50 Various kinds of System reloads
https://www.garlic.com/~lynn/2006.html#35 Charging Time
https://www.garlic.com/~lynn/2006e.html#36 The Pankian Metaphor
https://www.garlic.com/~lynn/2006k.html#51 other cp/cms history
https://www.garlic.com/~lynn/2006o.html#64 The Fate of VM - was: Re: Baby MVS???
https://www.garlic.com/~lynn/2006p.html#11 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006q.html#27 dcss and page mapped filesystem
https://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2006t.html#45 To RISC or not to RISC
https://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Historical curiosity question Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers Date: Sat, 17 Mar 2007 20:57:07 -0600e:
"full-pack" minidisk footnote.
moving to fba-like devices ... you tend to have the device returning the number of records on the device ... it eliminates the tight binding between device geometry and other characteristics that have been part of the CKD device paradigm.
the place where (ckd) full-pack minidisks came into play was with applications doing dynamic channel program modifications. they wouldn't actually be modifying the channel program instructions but they could be dynamically modifying the seek ccw channel program argument. CCWTRANS had to "shadow" the channel program instructions in order to convert virtual address to real address as part of executing the channel program. CCWTRANS would also shadow seek ccw arguments ... converting virtual (cylinder/track) seek arguments to "real" seek arguments. Minidisks that didn't start at real location zero had the seek arguments appropriately incremented ... and minidisks that didn't extend to end of device ... might have seeking past end of device simulated for some seek argument. For full-pack minidisks (and/or dedicated devices) ... the conversion/translation of seek arguments could be eliminated (with the seek CCW pointing at the virtual seek argument in the virtual machine virtual address space ... instead of a shadow translated value).
This showed up with running ISAM in a virtual machine ... where the ISAM channel programs could be dynamically modifying seek arguments. w/o full-pack minidisks ... the dynamic modification would be with respect to the copy in virtual machine virtual memory ... and not the translated version that the shadow seek CCW was pointing to. With full-pack minidisks (and/or dedicated devices), the shadow seek CCW could be pointing at the copy in virtual memory (rather than a translated copy) ... that potentially is the target of some read CCW possibly doing dynamic seek argument modification.
recent posts mentioning "self-modifying" ISAM channel program:
https://www.garlic.com/~lynn/2007e.html#14 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#19 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#27 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007f.html#4 ISAM and/or self-modifying channel programs
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: "MVS Experience" Newsgroups: bit.listserv.ibm-main Date: Sun, 18 Mar 2007 11:17:40 -0600Doc Farmer wrote:
and from old post
https://www.garlic.com/~lynn/2001e.html#31 High Level Language Systems was Re: computer books/authors
"Real Programmers Don't Eat Quiche" (also "Real Software Engineers Don't Read Dumps")
from above:
Real Programmers don't eat quiche. They like Twinkies, Coke and palate-scorching Szechwan food.
... snip ...
Long ago and far away, I was at a conference/meeting that had been selected to be beta-test for Jolt.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Silly beginner questions Newsgroups: sci.crypt Date: Sun, 18 Mar 2007 13:58:25 -0600David Eather <eather@tpg.com.au> writes:
and slight topic drift about security proportional to risk
https://www.garlic.com/~lynn/2001h.html#61
now there was a machine built that brute forced DES key.
however there may be instances/uses of DES where current key brute forcing technology still doesn't represent a serious risk ... say ATM transaction using DUKPT with a lifetime measured in a few seconds (and value in no more than few hundreds of dollars).
... most of the "broken" scenarios involving brute force, measured the elapsed time to brute force a key (typically as a function of the key size/space) compared to the expected lifetime use of such keys. If the projected elapsed time to brute force a key is significantly longer than any expected use of such a key (and/or expected lifetime of the material protected by such a key) ... then it is isn't normally considered to be a real break/risk.
A frequent example is DRM associated with "protecting" certain popular works of art worth at least hundreds of millions of dollars ... and projected lifetime of at least 40yrs ... use of (single) DES key for such an application is obviously "broken" (since the potential value to the attacker makes it a very attractive target and the DES key can be brute forced in much less than the expected lifetime of the key). It isn't so much that DES has been broken (by brute force technology), it is that using a single DES key for that particular application is "broken".
In that sense ... there has been some amount of work projecting improvements in technology over the years for brute force attacks ... and how large a key size may be required to be resistant to brute force attacks for specified length of time (for some applications).
So for some of these applications ... the cost/benefit for attackers means that even some of the longer key sizes (larger key space) are already considered "broken" (even tho there is no existing demonstrated successful brute force attack) ... since the projections are that cost/benefit for brute force attacks on such key sizes will be viable within the projected lifetime of specific key use (for specific applications) ... and at the same time, current DES isn't considered broken for other applications (because current DES brute force attacks still aren't practical within projected lifetime of the specific key use).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Sun, 18 Mar 2007 14:12:16 -0600"Gerard Schildberger" <Gerard46@rrt.net> writes:
... in part because in earlier life we had worked with the
people responsible for the server ...
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/96.html#15
indirect reference
https://www.garlic.com/~lynn/2001n.html#83
when we were doing ha/cmp product
https://www.garlic.com/~lynn/subtopic.html#hacmp
... we frequently commented that it took 4-10 times the effort to take a well-coded, well-tested application and turn it into a "service" (than the typical effort that goes into well-coded, well-tested application) ... because of industrial strength dataprocessing and RAS issues.
we had also required failure mode matrix testing ... given several possible program states and a wide variety of possible failure conditions (over possible end-to-end environments) ... there had to be demonstrated recovery (preferrably) and/or at least fast (five mins) diagnostic capability for each of the states/failures.
misc. past posts mentioning the 4-10 times comments, failure mode
testing, and/or RAS
https://www.garlic.com/~lynn/96.html#18 IBM 4381 (finger-check)
https://www.garlic.com/~lynn/96.html#27 Mainframes & Unix
https://www.garlic.com/~lynn/96.html#28 Mainframes & Unix
https://www.garlic.com/~lynn/96.html#33 Mainframes & Unix
https://www.garlic.com/~lynn/aadsm16.htm#20 Ousourced Trust (was Re: Difference between TCPA-Hardware and a smart card and something else before
https://www.garlic.com/~lynn/2000g.html#15 360/370 instruction cycle time
https://www.garlic.com/~lynn/2000g.html#16 360/370 instruction cycle time
https://www.garlic.com/~lynn/2001.html#22 Disk caching and file systems. Disk history...people forget
https://www.garlic.com/~lynn/2001e.html#41 Where are IBM z390 SPECint2000 results?
https://www.garlic.com/~lynn/2001f.html#75 Test and Set (TS) vs Compare and Swap (CS)
https://www.garlic.com/~lynn/2001g.html#4 Extended memory error recovery
https://www.garlic.com/~lynn/2001g.html#44 The Alpha/IA64 Hybrid
https://www.garlic.com/~lynn/2001i.html#48 Withdrawal Announcement 901-218 - No More 'small machines'
https://www.garlic.com/~lynn/2001k.html#18 HP-UX will not be ported to Alpha (no surprise)exit
https://www.garlic.com/~lynn/2001l.html#21 mainframe question
https://www.garlic.com/~lynn/2001l.html#28 Indiana University and IBM Unveil the Nation's LargestUniversity-Owned Supercomputer
https://www.garlic.com/~lynn/2001n.html#91 Buffer overflow
https://www.garlic.com/~lynn/2001n.html#93 Buffer overflow
https://www.garlic.com/~lynn/2002.html#52 Microcode?
https://www.garlic.com/~lynn/2002d.html#45 RAS & 2x/18m (was Re: On-die memory controller pros/cons?)
https://www.garlic.com/~lynn/2002e.html#73 Blade architectures
https://www.garlic.com/~lynn/2002j.html#41 Transportation
https://www.garlic.com/~lynn/2002k.html#34 30th b'day .... original vm/370 announcement letter (by popular demand)
https://www.garlic.com/~lynn/2002n.html#11 Wanted: the SOUNDS of classic computing
https://www.garlic.com/~lynn/2002n.html#31 why does wait state exist?
https://www.garlic.com/~lynn/2002o.html#3 PLX
https://www.garlic.com/~lynn/2003g.html#14 Page Table - per OS/Process
https://www.garlic.com/~lynn/2003g.html#62 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003j.html#15 A Dark Day
https://www.garlic.com/~lynn/2003p.html#37 The BASIC Variations
https://www.garlic.com/~lynn/2004b.html#8 Mars Rover Not Responding
https://www.garlic.com/~lynn/2004b.html#48 Automating secure transactions
https://www.garlic.com/~lynn/2004d.html#75 DASD Architecture of the future
https://www.garlic.com/~lynn/2004e.html#28 The attack of the killer mainframes
https://www.garlic.com/~lynn/2004e.html#33 The attack of the killer mainframes
https://www.garlic.com/~lynn/2004k.html#20 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004l.html#49 "Perfect" or "Provable" security both crypto and non-crypto?
https://www.garlic.com/~lynn/2004o.html#15 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2004p.html#23 Systems software versus applications software definitions
https://www.garlic.com/~lynn/2004p.html#63 Systems software versus applications software definitions
https://www.garlic.com/~lynn/2004p.html#64 Systems software versus applications software definitions
https://www.garlic.com/~lynn/2004q.html#51 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005b.html#40 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005f.html#49 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005i.html#42 Development as Configuration
https://www.garlic.com/~lynn/2005j.html#64 More on garbage
https://www.garlic.com/~lynn/2005m.html#4 [newbie] Ancient version of Unix under vm/370
https://www.garlic.com/~lynn/2005m.html#17 Another - Another One Bites the Dust
https://www.garlic.com/~lynn/2005n.html#26 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005s.html#45 winscape?
https://www.garlic.com/~lynn/2005t.html#29 AMD to leave x86 behind?
https://www.garlic.com/~lynn/2006b.html#24 Seeking Info on XDS Sigma 7 APL
https://www.garlic.com/~lynn/2006i.html#34 TOD clock discussion
https://www.garlic.com/~lynn/2006i.html#35 TOD clock discussion
https://www.garlic.com/~lynn/2006n.html#20 The System/360 Model 20 Wasn't As Bad As All That
https://www.garlic.com/~lynn/2006n.html#35 The very first text editor
https://www.garlic.com/~lynn/aadsm25.htm#37 How the Classical Scholars dropped security from the canon of Computer Science
https://www.garlic.com/~lynn/2007.html#38 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007.html#39 Just another example of mainframe costs
https://www.garlic.com/~lynn/2007b.html#3 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#28 What is "command reject" trying to tell me?
https://www.garlic.com/~lynn/2007e.html#33 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM System z9 Newsgroups: comp.arch,alt.folklore.computers Date: Sun, 18 Mar 2007 14:31:55 -0600Stephen Fuld <S.Fuld@PleaseRemove.att.net> writes:
from appendix
https://www.garlic.com/~lynn/8583flow.htm
of x9.59 financial standard
https://www.garlic.com/~lynn/x959.html#x959
we did define some bit fields carried in iso8583 addenda field.
previously there had been somewhat separate x9.15 standard for pos-terminals to MFI ... which allowed for ascii representation ... before being converted to (iso8583/interchange) ebcdic. however, x9.15 has been subsumed by section in later iso8583 version. Note for a long time ... a lot of the POS-terminals essentially could be considered repackaged PC (in totally different form factor).
Within the past couple yrs, there has also been some amount of press about the conversion of large number ATM machines off of OS2 to Windows.
For real drift ... within the last decade ... I got a tour of a large MFI data center that had a large perkin-elmer box as the "terminal" controller handling the in-coming "dial" calls from POS-terminals doing dial (the ones you sometimes hear the modem noise at checkout).
This is descendent of the terminal controller clone box that I got to
work on as an undergraduate. The 2702 didn't do quite what I wanted it
to do ... so there was project programming an Interdata/3 to emulate
2702 (as well as doing additional function), reverse engineering the
mainframe channel interface, and building a channel interface board
for the Interdata/3. Later, Interdata was acquired by Perkin-Elmer.
Somebody that sold the Perkin-Elmer boxes in the 80s, claimed that the
channel interface board had never been redesigned from what was done
at the university in the 60s. Lots of past posts mentioning building
controller clone in the 60s
https://www.garlic.com/~lynn/submain.html#360pcm
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Silly beginner questions Newsgroups: sci.crypt Date: Sun, 18 Mar 2007 18:38:39 -0600David Eather <eather@tpg.com.au> writes:
the context of the comment was with respect to the mentioned DRM scenario ... which includes the lifetime of the information "protected" by the key ... not just the application of the key a specific key might only be used once for DRM ... but it still needs to provide for 40yr lifetime (i.e. the lifetime of the material of the information was included as part of the key lifetime ... not just the last use of the key).
This was also the reference that some key sizes for some applications may already be considered "broken" ... even if there is not an existing demonstration of a brute force break for that key size/space.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Mon, 19 Mar 2007 09:26:54 -0600jmfbahciv writes:
when i did the resource manager ... i got saddled with the whole product operations ... having to personally handle all aspects of what would be normally considered activity of a development, test and product ship group.
one of the things that had been done leading up to release of resource
manager was a lot of automated benchmarking ... that included both
stress testing as well as lot of calibration and validation of the
dynamic adaptive resource controls. the final cycle had approx. 2000
such tests that took 3 months elapsed time to run
https://www.garlic.com/~lynn/submain.html#benchmark
initially they wanted me to also do a monthly PLC for the resource manager that was in sync with the base product PLC. I refused, claiming that I could hardly even perform necessary regression and validation tests (besides doing everything else) on a monthly cycle. The final compromise was a three month PLC cycle for the resource manager.
shortly after graduating and joining the science center ... as new man in the group ... i got saddled for six months with the cp67 "development plan" (this was before there was the enormous growth in the development group and physical split from the science center). It was a five year plan, included growing from 15 people to several hundred people and individual line-items with typical resource requirements from 1-3 person months up to 30-40 person months. This plan had the individual line-items arranged into product "releases" at approx. six month intervals (including morph from cp67 to vm370). There were lots of interdependencies, ramp-up with bringing new people on board, different items might have pre-requisites and/or co-requisites involving other items (affecting how things were packaged into releases)... eventually hitting several hundred items (along with interdependencies and time-lines).
However, there was this really "fun" session once a week. Some corporate hdqtrs people claimed that to be a real "development" group you had to have this five year plan with regular reviews ... which they instituted with weekly conference calls. Some of the faction seemed to be part of making cp67 (and vm370) go away. It seemed to be that they thot they could bury a 15 person group with what it met to be a "real" development group. The weekly conference calls seemed to be filled with minutiae and trivia ... what would happen to the plan if some trivial line-item was shifted from one release to another ... or if the personal ramp-on was trivially changed, how might various line-items and releases be affected (this was all before any project plan software existed). After a couple weeks of this ... rather than laboriously re-arranging the hundreds of items to take into account their various trivia ... I got to the point where I could do it nearly in real-time ... answer their questions on the fly ... rather than spending the whole week preparing the responses (for the next conference call) to the trivia questions (that had been raised in the previous call).
The basic plan was never actually revised in response to the trivia questions ... just being able to come up with the responses to the trivia "what-ifs".
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: time spent/day on a computer Newsgroups: alt.folklore.computers Date: Mon, 19 Mar 2007 09:42:32 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
another corollary to the Boyd reference (effectively to bucking
the system) ... mentioned here:
https://www.garlic.com/~lynn/2007.html#20 MS to world: Stop sending money, we have enough
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
is about being able to tell the scouts out front by the large number of arrows in their back. while management may have various tactics to get people to conform and toe the line ... there is also predilection by large numbers of the crowd to back shoot individuals that are standing out front
other recent topic drift:
https://www.garlic.com/~lynn/2007f.html#29 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#30 The Perfect Computer - 36 bits?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Mon, 19 Mar 2007 11:59:08 -0600Andrew Swallow <am.swallow@btopenworld.com> writes:
... and then later a large number of series/1
https://en.wikipedia.org/wiki/Series/1
for some reason the above article has extensive section on series/1 use at the marine corps (for other topic drift, a former marine recon making references to all the datadinks)
there was a joke about a number of former os/360 MFT developers had transferred from IBM Kingston to Boca and RPS being their attempt to re-invent MFT on the series/1.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Mon, 19 Mar 2007 12:55:46 -0600krw <krw@att.bizzzz> writes:
i remember seeing quite a number system/7s ... but when i went to find references ... they were hard to come by ... and then there was some wiki references appeared to claim they were rarely seen outside ibm.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 09:09:00 -0600Brian Inglis <Brian.Inglis@SystematicSW.Invalid> writes:
old email with various 4341 references
https://www.garlic.com/~lynn/lhwemail.html#4341
code name for 4341 was E4 ... with the "E" standing for e-architecture
... which was somewhat the hardware architecture extensions at the
low-end for dos/vs ... somewhat analogous to the "XA" extensions at
the high-end for MVS. ... recent post with old email reference:
https://www.garlic.com/~lynn/2007d.html#65 IBM S/360 series operating systems history
old reference from gov. customer that if a machine (4341) was offered
that met a price/performance level, they would buy large numbers
... post with several old 4341/e4 email references (from late 70s)
https://www.garlic.com/~lynn/2006y.html#21 moving on
old post giving decade of vax numbers, sliced/diced by year,
model, us/non-us:
https://www.garlic.com/~lynn/2002f.html#0 Computers in Science Fiction
old email from mid-80s ... referring to "single system image work"
on clusters of machines
Date: 10/25/85 07:49:03
From: wheeler
re: DASD strategy meeting; unfortunately i had several other things to
attend to at the same time so I didn't get too much time to spend
there. In the little time I did spend there ... there was some
comments about planning for 1990 ... and the rate I perceived things
going, I believe hardware is moving faster than the group can plan
for.
For instance, there was some discussion of finding out what various
users were doing. Among others mentioned was some gov. TLA, Pacific NW
Bell, and Boeing ... and that after a another couple of months maybe
somebody will finally make contact. Nobody appeared to be aware that
that the gov. agency has been making extensive use of Britton-Lee
"smart" DASD engines (in fact it is possible that only one person even
knew what Britton-Lee was).
FYI, we already have a contract into the lawyers for a joint study
with a gov. agency on several single system image items. Also I'm up
in Seattle the end of next week talking to both PNB & BCS.
... snip ... top of post, old email index
for some recent drift about single-system-image stuff for HONE
(starting in the late 70s):
https://www.garlic.com/~lynn/2007f.html#20 Historical curiosity question
lots of other postings mentioning HONE
https://www.garlic.com/~lynn/subtopic.html#hone
for other drift ... i was one of the early BCS employees. Shortly after BCS was formed, I was asked to teach a one week CP67 class to the employees that were on board. It had to be scheduled during spring break since I was undergraduate and taking my own classes. They then hired me as a full-time employee for summer break to do a lot of dataprocessing related stuff (including managing a CP67 install). It was at some sort of management level since I got badge that allowed me to use a preferrential parking lot at Boeing field.
other recent oblique reference to some of this:
https://www.garlic.com/~lynn/2007e.html#63 FBA rant
later when we were doing ha/cmp
https://www.garlic.com/~lynn/subtopic.html#hacmp
we got into some amount of conflict attempting to do some really large
scale-up clustering ... addressing both the numerical intensive and
commercial markets
https://www.garlic.com/~lynn/lhwemail.html#medusa
other reference:
https://www.garlic.com/~lynn/2001n.html#83
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 20 Mar 2007 09:33:07 -0600jmfbahciv writes:
easy ... it frequently could take 7-10 years to come out with new item
(research, development, testing, etc) ... and the clone makers could
create a knock-off within six months. misc. posts about getting part
of the blame for clone controllers, having helped build one as an
undergraduate in the 60s
https://www.garlic.com/~lynn/submain.html#360pcm
slight drift, recent post mentioning trade-secret case ... where clone
maker had gotten internal specs. before announce. the case was for
billions ... the amount extra that a clone maker could make by having
a clone ready to ship the same day as the original ... rather than six
months later (cut the lead time having to obtain a model, reverse
engineer it and come out with clone)
https://www.garlic.com/~lynn/2007e.html#9 The Geneology of the IBM PC
it is somewhat the analogy with some of the patented "drugs" and generics/knock-off drugs.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 20 Mar 2007 10:03:41 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
also thrown into that 7-10 yrs ... all the stuff that didn't pan out and/or had to be discarded for one reason or another.
another recently mentioned simple example was all the air-bearing simulation
work that went into the design of thin-film floating heads
https://www.garlic.com/~lynn/2007e.html#43 FBA rant
https://www.garlic.com/~lynn/2007e.html#44 Is computer history taught now?
which also required a lot of prototypes being built and tested.
the clone makers frequently had little or none of that expense (not having to start from scratch ... but could start from a working example).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 10:19:55 -0600krw <krw@att.bizzzz> writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 10:26:57 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
... oh, and no CEC was older than 18m, they were in nearly constant upgrade cycle.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: John W. Backus, 82, Fortran developer, dies Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 10:39:29 -0600another person that had office in bldg. 28
John W. Backus, 82, Fortran developer, dies
http://news.com.com/John+W.+Backus%2C+82%2C+Fortran+developer%2C+dies/2100-1007_3-6168798.html?tag=nefd.top
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 20 Mar 2007 10:56:50 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
for other drift ... the issue of seven year development/product cycle was raised in the C4 effort ... especially what happens when competition has moved to much shorter cycle
past posts mentioning C4 effort
https://www.garlic.com/~lynn/2000f.html#41 Reason Japanese cars are assembled in the US (was Re: American bigotry)
https://www.garlic.com/~lynn/2000f.html#43 Reason Japanese cars are assembled in the US (was Re: American bigotry)
https://www.garlic.com/~lynn/2004c.html#51 [OT] Lockheed puts F-16 manuals online
https://www.garlic.com/~lynn/2004h.html#22 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2006m.html#49 The Pankian Metaphor (redux)
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 14:17:44 -0600kkt <kkt@zipcon.net> writes:
i was able to get something like 15percent improvement (with just the hardware part of the operations coming in around $1.5b) ... and they just laughed about my offer.
past posts referring to the methodology used:
https://www.garlic.com/~lynn/2002l.html#62 Itanium2 performance data from SGI
https://www.garlic.com/~lynn/2005d.html#6 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005k.html#17 More on garbage collection
https://www.garlic.com/~lynn/2005n.html#18 Code density and performance?
https://www.garlic.com/~lynn/2006f.html#22 A very basic question
https://www.garlic.com/~lynn/2006g.html#4 The Pankian Metaphor
https://www.garlic.com/~lynn/2006o.html#23 Strobe equivalents
https://www.garlic.com/~lynn/2006s.html#24 Curiousity: CPU % for COBOL program
https://www.garlic.com/~lynn/2006t.html#28 Why these original FORTRAN quirks?
https://www.garlic.com/~lynn/2006u.html#50 Where can you get a Minor in Mainframe?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 17:54:37 -0600Andrew Swallow <am.swallow@btopenworld.com> writes:
also, large customers now sign contracts for amount of processing power with potentially lots of extra processors actually available pre-installed ... and able to turn up/down capacity essentially on-demand.
Capacity on Demand Retains Mainframe Users; IT execs say the ability
to turn CPUs on and off can reduce computing costs
http://www.computerworld.com/action/article.do?command=viewArticleBasic&taxonomyName=Mainframes_and_Supercomputers&articleId=9002428&taxonomyId=159&intsrc=kc_li_story&taxonomyId=159&intsrc=kc_li_story
Capacity on Demand
http://www-03.ibm.com/systems/z/cod/
It used to be that whole hardware boxes had to be rolled in/out ... and the high-end hardware boxes were really big ticket items ... with any changes (in corporate america) requiring justification in semi-annual or annual corporate budget process.
some number of computer boxes found market uptake with prices that fell under individual department head sign-off authority and effectively, off-the-shelf, immediate delivery schedule (find out what the target individual's sign-off limit is ... and offer something within that sign-off limit, eliminating the person having to get higher level approval).
"capacity on demand" could be viewed as a response to such market pressures (in addition to the whole customer convenience issue)
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 19:38:05 -0600Brian Inglis <Brian.Inglis@SystematicSW.Invalid> writes:
there is industry service that collects EREP data from customers and reports results for different products (this was more interesting during the 80s when there were a lot more clone processor as well as clone controllers in the market).
i've considered that there was such an industry service ... as interesting as the actual published data.
in any case, the industry service published that there were something like 15-20 total channel check errors ... rather than the expected 3-5. this caused great concern and concerted effort to track down the reason (which eventually brought them to me).
i had raised the issue in my keynote mentioned here
https://web.archive.org/web/20011004023230/http://www.hdcc.cs.cmu.edu/may01/index.html
and asked the other vendors present who collected such information (all errors across all installed machines) .... even if they never made the information public. some of the other vendors mentioned that they might have some sample information ... but it wasn't publicly available.
in any case, i had changed the simulated error indication from channel check error to (IFCC) interface control check (which effectively resulted in the same error recovery processes).
past posts
https://www.garlic.com/~lynn/94.html#24 CP spooling & programming technology
https://www.garlic.com/~lynn/96.html#27 Mainframes & Unix
https://www.garlic.com/~lynn/2004j.html#19 Wars against bad things
https://www.garlic.com/~lynn/2004q.html#51 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005d.html#28 Adversarial Testing, was Re: Thou shalt have no
https://www.garlic.com/~lynn/2005e.html#13 Device and channel
https://www.garlic.com/~lynn/2005u.html#22 Channel Distances
https://www.garlic.com/~lynn/2006b.html#21 IBM 3090/VM Humor
https://www.garlic.com/~lynn/2006i.html#34 TOD clock discussion
https://www.garlic.com/~lynn/2006n.html#35 The very first text editor
https://www.garlic.com/~lynn/2006y.html#43 Remote Tape drives
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: John W. Backus, 82, Fortran developer, dies Newsgroups: alt.folklore.computers Date: Tue, 20 Mar 2007 21:37:14 -0600somewhat recent fortran archeological thread
when i did stint at BCS ... recent reference:
https://www.garlic.com/~lynn/2007f.html#44 Is computer history taught now?
i had run into some individuals that had been involved with original fortran use.
another individual from bldg. 28 (previous location before
move up the hill and name change from sjr to arc)
https://www.garlic.com/~lynn/2003g.html#43 Codd's death (x-post from a.f.c)
https://www.garlic.com/~lynn/2003g.html#46 death of Edgar F. (Ted) Codd
https://www.garlic.com/~lynn/2003g.html#52 Mercury News 04-20-2003 Computer pioneer, dead at 79,
https://www.garlic.com/~lynn/2003g.html#67 death of Edgar F. (Ted) Codd
and more recently Jim
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#33 Jim Gray Is Missing
and lots of past post about system/r
https://www.garlic.com/~lynn/submain.html#systemr
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Wed, 21 Mar 2007 09:35:00 -0600krw <krw@att.bizzzz> writes:
I don't know whether that was before or after this old email that
references in '79, the MIT LISP machine group asking IBM for 801 chips
for their prototype ... and Evans offering them 8100 instead.
https://www.garlic.com/~lynn/2003e.html#email790711 790711
https://www.garlic.com/~lynn/2006c.html#email790711 790711
https://www.garlic.com/~lynn/2006o.html#email790711 790711
https://www.garlic.com/~lynn/2006t.html#email790711 790711
misc. old posts mentioning 8100
https://www.garlic.com/~lynn/99.html#63 System/1 ?
https://www.garlic.com/~lynn/99.html#106 IBM Mainframe Model Numbers--then and now?
https://www.garlic.com/~lynn/99.html#239 IBM UC info
https://www.garlic.com/~lynn/2001b.html#75 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2001f.html#44 Golden Era of Compilers
https://www.garlic.com/~lynn/2001j.html#13 Parity - why even or odd (was Re: Load Locked (was: IA64 running out of steam))
https://www.garlic.com/~lynn/2001n.html#9 NCP
https://www.garlic.com/~lynn/2002.html#45 VM and/or Linux under OS/390?????
https://www.garlic.com/~lynn/2002.html#48 Microcode?
https://www.garlic.com/~lynn/2002c.html#42 Beginning of the end for SNA?
https://www.garlic.com/~lynn/2002e.html#5 What goes into a 3090?
https://www.garlic.com/~lynn/2002g.html#39 "Soul of a New Machine" Computer?
https://www.garlic.com/~lynn/2002j.html#28 ibm history note from vmshare
https://www.garlic.com/~lynn/2002l.html#7 What is microcode?
https://www.garlic.com/~lynn/2002q.html#53 MVS History
https://www.garlic.com/~lynn/2003b.html#5 Card Columns
https://www.garlic.com/~lynn/2003b.html#42 VMFPLC2 tape format
https://www.garlic.com/~lynn/2003e.html#65 801 (was Re: Reviving Multics
https://www.garlic.com/~lynn/2003f.html#22 Could somebody use SCSH, Sheme, or Lisp to create the "Lispm"
https://www.garlic.com/~lynn/2003g.html#2 Share in DC: was somethin' else
https://www.garlic.com/~lynn/2003l.html#62 IBM Manuals from the 1940's and 1950's
https://www.garlic.com/~lynn/2004.html#10 Dyadic
https://www.garlic.com/~lynn/2004.html#34 Two subjects: 64-bit OS2/eCs, Innotek Products
https://www.garlic.com/~lynn/2004.html#47 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004g.html#24 |d|i|g|i|t|a|l| questions
https://www.garlic.com/~lynn/2004p.html#27 IBM 3705 and UC.5
https://www.garlic.com/~lynn/2005q.html#46 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2005q.html#47 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006c.html#3 Architectural support for programming languages
https://www.garlic.com/~lynn/2006o.html#45 "25th Anniversary of the Personal Computer"
https://www.garlic.com/~lynn/2006t.html#9 32 or even 64 registers for x86-64?
https://www.garlic.com/~lynn/2007.html#46 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Wed, 21 Mar 2007 10:01:29 -0600Philip Morten <philip.morten@btinternet.com> writes:
when we were doing ha/cmp (with rs/6000)
https://www.garlic.com/~lynn/subtopic.html#hacmp
... we also spent a lot of time with the system/88 product manager. i have some recollection of issues with stratus sales approaching customers that expressed interest in system/88 and "moving" them to "real" stratus machines.
we also marketed ha/cmp to customers that had stratus already installed ... and were looking for "upgrades". One issue was five-nines availability. ha/cmp was fall-over with rs/6000. stratus still had planned outages for kernel and other software upgrades. Even a planned software downtime once a year, it could blow five-nines downtime budget for a century.
ha/cmp fall-over could be used to mask the software rollovers. There was some talk about stratus coming back with fall-over configurations ... but that would have pretty much negated having all the underlying fault-tolerant expense.
other part was that studies starting in the early 80s ... indicating standard hardware was starting to approach the point where over 90% of outages/down-time were not hardware-related.
this is also somewhat related to past posts about my wife having been
con'ed into going to POK to be in charge of loosely-coupled
architecture. While there, she put together Peer-Coupled Shared Data
architecture
https://www.garlic.com/~lynn/submain.html#shareddata
which, except for IMS hot-standby ... didn't see a lot of uptake until sysplex stuff (one of the reasons she left, constant battles and/or being ignored).
within the last decade, we had discussions with one of the major financial
transaction networks ... and they attributed their 100percent availability
over nearly the previous decade to
• ims hot-standby
• automated operator
ims hot-standby was running triple-replicated operation at two
geographically separated datacenters ... geographic considerations and
people mistakes had started to dominate failure modes.
for other drift, during ha/cmp work, we had coined the terms disaster
survivability and geographic survivability (to differentiate from
disaster/recovery). It was also the system/88 product administrator
that had asked us to author part of the corporation's continuous
availability strategy document (which got pulled because both POK and
Rochester complained that they couldn't meet the objectives)
misc. past posts mentioning continuous availability, disaster
survivability, geogrphic survivability
https://www.garlic.com/~lynn/submain.html#available
recent posts also wandering into ims database subject:
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007.html#39 Just another example of mainframe costs
https://www.garlic.com/~lynn/2007b.html#9 Mainframe vs. "Server" (Was Just another example of mainframe
https://www.garlic.com/~lynn/2007b.html#48 6400 impact printer
https://www.garlic.com/~lynn/2007c.html#42 Keep VM 24X7 365 days
https://www.garlic.com/~lynn/2007d.html#24 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007e.html#1 Designing database tables for performance?
https://www.garlic.com/~lynn/2007e.html#14 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#16 Attractive Alternatives to Mainframes
https://www.garlic.com/~lynn/2007e.html#31 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#36 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#37 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#41 IBM S/360 series operating systems history
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Wed, 21 Mar 2007 11:44:31 -0600Frank McCoy <mccoyf@millcomm.com> writes:
there was period where basic kernel operating system was still free
... misc. past posts mentioning unbundling and the transition from
free software to priced software (starting with applications)
https://www.garlic.com/~lynn/submain.html#unbundle
and the customer clone processors would be running "official", "free" kernel software ... however, corporate wouldn't accept bug reports unless the software was running on "real" processors. That met frequently that the clone vendor would have to reproduce the problem on a "real" processor ... and report the bug on behalf of their customer.
this was another scenario where clone cost structure was significantly
different ... recent posts on this subject related to motivation
behind FS project:
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#45 The Perfect Computer - 36 bits?
also recent post about trade-secret theft litigation involving a clone
maker ... was for billions ... since that was the estimated value of
clone maker getting out the same day as new product ... as opposed to
six months later after reverse engineering
https://www.garlic.com/~lynn/2007f.html#46 The Perfect Computer - 36 bits?
misc. other recent posts making mention of clone business
https://www.garlic.com/~lynn/2007.html#18 IBM sues maker of Intel-based Mainframe clones
https://www.garlic.com/~lynn/2007b.html#12 Special characters in passwords was Re: RACF - Password rules
https://www.garlic.com/~lynn/2007b.html#27 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#32 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007b.html#55 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007d.html#18 IBMLink 2000 Finding ESO levels
https://www.garlic.com/~lynn/2007d.html#50 Is computer history taugh now?
https://www.garlic.com/~lynn/2007d.html#59 Is computer history taugh now?
https://www.garlic.com/~lynn/2007e.html#3 The Genealogy of the IBM PC
https://www.garlic.com/~lynn/2007e.html#9 The Genealogy of the IBM PC
https://www.garlic.com/~lynn/2007e.html#38 FBA rant
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
https://www.garlic.com/~lynn/2007f.html#20 Historical curiosity question
https://www.garlic.com/~lynn/2007f.html#26 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#38 IBM System z9
https://www.garlic.com/~lynn/2007f.html#50 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#53 Is computer history taught now?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Wed, 21 Mar 2007 16:54:05 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: virtual machines, the new, old thing (again) Newsgroups: alt.folklore.computers Date: Thu, 22 Mar 2007 12:39:48 -0600some recent news URLs
eventually the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
obtained a 360/67 and was able to port cp40 to the '67 for cp67.
the last week in jan68, three people from cambridge came out and installed cp67 at the university where i was undergraduate.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Certificates Newsgroups: microsoft.public.security Date: Thu, 22 Mar 2007 13:53:26 -0600"Dumb Luck" <trevor.christiansen@gmail.com> writes:
basic public key authentication operations have individuals with local repository of trusted public keys. this is quite evident in implementations like PGP ... where the trusted public keys are used to directly authenticate email transmissions.
digital certificates and certification authorities ... are the electronic analog for things like letters credit/introduction for offline environments ... i.e. the relying party has had no prior relationship with the entity they are dealing with, and therefor no knowledge as to the characteristics of that entity. The relying party has some trust with a 3rd party ... which will attest to the characteristics of other entities ... but the relying party lacks any ability to directly communicate with this trusted 3rd party in real time.
the use of credentials, certificates, licenses, etc, ... as well as their electronic analogs were invented to address this offline scenario where the relying party is in need of information about unfamiliar and unknown entities that they will be dealing with.
for this scenario, the relying party's repository of trusted public keys is upgraded to include public keys of trusted 3rd parties. this public keys are soemtimes referred to as root certificates, but the "certificate" is purely a convenience container for the trusted public keys ... since they perform no other significant function.
Unknown entities now can present (digital) certificates/credentials to the relying party (issued by 3rd parties trusted by the relying party). The relying party uses the onfile trusted public key (for the 3rd party certification authority) to validate the digital certificate, and then use the public key from the (unknown entity's) digital certificate to validate something from the unknown entity.
This creates an indirection infrastructure for "trust" ... tracing back to the replying party's repository of trusted public keys. There are also hierarchical infrastructures of trust indirection ... where the relying party's repository of trusted public keys, is used to authenticate a (root CA) certification authority digital certificate issued for a subordinate certification authority ... which in turn issues digital certificates for unknown entities.
The two major authentication infrastructures for internet & networked
environments have been radius
https://www.garlic.com/~lynn/subpubkey.html#radius
and kerberos
https://www.garlic.com/~lynn/subpubkey.html#kerberos
both started out as shared-secret, password based infrastructures. there was subsequent work for both radius and kerberos to upgrade to public key authentication ... by registering public keys (in lieu of passwords) and using the onfile public keys to validate digital signatures (instead of checking password matching).
subsequently there were scenarios suggested where the relying party would not have access to the kerberos (and/or radius) infrastructure containing information with respect to entity needing to be authenticated. these were scenarios where the relying party also had never dealt with the entity (needing authentication) previously. This offline operation for relying parties needing to deal with unknown entities ... matched the business process for which certification authorities, digital certificates, and PKIs had been developed.
However, it subsequent deployments, it has turned out that there haven't been situations where the relying parties are offline and are dealing with totally unknown entities. As a result, it has been trivial to demonstrate that the use of certification authorities, digital certificates, and PKI operations in such environments are redundant and superfluous.
Lots of past posts pointing out if you invalidate fundamental
assumptions that have been used for justifying certification
authorities, digital certificates, and PKI operations for offline
operations dealing with unknown entities ... then it is trivial to
demonstrate that the digital certificates and PKI operations are
redundant and superfluous
https://www.garlic.com/~lynn/subpubkey.html#certless
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Thu, 22 Mar 2007 16:27:55 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
another reference:
http://www.quadibloc.com/comp/cp0304.htm
from above:
Later, a plug-compatible computer industry arose in the United States,
leading to such computers as the Amdahl 470/V6, the Itel AS/5, and the
Magnuson M80.
Gene Amdahl was, of course, the designer of the IBM 360 architecture;
he left IBM out of frustration with the company not pursuing an
opportunity to make larger systems in that line. Itel was a company
that purchased 360 mainframes and then leased them to others which
then went on to include memory made for it by National Semiconductor
for them. Fujitsu was a partner of Amdahl, and continues to make
plug-compatible machines; first National Semiconductor, and then
Hitachi, which had been the actual maker of the CPUs, acquired Itel's
plug-compatible business.
Also, there was the Two-Pi computer, a computer made with bit-slice
technology that was an attempt to offer mainframe power in the size of
a minicomputer.
Incidentally, Magnuson Computers was founded by Carl Amdahl, the son
of Gene Amdahl, and his partner in Trilogy Computers. As I recall,
this was all amicable; Amdahl computers made the larger computers, and
Magnuson the smaller ones.
... snip ...
I ran into magnuson, 4341-clone (where-as Amdahl was in the high-end,
3033/3090 processor ranges, with magnuson in the 4341/vax mid-range)
at cray research doing testing and performance tuning of rfc1044
support between 370 and a Cray ... misc. past post mentioning having
done rfc1044 support for mainframe tcp/ip
https://www.garlic.com/~lynn/subnetwork.html#1044
i've mentioned that Amdahl gave a talk at MIT in the very early 70s
about starting his clone business ... recent post w/reference
https://www.garlic.com/~lynn/2007f.html#26 The Perfect Computer - 36 bits?
one of the other questions from the audience was essentially something about selling out to the "enemy", not only did they own half the company ... but also would do all the manufacturing ... somebody from the audience guessing that effectively made the Amdahl corp. something like a 80-90 percent "foreign".
as mentioned before, a lot of the plug compatible processor business
was able to gain a foothold while corporate attention was diverted to
FS project
https://www.garlic.com/~lynn/submain.html#futuresys
... and the FS project ... was motivated by the plug compatible
controller/device business.
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#45 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#46 The Perfect Computer - 36 bits?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What happened to the Teletype Corporation? Newsgroups: alt.folklore.computers Date: Fri, 23 Mar 2007 09:09:33 -0600krw <krw@att.bizzzz> writes:
i once ordered an fe toolkit ... it took 3-4 months just to figure out how to get the order accepted (apparently nobody out of FE org had ever ordered one before). it still came with some number of pieces for dealing with springs and other mechanical pieces related to typewriters. i've even had opportunity to use one of two of the tools from time-to-time.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The interactive experience on yesterday's Unix? Newsgroups: alt.folklore.computers Date: Fri, 23 Mar 2007 09:12:19 -0600Jorgen Grahn <grahn+nntp@snipabacken.dyndns.org> writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: John W. Backus, 82, Fortran developer, dies Newsgroups: alt.folklore.computers Date: Fri, 23 Mar 2007 10:15:15 -0600hancock4 writes:
recent thread mentioning differences between CICS and IMS
https://www.garlic.com/~lynn/2007e.html#37 Quote from comp.object
IMS being a database manager with separation between the IMS database manager and the IMS application. CICS was a transaction manager ... where the CICS applications ran as part of CICS. CICS applications could clobber storage in CICS and/or other CICS applications.
One of the IMS references makes note that it had also been developed at a customer site ... in this case to manage the logistics, inventory, project information, etc ... for moon project.
misc. past posts mentioning CICS (and/or BDAM)
https://www.garlic.com/~lynn/submain.html#bdam
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: History - Early Green Card Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 23 Mar 2007 13:03:32 -0600Thompson, Steve wrote:
the website (referenced elsewhere)
http://www.planetmvs.com/greencard/
shows 360 x20-1703-1 card as yellow
there was also a gcard ios3270 created ... which i've done a crude
effort of converting to html
https://www.garlic.com/~lynn/gcard.html
the 360/67 blue card has stuff for 24-bit and 32-bit virtual addressing, control registers, virtual memory instructions/operations, channel controller, and multiprocessor operation. the channel controller was available as part of 360/67 multiprocessors and supported configuration switches to operate as multiprocessor or partitioned into individual uniprocessors ... with different physical channels and memory banks either dedicated to specific uniprocessor operation or available to all processors (i.e. all processors in multiprocessor configuration could address all channels and all memory banks). some of the control registers were used to read-out the (manual) switch settings on the channel director.
one of my surviving "blue cards" that I got at the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
is stamped with M's full-name ... i.e. GML (precursor to sgml, html,
xml, etc) was invented at the science center in '69 and the letters
are taken from "G", "M", and "L" last names (with morphing to come up
with the more familiar "markup language" label).
https://www.garlic.com/~lynn/submain.html#sgml
misc. past posts mentioning blue card:
https://www.garlic.com/~lynn/98.html#14 S/360 operating systems geneaology
https://www.garlic.com/~lynn/99.html#11 Old Computers
https://www.garlic.com/~lynn/2000g.html#16 360/370 instruction cycle time
https://www.garlic.com/~lynn/2001.html#69 what is interrupt mask register?
https://www.garlic.com/~lynn/2001.html#71 what is interrupt mask register?
https://www.garlic.com/~lynn/2001c.html#15 OS/360 (was LINUS for S/390)
https://www.garlic.com/~lynn/2001d.html#42 IBM was/is: Imitation...
https://www.garlic.com/~lynn/2005o.html#38 SHARE reflections
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM System z9 Newsgroups: comp.arch Date: Sat, 24 Mar 2007 10:08:04 -0600Andrew Reilly <andrew-newspost@areilly.bpc-users.org> writes:
part of the interesting thing from the original markup language tagging was some of the change over from original use for formating to long-lived encoding.
as i've mentioned before, "G", "M", and "L" had invented it at
the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
in 1969. recent reference
https://www.garlic.com/~lynn/2007f.html#32 A database theory resource - ideas
GML tag support was added to the CMS document formater (originally written with support for runoff "dot" commands). however, there were a couple of somewhat related activities going on in the science center about having long-lived self-describing data. one of the efforts had been collecting computer system & user activity data (every five minutes) since the nearly the beginning of cp67 (virtual machine) operation .. which was all squirreled away on tapes. How do you handle a decade or more of such data ... being able to compare how things changed with changing load, configurations, features (even the transition from cp67 to vm370). Back then, serious consideration/argument was compactness of storage format as much as any efficiency in processing.
misc. past posts, GML evolving into SGML, HTML, XML, etc
https://www.garlic.com/~lynn/submain.html#sgml
this also wanders somewhat into discussion of processing efficiency and who's efficiency are you optimising for. as transition from optimizing for computer performance to optimising for human performance ... trade-off was the humans time started to become more and more of a factor ... computers & hardware becoming more and more of a commodity item.
i've related in the past somewhat the argument between the IMS database group and the system/r relational group in the late 70s. IMS has direct record pointers as part of the data that applications directly deal with. Structural changes in the data can require a lot of manual maintenance of these pointers. system/r had abstracted away these record pointers ... eliminating them having to be directly dealt with. They were replaced with internal indexes. The IMS group pointed out that the relational internal indexes typically doubled the physical disk storage (vis-a-vis similar application in IMS) and significantly increased the number of disk I/Os (all the i/o operations to process index records).
Going into the early and mid-80s ... disk capacities significantly increased and disk price/bit significantly decreased changing the optimization trade-offs. Also systems significantly increased the amount of real storage ... now allowing a great deal of indexes to be cached, mitigating the explicit i/os required on every access for data. And overall the cost/bottleneck related to humans increased and the cost/bottleneck related to the hardware decreased ... changing the optimizing trade-offs.
a few recent posts mentioning IMS and/or System/R
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007e.html#31 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#36 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#37 Quote from comp.object
lots of past posts mentioning system/r, relational, sql, etc
https://www.garlic.com/~lynn/submain.html#systemr
now the other "argument" about encoding compactness has become transmission (as opposed to storage) ... with the evolving internet ... number of unique transmissions and latency is frequently more of an issue than raw bits.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 24 Mar 2007 10:39:08 -0600Morten Reistad <first@last.name> writes:
unbundling announcement on 23jun69 started transition to charging for
software ... but you could still get source
https://www.garlic.com/~lynn/submain.html#unbundle
it was largely motivated by various litigation. however, they did draw a line and applied it (at the time) only to application software; maintaining that kernel software was still "free" (and available in source).
later, when i was getting ready to release the (vm370) resource manager (as a separate kernel feature) ... it was decided to make it a guinea pig for starting to charge for kernel software. I was given the privilege of attending all sort of business and planning meetings about establishing policies for charging for kernel software.
part of the change to charging for kernel software was motivated by
the appearance of clone processors. some recent posts mentioning clone
processors
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
https://www.garlic.com/~lynn/2007f.html#26 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007f.html#57 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#61 Is computer history taught now?
thread from vmshare archive about customer business issues around OCO
http://vm.marist.edu/~vmshare/browse.cgi?fn=OCOBUS&ft=MEMO
8FEB93 thread about it being ten yrs since IBM announced
the object code only policy (for a little context regarding
some of the statements in this thread, IBM was in the "red"
the previous year)
http://vm.marist.edu/~vmshare/browse.cgi?fn=OCO:BDAY&ft=MEMO
misc. past posts mentioning OCO (wars/transition) that went on
in the early to mid 80s
https://www.garlic.com/~lynn/94.html#11 REXX
https://www.garlic.com/~lynn/2000b.html#32 20th March 2000
https://www.garlic.com/~lynn/2001e.html#6 Blame it all on Microsoft
https://www.garlic.com/~lynn/2001n.html#11 OCO
https://www.garlic.com/~lynn/2002c.html#4 Did Intel Bite Off More Than It Can Chew?
https://www.garlic.com/~lynn/2002p.html#2 IBM OS source code
https://www.garlic.com/~lynn/2002p.html#3 IBM OS source code
https://www.garlic.com/~lynn/2002p.html#7 myths about Multics
https://www.garlic.com/~lynn/2003k.html#46 Slashdot: O'Reilly On The Importance Of The Mainframe Heritage
https://www.garlic.com/~lynn/2003k.html#50 Slashdot: O'Reilly On The Importance Of The Mainframe Heritage
https://www.garlic.com/~lynn/2004d.html#19 REXX still going strong after 25 years
https://www.garlic.com/~lynn/2004e.html#10 What is the truth ?
https://www.garlic.com/~lynn/2004m.html#47 IBM Open Sources Object Rexx
https://www.garlic.com/~lynn/2004m.html#53 4GHz is the glass ceiling?
https://www.garlic.com/~lynn/2004p.html#5 History of C
https://www.garlic.com/~lynn/2004p.html#13 Mainframe Virus ????
https://www.garlic.com/~lynn/2004p.html#21 need a firewall
https://www.garlic.com/~lynn/2005c.html#42 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005c.html#50 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005e.html#34 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005e.html#35 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005f.html#15 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2005j.html#29 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005j.html#41 TSO replacement?
https://www.garlic.com/~lynn/2005r.html#5 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2006b.html#8 Free to good home: IBM RT UNIX
https://www.garlic.com/~lynn/2006f.html#38 Over my head in a JES exit
https://www.garlic.com/~lynn/2006j.html#29 How to implement Lpars within Linux
https://www.garlic.com/~lynn/2006j.html#33 How to implement Lpars within Linux
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Sat, 24 Mar 2007 11:43:32 -0600re:
other past posts in the thread mentioning TJX data breach
https://www.garlic.com/~lynn/2007b.html#62 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#10 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#18 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#27 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#37 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#53 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#5 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007e.html#2 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What happened to the Teletype Corporation? Newsgroups: alt.folklore.computers Date: Sat, 24 Mar 2007 11:59:19 -0600haynes@alumni.uark.edu (Jim Haynes) writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 09:56:09 -0600jmfbahciv writes:
of course there was MIP Envy ...
https://www.garlic.com/~lynn/2007d.html#email800920
in this post
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is missing
in above ... if you have 3270 on every desk ... then you could have everybody logging on at the same time ... also mentioned in the above ... where the number of simultaneous users are controllered ... and "fixing" the problem with "group fairshare" resource management.
more recently ... in the early days of small client/server
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
they had problem with lots of free downloads of their client ... and
needing to max. the number of concurrent connects. This was before the
era of front-end load balancing ... so they eventually had a dozen or
so servers ... and people got to (manually) try different servers
looking for one that would let them connect.
https://www.garlic.com/~lynn/2002i.html#39 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002j.html#45 M$ SMP and old time IBM's LCMP
https://www.garlic.com/~lynn/2004m.html#46 Shipwrecks
and for a little other drift from above, re: cluster scale-up and LCMP
https://www.garlic.com/~lynn/lhwemail.html#medusa
there were still "terminal rooms" for the GE/CALMAs being used
for chip design ... couple posts
https://www.garlic.com/~lynn/2002g.html#55 Multics hardware (was Re: "Soul of a New Machine" Computer?)
https://www.garlic.com/~lynn/2005r.html#24 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005u.html#6 Fast action games on System/360+?
https://www.garlic.com/~lynn/2006e.html#9 terminals was: Caller ID "spoofing"
https://www.garlic.com/~lynn/2006n.html#41 Tek 4010, info and prices
https://www.garlic.com/~lynn/2006q.html#16 what's the difference between LF(Line Fee) and NL (New line) ?
although the 3277GA (tektronix tubes) hooked into the side of 3277 terminals started to help.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The interactive experience on yesterday's Unix? Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 10:28:51 -0600jmfbahciv writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 10:25:52 -0600jmfbahciv writes:
fraud like that has been around for a long time ... just wasn't getting into the press (frequently being viewed as purely one-at-a-time and/or local activity).
part of the change-over was when California passed the breach notification law; i.e. rather than the fraud happening purely at random ... a lot of it had frequently been the result of some kind of earlier breach (skimming, harvesting, etc) . Once the breach notification law was out there ... it started to impinge on consumer awareness ... which then made it subject for general press.
then a lot of other states got into the act, passing their own breach notification laws. for the past couple yrs, there has been something of a battle going on in fed. congress about a federal pre-emption breach notification law (i.e. pre-empts state legislation) ... between backers of bill that is at least equivalent to what is out in the states ... and something more analogous to "CAN-SPAM".
some of the Cal. breach notification law was in conjunction with the
notification law about use of personal information and opt-in/opt-out.
We got somewhat peripherally involved with the notification laws
when we were brought in to help word-smith the cal. state electronic
signature legislation (and later the fed. electronic signature
legislation)
https://www.garlic.com/~lynn/subpubkey.html#signature
and when we co-authored the financial industry privacy standard,
X9.99; having to look at various privacy legislation including various
personal information use notification requirements, GLBA, HIPAA,
EU-DPD, etc. indirect reference here when doing merged privacy
taxonomy and glossary (in support of x9.99 work)
https://www.garlic.com/~lynn/index.html#glosnote
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Is computer history taught now? Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 10:08:56 -0600krw <krw@att.bizzzz> writes:
there was publicity about YVE ... but I'm not aware of any actually being built. And then came EVE ... which violated all sort of installation specifications for single box, dimensions, fitting in freight elevators, lbs/ft-sq floor loading, etc. ... really dense packaging.
they had EVE in bldg. 86 (off plant site leased bldg., while they were doing seismic retro-fit to bldg. 14).
One of the unique things about LSM was that included timing ... the subsequent machines assumed synchronized clock; LSM could handle async clock designs as well as digital chips with analog circuits (things like disk floating heads).
Use of LSM/EVE were credited with help bringing in the RIOS chip set
(power, rs/6000) a year early. And of course the massive files between
Austin and Los Gatos were carried by HSDT backbone
https://www.garlic.com/~lynn/subnetwork.html#hsdt
misc. past posts mentioning LSM, YSE, EVE, etc
https://www.garlic.com/~lynn/2002d.html#3 Chip Emulators - was How does a chip get designed?
https://www.garlic.com/~lynn/2002g.html#55 Multics hardware (was Re: "Soul of a New Machine" Computer?)
https://www.garlic.com/~lynn/2002g.html#77 Pipelining in the past
https://www.garlic.com/~lynn/2002g.html#82 Future architecture
https://www.garlic.com/~lynn/2002j.html#26 LSM, YSE, & EVE
https://www.garlic.com/~lynn/2002l.html#44 Thirty Years Later: Lessons from the Multics Security Evaluation
https://www.garlic.com/~lynn/2003.html#31 asynchronous CPUs
https://www.garlic.com/~lynn/2003k.html#3 Ping: Anne & Lynn Wheeler
https://www.garlic.com/~lynn/2003k.html#14 Ping: Anne & Lynn Wheeler
https://www.garlic.com/~lynn/2003o.html#38 When nerds were nerds
https://www.garlic.com/~lynn/2004j.html#16 US fiscal policy (Was: Bob Bemer, Computer Pioneer,Father of ASCII,Invento
https://www.garlic.com/~lynn/2004o.html#25 CKD Disks?
https://www.garlic.com/~lynn/2004o.html#65 360 longevity, was RISCs too close to hardware?
https://www.garlic.com/~lynn/2005c.html#6 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005d.html#33 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2006q.html#42 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006r.html#11 Was FORTRAN buggy?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The interactive experience on yesterday's Unix? Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 11:20:11 -0600jmfbahciv writes:
univ. that i was at, the departments and classes had projections and funny money charges, but the money actually came from other departmental budgets ... and for a state univ ... those departments were getting their (real) money from the legislature. the datacenter was dependent on money transfers from administration and educational departments ... which happened pretty independent of what the use-charges racked up to.
then the univ. got a new datacenter head ... who went to the state legislature and got the univ. datacenter reorged into its own business unit. It got direct budget from the legislature (for educational needs) and could also "sell" time commercially.
It must have been a fad back then ... theoretically turning an
"expense" operation (the institution's datacenter) into a "profit"
center ... being able to "sell" to the original institution as well as
anybody else they could find (at least the change-over was the books
were managed much more like a profit center than an expense
operation). Not long after the university datacenter was turned into
independent business ... Boeing did something similar creating BCS
... some recent post mentioning BCS
https://www.garlic.com/~lynn/2007f.html#44 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#54 John W. Backus, 82, Fortran developer, dies
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 13:21:21 -0600re:
after having worked on this stuff that has since come to become electronic
commerce
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
we got involved in the x9a10 financial standard working group. As I've
mentioned before, in the mid-90s, the x9a10 financial standard working
group was given the requirement to preserve the integrity of the financial
infrastructure for ALL retail payments (ALL as in ALL, not just internet,
not just POS, or many other kinds ... ALL).
https://www.garlic.com/~lynn/x959.html#x959
one of the things we observed was increasing/growing frequency of
fraud stemming from various kinds of harvesting events
https://www.garlic.com/~lynn/subintegrity.html#harvest
so part of the issue is that the value of the information to the
crooks can be several orders of magnitude larger than the value of the
information to merchants ... allowing attackers to outspend the
defenders by 100:1 or more. old post alluding to the issue
https://www.garlic.com/~lynn/2001h.html#61
another part of the issue is the dynametrically opposing requirements for transaction information. On one side, the information is required for numerous (many of them backroom) business processes ... and therefor must be readily available. On the other hand, leakage of any information (insiders, outsiders, employees, attackers, etc) enables fraudulent transactions ... so transaction information has to be kept completely confidential and never divulged. this has led to my periodic observation that even if the planet was buried under miles of information-hiding encryption ... it still couldn't stop the leakage.
so there were activities by other organizations going on in the mid-90s, concurrent with the x9.59 standard work. some of it involved internet specific integrity work ... and other involved chip-specific point-of-sale integrity work.
at least some of the internet specific integrity work concentrated on
using crypto to hide transaction information ... however, it didn't
actually provide any significant additional countermeasures to other
major vulnerabilities and risks ... than what was already being
provided by the deployed stuff that came to be called electronic
commerce
https://www.garlic.com/~lynn/subpubkey.html#sslcert
while not providing any significant additional countermeasures, it
DID drastically increase processing overhead and payload
bloat by two orders of magnitude (for little or no additional
benefit)
https://www.garlic.com/~lynn/subpubkey.html#bloat
the POS oriented effort appeared to be extremely chip-centric
... almost as if the chip issues were somehow perfected, that all the
rest of the end-to-end integrity issues would just disappear.
this resulted in actually exacerbating some of the other integrity
issues (and some have claimed, actually resulted in making the
overall infrastructure more vulnerable) ... a few past threads
discussing some of these issues
https://www.garlic.com/~lynn/subintegrity.html#yescard
in any case, one of the issues for x9.59 ... wasn't to do anything directly about preventing the breaches and harvesting exploits resulting in fraud ... but to provide "end-to-end" armoring for transactions, eliminating the crooks from being able to use any of the harvested transaction information for performing fraudulent financial transactions (i.e. form of countermeasures to replay attacks)
The breaches are currently significant because the crooks can make use of the information for performing fraudulent financial transactions. x9a10 financial standard working group recognized that it would essentially be impossible to prevent all access to the transaction information ... in part, because it was required for so many fundamental business processes; instead x9.59 eliminates the value of the transaction information to the crooks (i.e. their ability to use the information for fraudulent financial transactions).
I've used the "naked transactions" metaphor somewhat to highlight the
differences between the x9.59 solution and other mechanisms. misc.
past posts mentioning naked (payment) transactions (i.e. rather than
preventing all access to the information, armor the information so
that simple access doesn't result in fraud)
https://www.garlic.com/~lynn/aadsm24.htm#5 New ISO standard aims to ensure the security of financial transactions on the Internet
https://www.garlic.com/~lynn/aadsm24.htm#6 Securely handling credit card transactions earns Blackboard kudos
https://www.garlic.com/~lynn/aadsm24.htm#7 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#8 Microsoft - will they bungle the security game?
https://www.garlic.com/~lynn/aadsm24.htm#9 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#10 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#12 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#14 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#22 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#26 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#27 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#30 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#31 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#38 Interesting bit of a quote
https://www.garlic.com/~lynn/aadsm24.htm#41 Naked Payments IV - let's all go naked
https://www.garlic.com/~lynn/aadsm24.htm#42 Naked Payments II - uncovering alternates, merchants v. issuers, Brits bungle the risk, and just what are MBAs good for?
https://www.garlic.com/~lynn/aadsm24.htm#46 More Brittle Security -- Agriculture
https://www.garlic.com/~lynn/aadsm25.htm#20 Identity v. anonymity -- that is not the question
https://www.garlic.com/~lynn/aadsm25.htm#25 RSA SecurID SID800 Token vulnerable by design
https://www.garlic.com/~lynn/aadsm25.htm#28 WESII - Programme - Economics of Securing the Information Infrastructure
https://www.garlic.com/~lynn/aadsm26.htm#6 Citibank e-mail looks phishy
https://www.garlic.com/~lynn/aadsm26.htm#13 Who has a Core Competency in Security?
https://www.garlic.com/~lynn/2006m.html#15 OpenSSL Hacks
https://www.garlic.com/~lynn/2006m.html#24 OT - J B Hunt
https://www.garlic.com/~lynn/2006o.html#35 the personal data theft pandemic continues
https://www.garlic.com/~lynn/2006o.html#37 the personal data theft pandemic continues
https://www.garlic.com/~lynn/2006o.html#40 the personal data theft pandemic continues
https://www.garlic.com/~lynn/2006t.html#40 Encryption and authentication
https://www.garlic.com/~lynn/2006u.html#43 New attacks on the financial PIN processing
https://www.garlic.com/~lynn/2006y.html#8 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2006y.html#25 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007b.html#60 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007e.html#26 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Working while young Newsgroups: alt.folklore.computers Date: Sun, 25 Mar 2007 13:48:34 -0600Peter Flass <Peter_Flass@Yahoo.com> writes:
one of the things that did stick in my mind ... was that there were problems with people coming along and hijacking your flat back at the start of the row (when you weren't looking). I remember our group eventually hired one of the older kids to stand watch over the flats (and raise alarm).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: John W. Backus, 82, Fortran developer, dies Newsgroups: alt.folklore.computers Date: Mon, 26 Mar 2007 11:30:29 -0600hancock4 writes:
the assembler vis-a-vis higher level language has an cost-efficiency aspect ... but it also has a long term usefullness issue.
especially in the 50s & 60s ... a lot of businesses that were automating were also experiencing significant growth. the cost of rewriting an application to move to a new, larger machine could totally dominate all other costs.
the two big issues were compatible machines ... since that eased the migration/growth of machine dependent applications. the other was portable implementations (done in higher level languages that could move more easily from machine to machine).
i've posted before on some of the issues of the compatible machine requirements.
one was a few posts that mention the gov. litigation and testimony from
one of the seven dwarfs. supposedly the testimony was that ALL
computer vendors recognized by the late 50s that the single, most
important requirement was to have a completely compatible architecture
across the whole product line (easing customer migration to newer and
larger machines as their business grew). the claim was that only IBM
was able to successfully pull it off. other vendors tried ... but
corporate hdqtrs were frequently unsuccessful (for what ever reason) in
forcing individual plant and product managers to toe the line. ibm
corporate hdqtrs were successful in forcing the individual product
lines to maintain compatibility. Being the only vendor that was
"successful" at the single most important requirement met that it could
dominate all the other vendors (even if that was the only thing they
were able to do better).
https://www.garlic.com/~lynn/94.html#44 bloat
https://www.garlic.com/~lynn/96.html#20 1401 series emulation still running?
https://www.garlic.com/~lynn/99.html#231 Why couldn't others compete against IBM?
https://www.garlic.com/~lynn/2001j.html#33 Big black helicopters
https://www.garlic.com/~lynn/2002c.html#0 Did Intel Bite Off More Than It Can Chew?
https://www.garlic.com/~lynn/2003b.html#5 Card Columns
https://www.garlic.com/~lynn/2003.html#71 Card Columns
https://www.garlic.com/~lynn/2003b.html#5 Card Columns
https://www.garlic.com/~lynn/2003o.html#43 Computer folklore - forecasting Sputnik's orbit with
the other series of posts mentions Amdahl's talk at MIT in the early 70s and what justifications did he use to get investment/VC backing for the company; i.e. that there was already several hundred billion dollars invested in customer 360 softare applications ... and even if IBM were to totally walk away from 360 (possibly veiled reference to future system project) ... that application software base would keep clone-computers in business until the end of the century.
misc. other posts mentioning future system project
https://www.garlic.com/~lynn/submain.html#futuresys
misc. past posts mentioning Amdahl's talk at MIT
https://www.garlic.com/~lynn/2001j.html#23 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2002j.html#20 MVS on Power (was Re: McKinley Cometh...)
https://www.garlic.com/~lynn/2003.html#36 mainframe
https://www.garlic.com/~lynn/2003e.html#13 unix
https://www.garlic.com/~lynn/2003e.html#15 unix
https://www.garlic.com/~lynn/2003h.html#32 IBM system 370
https://www.garlic.com/~lynn/2003i.html#3 A Dark Day
https://www.garlic.com/~lynn/2003p.html#30 Not A Survey Question
https://www.garlic.com/~lynn/2004d.html#22 System/360 40th Anniversary
https://www.garlic.com/~lynn/2004h.html#20 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2004l.html#51 Specifying all biz rules in relational data
https://www.garlic.com/~lynn/2004m.html#53 4GHz is the glass ceiling?
https://www.garlic.com/~lynn/2004o.html#66 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005b.html#47 The mid-seventies SHARE survey
https://www.garlic.com/~lynn/2005e.html#35 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005r.html#49 MVCIN instruction
https://www.garlic.com/~lynn/2006.html#7 EREP , sense ... manual
https://www.garlic.com/~lynn/2006c.html#18 Change in computers as a hobbiest
https://www.garlic.com/~lynn/2007f.html#61 Is computer history taught now?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What happened to the Teletype Corporation? Newsgroups: alt.folklore.computers Date: Mon, 26 Mar 2007 14:23:17 -0600hancock4 writes:
recent post mentioning green cards
https://www.garlic.com/~lynn/2007f.html#65 History - Early Green Card
and a crude converstion of old gcard ios3270 file to html
(although doesn't include any punch hole mappings)
https://www.garlic.com/~lynn/gcard.html
ebcdic to hex table
https://www.garlic.com/~lynn/gcard.html#1.3
ascii to hex table
https://www.garlic.com/~lynn/gcard.html#1.4
front & back scan of a "real" yellow "green card"
http://www.planetmvs.com/greencard/x20-1703-3.jpg
This has a table of EBCDIC to both hex and card punch holes
http://www.cs.uiowa.edu/~jones/cards/codes.html
upper-case A-I : 12-(1-9) punch holes
lower-case A-I : 12-10-(1-9) punch holes
upper-case J-R : 11-(1-9) punch holes
lower-case J-R : 12-11-(1-9) punch holes
upper-case S-Z : 10-(2-9) punch holes
lower-case S-Z : 11-10-(2-9) punch holes
i.e.
turn upper case A-I to lower-case by multi-punch "10" hole
turn upper case J-R to lower-case by multi-punch "12" hole
turn upper case S-Z to lower-case by multi-punch "11" hole
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 27 Mar 2007 07:50:38 -0600nmm1@cus.cam.ac.uk (Nick Maclaren) writes:
lots of past posts mentioning having done telecommunication clone with
interdata/3 in the 60s ... and getting blameed for some part of the
clone controller business
https://www.garlic.com/~lynn/submain.html#360pcm
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 27 Mar 2007 12:12:43 -0600re:
while '60s era 2702 & 2703 got supplanted by 3705s (and various clones) ... the '60s era 2701 (with support for T1) held on well into the 80s. Initially for gov. market, they did do Zirpel card for Series/1 to handle T1 in the mid-80s (since the 2701 T1s were getting quite long in the tooth). There was quite a large number of Series/1 deployed for numerous communication tasks ... and quite a few applications were starting to bump up against Series/1 16bit address infrastructure.
the clones, 3705, base Series/1 were handling up to 56kbit lines relatively straight forward ... but there wasn't a lot of support for T1 and higher speeds.
For HSDT (high-speed data transport) project starting in the early-80s
were using HYPERchannel for T1 (and higher speeds) ... but then got
into some of custom built stuff
https://www.garlic.com/~lynn/subnetwork.html#hsdt
for high-speed internal network backbone ... misc. past posts on
internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet
one of the drivers starting to look at doing some custom made stuff
was encryption ... all lines that left corporate premises required
encryption ... and there wasn't a whole lot of choice at T1 and above
... price, features, etc. recent post mentioning slightly orthogonal
https://www.garlic.com/~lynn/2007f.html#73 Is computer history taught now?
i guess we also somewhat corrupted the stuff leading up to NSFNET RFP
... misc. old email from the period on the subject
https://www.garlic.com/~lynn/lhwemail.html#nsfnet
then we got prevented from bidding for NSFNET backbone (even tho NSF audit of what we had running said it was at least five yrs ahead of all bid submissions). although the backbone RFP called for "T1" ... the winning bid actually implemented 440kbit links ... with telco multiplexor mapping multiple links into T1 trunks .... which i suppose was what satisified the letter of the RFP (however, if you were to use trunks as criteria ... you could probably have found that even a lot of 56kbit links somewhere in the end-to-end process passed thru a T5 or possibly even higher speed trunk).
for other drift ... one of the baby bells had implemented peer-to-peer
networking using Series/1 (somewhat like IMPs from the arpanet era)
... but they also had done a (SNA) PU4/NCP emulation (as well as
SSCP/PU5 emulation ... telling the mainframe SSCP that the devices
were cross-domain "owned" by some other processor) ... carrying RUs
thru real peer-to-peer infrastructure. I tried to get it out as a
product with a port to RIOS (801/risc chips used in rs/6000) to
alleviate the 16bit limitations of the Series/1 ... some old posts
https://www.garlic.com/~lynn/99.html#66 System/1 ?
https://www.garlic.com/~lynn/99.html#67 System/1 ?
https://www.garlic.com/~lynn/99.html#70 Series/1 as NCP (was: System/1 ?)
