From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: System/360 Prototype Newsgroups: alt.folklore.computers Date: Thu, 27 Jul 2006 13:21:26 -0600hancock4 writes:
a lot of executive compensation plans have been based on profit (as a measure of how well the company does) as opposed to gross sales (which may or may indicate how well a company is doing). for instance, in 1992, ibm reported a couple billion dollar loss on several tens of billions in sales.
ibm, in the time-frame mentioned as obtaining ibm's 10k
https://www.garlic.com/~lynn/2006n.html#59 System/360 Prototype
had moved salesmen to quota system ... not straight sales commission ... i.e. salesmen were given sales target and base (maybe 20-40percent) of target compensation. If they sold one hundred percent of their quota ... they got reminder of their pay. if they were on 20percent base, and made twice their quota ... then they got .2 + 2*.8 = 1.8 times their target compensation. Note it also wasn't unusual if somebody were to make 100percent of their annual quota by mid-year ... to have they quota retro-actively adjusted for the year.
this prevented salesman, that might sell a couple hundred million dollars of computer equipment, from getting several million dollar commission (which could happen if there was a straight sales commission plan; which apparently what Watson was getting; but the salesmen were on this quota plan).
As to general corporate activity in the last 50 years ... some number of companies modeled their sales operations after ibm, quotas, sales promotions, annual award meetings, etc. IBM had an annual event called the 100percent club ... for salesmen that made at least one hundred percent of their quota. I know of one company in the early 80s with 200 hundred salesmen that didn't have a single sales and lost a billion dollars. that year they sent all the salesmen and their SOs on one week trip to Hawaii ... and had to come up with alternative name for the event (as opposed to the "zero percent club" award meeting).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: harris Newsgroups: alt.folklore.computers Date: Thu, 27 Jul 2006 13:32:13 -0600"Tim Shoppa" writes:
the above reposts a '88 supercomputing report that lists 850 minisupercomputers having been installed since 1981 (it also mentions that there were rumors about a Harris minisuper). It also lists installs for Alliant, Convex, ELXSI, FPS, Gould, Multiflow, and Scientific Computer (and that Celerity was just shipping and Supertek hadn't shipped yet).
posting repeating above numbers
https://www.garlic.com/~lynn/2001d.html#32 Imitation..
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: the more things change, the more things stay the same Newsgroups: alt.folklore.computers,bit.listserv.vmesa-l Date: Thu, 27 Jul 2006 14:32:06 -0600re:
the following article:
How Secure Is That Device? As device software joins the larger world,
security becomes ever more vital
http://dso.com/news/showArticle.jhtml?articleID=191501076
Has statements that are almost exact quotes of some statements about virtualization made in the late 60s, nearly 40 years ago.
the article is also related to the thread raised in this crypto topic drift
https://www.garlic.com/~lynn/2006n.html#57 The very first text editor
started with this article
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=190900759
the most recent in that thread
https://www.garlic.com/~lynn/aadsm24.htm#52 Crypt to defend chip IP: snake oil or good idea?
and even more thread drift related to the subject
https://www.garlic.com/~lynn/aadsm24.htm#53
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: MTS, Emacs, and... WYLBUR? Newsgroups: alt.folklore.computers Date: Thu, 27 Jul 2006 16:46:46 -0600scott@slp53.sl.home (Scott Lurndal) writes:
and played with the cms editor to get it to do "full-screen" displays on 2250m1 ....
but I also supported the university os360 mft/hasp (and transition to os360 mvt/hasp) system. hasp managed "job" submission and files ... for cards and printed out.
i hacked hasp on mvt release18 .... putting in 2741 and tty terminal support along with writing an "editor" from scratch that supported cms editor command syntax .... for a "CRJE" system (i.e. conversational remote job entry).
misc. past posts mentioning crje:
https://www.garlic.com/~lynn/93.html#15 unit record & other controllers
https://www.garlic.com/~lynn/96.html#12 IBM song
https://www.garlic.com/~lynn/97.html#22 Pre S/360 IBM Operating Systems?
https://www.garlic.com/~lynn/98.html#29 Drive letters
https://www.garlic.com/~lynn/99.html#76 Mainframes at Universities
https://www.garlic.com/~lynn/99.html#77 Are mainframes relevant ??
https://www.garlic.com/~lynn/99.html#92 MVS vs HASP vs JES (was 2821)
https://www.garlic.com/~lynn/99.html#109 OS/360 names and error codes (was: Humorous and/or Interesting Opcodes)
https://www.garlic.com/~lynn/2000f.html#58 360 Architecture, Multics, ... was (Re: X86 ultimate CISC? No.)
https://www.garlic.com/~lynn/2000f.html#71 HASP vs. "Straight OS," not vs. ASP
https://www.garlic.com/~lynn/2001i.html#30 IBM OS Timeline?
https://www.garlic.com/~lynn/2001n.html#37 Hercules etc. IBM not just missing a great opportunity...
https://www.garlic.com/~lynn/2002f.html#37 Playing Cards was Re: looking for information on the IBM 7090
https://www.garlic.com/~lynn/2002f.html#38 Playing Cards was Re: looking for information on the IBM
https://www.garlic.com/~lynn/2002h.html#14 Why did OSI fail compared with TCP-IP?
https://www.garlic.com/~lynn/2002m.html#3 The problem with installable operating systems
https://www.garlic.com/~lynn/2002n.html#54 SHARE MVT Project anniversary
https://www.garlic.com/~lynn/2003g.html#64 UT200 (CDC RJE) Software for TOPS-10?
https://www.garlic.com/~lynn/2003k.html#13 What is timesharing, anyway?
https://www.garlic.com/~lynn/2003m.html#53 model 91/CRJE and IKJLEW
https://www.garlic.com/~lynn/2003m.html#56 model 91/CRJE and IKJLEW
https://www.garlic.com/~lynn/2003o.html#64 1teraflops cell processor possible?
https://www.garlic.com/~lynn/2004b.html#53 origin of the UNIX dd command
https://www.garlic.com/~lynn/2004c.html#10 XDS Sigma vs IBM 370 was Re: I/O Selectric on eBay: How to use?
https://www.garlic.com/~lynn/2004c.html#27 Moribund TSO/E
https://www.garlic.com/~lynn/2004c.html#28 Moribund TSO/E
https://www.garlic.com/~lynn/2004c.html#32 Moribund TSO/E
https://www.garlic.com/~lynn/2004g.html#11 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#39 spool
https://www.garlic.com/~lynn/2004j.html#17 Wars against bad things
https://www.garlic.com/~lynn/2004l.html#20 Is the solution FBA was Re: FW: Looking for Disk Calc
https://www.garlic.com/~lynn/2004l.html#29 FW: Looking for Disk Calc program/Exec
https://www.garlic.com/~lynn/2004n.html#0 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004n.html#3 Shipwrecks
https://www.garlic.com/~lynn/2004n.html#4 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004n.html#13 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004n.html#52 CKD Disks?
https://www.garlic.com/~lynn/2005n.html#45 Anyone know whether VM/370 EDGAR is still available anywhere?
https://www.garlic.com/~lynn/2005p.html#34 What is CRJE
https://www.garlic.com/~lynn/2005p.html#37 CRJE and CRBE
https://www.garlic.com/~lynn/2005p.html#45 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2005q.html#2 Article in Information week: Mainframe Programmers Wanted
https://www.garlic.com/~lynn/2005s.html#26 IEH/IEB/... names?
https://www.garlic.com/~lynn/2005u.html#21 3390-81
https://www.garlic.com/~lynn/2006f.html#3 using 3390 mod-9s
https://www.garlic.com/~lynn/2006f.html#20 Old PCs--environmental hazard
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: How Many 360/195s and 370/195s were shipped? Newsgroups: alt.folklore.computers Date: Thu, 27 Jul 2006 18:08:23 -0600eugene@cse.ucsc.edu (Eugene Miya) writes:
url talking about history of airline online systems, including
eastern's system one, amadeus, etc:
http://www.atwonline.com/channels/informationTechnology/article.html?articleID=1163
amadeus url
http://www.amadeus.net/home/index_toplevel.htm
https://www.us.amadeus.com/
note that amadeus was both system design started 1987 (somewhat drew
on eartern system one, my wife served a brief stint as amadeus chief
architect) and a business. this states amadeus (business) absorbed
system one on 1995:
http://airinfo.aero/services.html
misc. past posts mentioning amadeus:
https://www.garlic.com/~lynn/2001g.html#50 Did AT&T offer Unix to Digital Equipment in the 70s?
https://www.garlic.com/~lynn/2001h.html#76 Other oddball IBM System 360's ?
https://www.garlic.com/~lynn/2003d.html#67 unix
https://www.garlic.com/~lynn/2004b.html#6 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004m.html#27 Shipwrecks
https://www.garlic.com/~lynn/2004o.html#23 Demo: Things in Hierarchies (w/o RM/SQL)
https://www.garlic.com/~lynn/2004o.html#29 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005f.html#22 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2006b.html#23 Seeking Info on XDS Sigma 7 APL
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Gould, not Harris Newsgroups: alt.folklore.computers Date: Thu, 27 Jul 2006 21:39:17 -0600"Al Kossow" writes:
1988 Concurrent Computer Corporation merged with MASSCOMP. 1985 Concurrent Computer Corporation spun off from the Perkin-Elmer Corporation. 1974 Datacraft acquired by Harris Corporation. 1973 Interdata acquired by the Perkin-Elmer Corporation. 1967 Harris Computer Systems founded as Datacraft. 1966 Concurrent founded as Interdata, Inc.as undergraduate (late 60s) ... we reversed engineered ibm channel i/o interface and built a channel interface board (originally) for interdata/3 ... which was programmed to emulate a ibm telecommunication controller. lots of past posts mentioning the project https://www.garlic.com/~lynn/submain.html#360pcm
later the project upgraded to a interdata/4 (w/channel interface board and programmed to emulate the ibm telecommunication controller) and several embedded interdata/3 processors dedicated to line-scanner function.
in the late 90s i ran into somebody that said they made an extremely good living in the early 80s selling the (by then perkin-elmer) boxes to nasa. the ibm mainframe channel board was still wire-wrap and he conjectured that it could have still been our original design and implementation done at the univ. nasa was apparently using the line-scanner for serial interfaces other than just terminals ... various kinds of data collection and other devices where the data was passed on to ibm mainframe.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Article on Painted Post, NY Newsgroups: alt.folklore.computers Date: Thu, 27 Jul 2006 23:40:46 -0600Al Balmer writes:
then on to paris for a "HONE" install as part of emea hdqtrs moving from westchester county to brand new complex in la defense.
lots of past posts mentioning HONE (and/or apl)
https://www.garlic.com/~lynn/subtopic.html#hone
some specific posts mentioning the move of emea hdqtrs to la defense
https://www.garlic.com/~lynn/2002c.html#30 OS Workloads : Interactive etc
https://www.garlic.com/~lynn/2002h.html#67 history of CMS
https://www.garlic.com/~lynn/2004b.html#58 Oldest running code
https://www.garlic.com/~lynn/2004c.html#7 IBM operating systems
https://www.garlic.com/~lynn/2005o.html#34 Not enough parallelism in programming
... i.e. WTC was divided into EMEA (europe, middle east, and africa) and AFE (americas and far east; americas was everyplace except usa). afe hdqtrs remained in terrytown (for all i know afe hdqtrs is still in terrytown).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Pa Tpk spends $30 million for "Duet" system; but benefits are unknown Newsgroups: misc.transport.road,alt.folklore.computers Date: Fri, 28 Jul 2006 08:53:52 -0600John Varela writes:
collected boyd postings
https://www.garlic.com/~lynn/subboyd.html#boyd
and various boyd related urls from around the web
https://www.garlic.com/~lynn/subboyd.html#boyd2
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Pa Tpk spends $30 million for "Duet" system; but benefits are unknown Newsgroups: misc.transport.road,alt.folklore.computers Date: Fri, 28 Jul 2006 09:12:01 -0600John Varela writes:
some number of them turned up in a new company (including former fsd president). about ten years ago we did a joint project with them totally unrelated to atc. however, they had (also) developed a new atc system that was being sold into other countries.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Pa Tpk spends $30 million for "Duet" system; but benefits are unknown Newsgroups: misc.transport.road,alt.folklore.computers Date: Fri, 28 Jul 2006 11:45:38 -0600hancock4 writes:
old y2k posting that mentioned certification costs with respect to
human life related system
https://www.garlic.com/~lynn/99.html#24 BA Solves Y2K (Was: Re: Chinese Solve Y2K)
https://www.garlic.com/~lynn/2000.html#94 Those who do not learn from history...
we got called into review on one of the ATC modernization projects when
we were doing ha/cmp
https://www.garlic.com/~lynn/subtopic.html#hacmp
turned out that there had been a high-level strategic design decision that all faults could be masked/recovered by low-level system facilities and as a result the domain specific application code didn't have to worry about any kind of fault and/or associated retries, recoveries, etc.
turns out there are numerous domain specific possible "faults" ... totally unrelated to hardware or software glitches. one example that I remember is traffic hand-off between regional control centers. the controller receiving the hand-off can fail to notice the hand-off and the controller doing the hand-off needs to retry the hand-off (however the base design had assumed that application level software required no retry provisions ... since all faults were either low-level hardware or software glitches and could be addressed by hardware dedundancy and operating system recovery/retry).
all of this in ada.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Article on Painted Post, NY Newsgroups: alt.folklore.computers Date: Fri, 28 Jul 2006 12:43:29 -0600eugene@cse.ucsc.edu (Eugene Miya) writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Article on Painted Post, NY Newsgroups: alt.folklore.computers Date: Fri, 28 Jul 2006 13:15:04 -0600Anne & Lynn Wheeler writes:
friction didn't even require national boundaries ... i was at one all day meeting in paris at "ibm france" (as opposed to emea hdqtrs over in la defense). it was conducted in french and there was a long presentation by a frenchman from la guade (southern france ... maybe 20km? from nice). i was surprised that a parisian interrupted the speaker a couple dozen times to correct pronunciation.
i think this was possibly after the grenoble science center had been relocated to paris.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Article on Painted Post, NY Newsgroups: alt.folklore.computers Date: Fri, 28 Jul 2006 16:12:17 -0600eugene@cse.ucsc.edu (Eugene Miya) writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The SEL 840 computer Newsgroups: alt.folklore.computers Date: Fri, 28 Jul 2006 21:36:34 -0600jsavard writes:
in the very early 70s, the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
had taken apl\360 (from phili science center, iverson, falkoff, etc) and ported to cp67/cms virtual memory environment (apl\360 had its own multitasking monitor that could be thrown away for cms and operated typically with 16kbyte to 32kbyte real memory work spaces). the storage allocation and garbage collection had to be redone for (large) virtual memory work spaces. this was cms\apl for cp67/cms
the other thing done was adding support for cms system APIs (filesystem calls, network transfers, etc). this caused some amount of conflict with phili and the apl people because cambridge had violated the purity of apl with the way it implemented system api support.
palo alto science center then upgraded cms\apl to apl\cms for vm370/cms
as well as doing the 370/145 apl microcode assist. here is acm
paper from '75 on the apl microcode assist for cms\apl.
http://portal.acm.org/citation.cfm?id=803802&coll=portal&dl=ACM
in the mean time the apl "purists" came up with shared variable paradigm (apl/sv) for accessing generalized system functions.
eventually everything merged with vs/apl (virtual storage, apl)
the following has some apl references ... (8) was at the (cambridge)
science center during the days of cms\apl (and worked on various apl
applications) ... later left IBM and went to BCS (guess who his father
was)
http://www.math.uwaterloo.ca/apl_archives/apl/translit.schemes
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: SEQUENCE NUMBERS Newsgroups: bit.listserv.ibm-main,alt.folklore.computers,bit.listserv.vmesa-l Date: Sat, 29 Jul 2006 08:14:20 -0600R.S. wrote:
in vm/cms ... before the oco-wars, not only did source ship as standard, but maint. was done by shipping the source changes.
recent thread that started out discussing card sorting but drifted into
description of cms multi-level source update:
https://www.garlic.com/~lynn/2006n.html#45 sorting
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Google Architecture Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 30 Jul 2006 08:39:26 -0600Anne & Lynn Wheeler wrote:
... in somewhat similar vein
Grid Is 'It' at eBay
http://www.eweek.com/article2/0,1895,1995124,00.asp
The dramatic growth and high exposure of eBay's Web presence make it a rare example of a grid computing platform and application portfolio that are well past the pilot-project stage.
... snip ...
and for a little drift
https://www.garlic.com/~lynn/95.html#13
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Gen 2 EPC Protocol Approved as ISO 18000-6C Newsgroups: alt.technology.smartcards Date: Sun, 30 Jul 2006 08:55:46 -0600Bruce Barnett <spamhater113+U060729232659@grymoire.com> writes:
separately, there can be an issue with MITM-attack ... if you do something like authenticate a card (with signature on a challenge) separate from performing a transaction ... as opposed to having the card directly sign a transaction (and contactless/proximity may exaserbate the situation).
threat/vulnerability discussed somewhat in thread on "naked
transactions"
https://www.garlic.com/~lynn/aadsm24.htm#7 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#9 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#10 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#12 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#14 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#22 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#41 Naked Payments IV
https://www.garlic.com/~lynn/aadsm24.htm#42 Naked Payments II
in the mid-90s, the financial standard x9a10 working group was given
the requirement to preserve the integrity of the financial
infrastructure for all financial transactions ... this met ALL and in
credit, debit, stored-value, internet, non-internet, point-of-sale,
contact, contactless, etc.
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
one of the considerations was various MITM-attacks in various
different circumstances
https://www.garlic.com/~lynn/subintegrity.html#mitm
somewhat related was the work on the aads chip strawman in the late
90s that included being able to do fast signature signing within
power-profile of contactless and timing requirements for transit gates
https://www.garlic.com/~lynn/x959.html#aads
another issue looked at for aads chip strawman in the late 90s has shown up recelntly in this press release
Crypto model plugs leaky fabs
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=190900759
and more in this thread:
https://www.garlic.com/~lynn/aadsm24.htm#49 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm24.htm#51 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm24.htm#52 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#0 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#1 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#2 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#3 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#4 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#5 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#6 Crypto to defend chip IP: snake oil or good idea?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Gen 2 EPC Protocol Approved as ISO 18000-6C Newsgroups: alt.technology.smartcards Date: Sun, 30 Jul 2006 10:26:27 -0600Bruce Barnett <spamhater113+U060729232659@grymoire.com> writes:
some old email from the fall of 99
https://www.garlic.com/~lynn/aadsm25.htm#7 Crypto to defend chip IP: snake oil or good idea?
the 20,000 circuit custom design was not only extremely low power draw (making it easy fit for contactless ... even starting to move down into even lower power rfid range) ... but there was some work with the custom circuit design being able to do a signing with a private key in 10ms (putting it easily into the transit gate range).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: RAMAC 305(?) Newsgroups: alt.folklore.computers Date: Mon, 31 Jul 2006 09:00:13 -0600hancock4 writes:
has this history of airline online res system
http://www.atwonline.com/channels/informationTechnology/article.html?articleID=1163
from above:
As ATW's first issue was being prepared for its debut in 1964, another
baby was born to the commercial aviation industry: The Semi-Automatic
Business Research Environment went live on March 4, 1964. It was an
unwieldy name, inevitably shortened to Sabre, and it indeed would
prove to be a sharp-edged weapon. It also would revolutionize the
travel industry.
... snip ...
tail end of the above history talks about current status of various
of the res. systems .. recent news on that front:
http://www.breakingtravelnews.com/article/20060724103803551
...
I used to have several DASD "historical" URLs that were at the san
jose plant webserver ... but they went 404 when the business was sold
off.
http://www.bizjournals.com/sanjose/stories/2002/04/22/story6.html
and more current status:
http://www.hitachigst.com/portal/site/sanjosesite/menuitem.0aa94b6327c5360dacd3d307aac4f0a0/
...
for a little different drift:
in the mid-90s we were asked to look at some of the applications in one of the large res. system. started with routes ... which accounted for something like a quarter of the processing load. they had list of ten impossible things that they weren't able to do. we came back two months later and demonstrated a new implementation, including doing all ten impossible things. this became an unresovable problem for them ... part of the reason for the ten impossible things was that there were certain manual infrastructure operations that involved several hundred people. in part, the new implementation was able to address all ten impossible things by automating all the manual operations (actually deploying the new implemetation would have resulted in a major organizational impact).
we then wanted to move on to fares ... which accounted for something like 40percent of the system load. however, after appearing to have botched routes (at least from an organizational perspective), there was no interest in letting us have a try at fares.
misc. past posts mentioning routes activity
https://www.garlic.com/~lynn/99.html#136a checks (was S/390 on PowerPC?)
https://www.garlic.com/~lynn/2000f.html#20 Competitors to SABRE?
https://www.garlic.com/~lynn/2001d.html#69 Block oriented I/O over IP
https://www.garlic.com/~lynn/2002g.html#2 Computers in Science Fiction
https://www.garlic.com/~lynn/2002j.html#83 Summary: Robots of Doom
https://www.garlic.com/~lynn/2003o.html#17 Rationale for Supercomputers
https://www.garlic.com/~lynn/2004b.html#6 Mainframe not a good architecture for interactive workloads
https://www.garlic.com/~lynn/2004o.html#23 Demo: Things in Hierarchies (w/o RM/SQL)
https://www.garlic.com/~lynn/2004q.html#85 The TransRelational Model: Performance Concerns
https://www.garlic.com/~lynn/2005o.html#24 is a computer like an airport?
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Source maintenance was Re: SEQUENCE NUMBERS Newsgroups: bit.listserv.ibm-main,alt.folklore.computers,bit.listserv.vmesa-l Date: Mon, 31 Jul 2006 09:40:44 -0600cfmpublic@ibm-main.lst (Clark Morris) writes:
cms had "update" command from mid-60s ... which applied an update
control file to source, resulting in "temporary" file to be updated
recent refs:
https://www.garlic.com/~lynn/2006o.html#14 SEQUENCE NUMBERS
this provides a short description of the evoluation of the CMS
update command into multi-level source maintenance updates
https://www.garlic.com/~lynn/2006n.html#45 sorting
one of the things that fell by the wayside was an application that attempting to merge potentially parallel update activity.
during the early days at the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
evolving the cms multi-level source maintenance process ... there was an application written that attempted to merge and resolve parallel update/maint. operations.
the infrastructure evolved out of a joint project between cambridge and endicott to add 370 virtual machine support to cp67. cp67 provide virtual 360 and virtual 360/67 (i.e. virtual memory) virtual machines ... but 370 was going to announce virtual memory (it was something like two years away). 370 virtual memory definition had various differences from 360/67. the idea was quickly implement 370 virtual machines (with 370 defined virtual memory hardware tables) under cp67 (running on 360/67).
the multi-level initially consisted of
1) normal set of updates and enhancements built on base cp67 source, ("cp67l" system)
2) set of updates applied to normal cp67 that added support for 370 virtual machine option ("cp67h" system)
3) set of updates that modified cp67 kernel to run on 370 hardware (rather than 360/67 hardware; "cp67i" system)
part of the issue was that the cambridge cp67 system hosted some number of students (mit, bu, harvard, etc) and other non-employees in the boston area. since 370 virtual memory hadn't been announced yet, it was being treated as super sensitive corporate information and there was no desire for it to leak to non-employees.
as a result only #1 kernel typically ran on the real hardware. #2 kernel would run in a 360/67 virtual machine, isolated from prying eyes of the students and other non-employees. for testing of #2, #3 would then run in a 370 virtual machine (under #2 kernel, running in 360/67 virtual machine under #1 kernel, which ran on real machine).
so potential problem was that there might be new updates introduced at the "#1 level" (earlier in the update sequence) which might impact the updates applied later in the update sequence (i.e. updates to the base system that was going on independently supporting changes for 370 virtual machines).
as an aside, "cp67i" was up and running as normal operation a year before the first engineering 370 machine with virtual memory support was operational. then as 370 real machines with virtual memory support became available internally (still well before customer first customer ship), the "cp67i" was standard operating system running on those (real) machines ... at least until the vm370 morph became available (and some of the other operating system development got far enuf along to move from testing in virtual machine to real machine operation).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Gen 2 EPC Protocol Approved as ISO 18000-6C Newsgroups: alt.technology.smartcards Date: Mon, 31 Jul 2006 10:06:51 -0600"Ali" writes:
as mentioned in the ref,
https://www.garlic.com/~lynn/aadsm25.htm#7 Crypto to defined chip IP; snake oil or good idea?
the work in 1999 (20k circuits for private key digital signature in possible 10ms) was during the period that there was transition from .6micron to .2micron (i was co-chair of some sessions at recent ieee chip conference where there was discussion of issues moving from .06micron to .045micron).
the issue of person-centric vis-a-vis institutional-centric ... is that institutions are claiming they have to issue the hardware token because they can't otherwise be assured of the devices integrity (i.e. if hardware tokens became more than a fad, then people might wind up with scores of unique hardware tokens from multitude of different institutions ... starting to verge on the current password management nightmare).
the referenced 1999 email mentions processes that would allow institutions to validate integrity level of a person presented token ... enabling the change-over to a person-centric paradigm (from an institutional centric paradigm). in a person-centric paradigm ... the person could then have the choice of how many tokens they needed to manage ... modulo institutional requirements that they meet specified integrity criteria. specific integrity critieria then starts to move off into the area of parameterised risk management and security proportional to risk.
a recent (long) post discussing person-centric paradigm
https://www.garlic.com/~lynn/aadsm24.htm#52 Crypto to defend chip IP: snake oil or good idea?
a recent (long) post discussing parameterised risk management
https://www.garlic.com/~lynn/aadsm25.htm#1 Crypto to defend chip IP: snake oil or good idea?
the issue of contactless ... vis-a-vis contact ... is in some ways similar to the issue of internet vis-a-vis contact. there is sometimes assumptions that direct contact may have less vulnerabilities ... and that contactless, wireless, and the internet may open the way for additional vulnerabilities (possibility various kinds of evesdropping, skimming, etc, that may be much less difficult than with straight direct contact).
this is somewhat what we had to look at in the mid-90s for x9.59
financial standard protocol. the x9a10 financial standard working
group had been given the requirement to preserve the integrity of the
financial infrastructure for all retail payments ... regardless of the
type of payment or the infrastructure/environment that the payment
might occur in. that met that x9.59 had to work equally well in possibly
less vulnerable physical point-of-sale with contact card ... or in
possible more vulnerable internet and/or wireless environment.
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Source maintenance was Re: SEQUENCE NUMBERS Newsgroups: bit.listserv.ibm-main,alt.folklore.computers,bit.listserv.vmesa-l Date: Mon, 31 Jul 2006 13:48:38 -0600Shmuel Metz , Seymour J. wrote:
the aux files, control files, update files scheme was what was created for the effort for building 370 virtual machine support into a cp67 kernel (running on 360/67). however, it was implemented all in EXEC with EXEC processing figuring out the control & aux files and making interative calls to UPDATE command.
this was picked up as part of the original vm370 release and update command was enhanced to directly process control, aux, and update files (in one pass) and spitting out the (temporary, working) source file for compile/assemble.
a little later, editors were enhanced to directly support the control, aux, and update files as part of loading a source file for editing ... with option that all changes made in the edit session resulted in an "update" file (as opposed to a new complete source).
this recent posting, in a different thread, has more detailed
description of some of the operations ... as well as URLs to current CMS
documentation (including an example "update" from an internal editor
that predated xedit).
https://www.garlic.com/~lynn/2006n.html#45 sorting
a few other recent postings that happen to also mention xedit:
https://www.garlic.com/~lynn/2006n.html#34 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#43 MTS, Emacs, and... WYLBUR?
https://www.garlic.com/~lynn/2006n.html#55 The very first text editor
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cache-Size vs Performance Newsgroups: comp.arch Date: Mon, 31 Jul 2006 15:54:22 -0600MitchAlsup writes:
the major database vendors tend to have very detailed models of their internal operation and processing ... and tend to work with server vendors to make sure that processor cache sizes are sufficient for efficient dbms execution.
dbms may have a little more variety with different databases requiring adequate real storage to be used for caching (disk) records in transactions.
for a little drift ... i've posted before about the evolution in system real storage sizes and that effect on the uptake with the (emerging?) RDBMS technology.
in the 70s there was some discord between some of the "60s" physical
database people in stl/bldg90 and the relational/sql system/r people
in sjr/bldg28 ... misc. past posts mentioning system/r
https://www.garlic.com/~lynn/submain.html#systemr
the physical databases tended to have record pointers as part of data and exposed as part of the normal programming paradigm ... i.e. application fetched some record, operated on that record and then had direct pointer to one or more other records.
the stl people somewhat argued that the relational/sql paradigm abstracted away the direct record pointer paradigm by the relational schema and using large indexes inside the dbms implementation. for many databases, the indexes doubled the physical disk requirements (compared to the 60s physical database implementation) and significantly increased the number of disk access to retrieve a record (physically processing the index before getting to the pointers to the desired records).
on the other hand, with physical pointers no longer exposed in the standard database paradigm, relational significantly reduced the administrative and human overhead compared to the 60s paradigm.
one of the things that started to tip the balance in the 80s was that 1) disk space became significantly cheaper, the disk space for the index was reduced as a cost issue and 2) the amount of real memory increased significantly ... which allowed "caching" of much of the relational index (eliminating the significant disk i/o penalty processing the index to find a specific record or records). And then with further increases in real storage sizes, not only could relational indexes be cached ... and frequently much of the actual database records.
however, some of these databases may have cache operations that have a wide variation. bank accounts might see very little database cache benefit ... i.e. if you make an ATM withdrawal ... the probability may be very low that there will be another hit on the same bank account while the record is still in the database cache (over a broad range of database cache sizes). significant changes in real storage for database cache hit rate may see little benefit until it is nearly as large as the whole database.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Strobe equivalents Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 01 Aug 2006 11:28:36 -0600Gilbert Saint-Flour wrote:
had done a lot of work on performance monitoring and measurement technologies ... some of it later evolved into capacity planning.
there were sort of three kinds of technology
• monitoring & sampling
• simulation & modeling
• multiple regression analysis
all had their strengths and weaknesses and there were various
situations were one of the technologies could identify an issue when
the other two couldn't.
there were both software and hardware monitors. when work was being
done for selecting what should go into the ecps microcode assist, the
kernel was instrumented with a software monitor and then the person at
the palo alto science center responsible for the apl microcode assist
did a microcode based PSW sampler. old standby posting describing
ecps microcode assist analysis
https://www.garlic.com/~lynn/94.html#21
for other drift ... recent post mentioning the apl microcode assist
https://www.garlic.com/~lynn/2006o.html#13
there were two or three different simulation and modeling projects at the science center. there was an event driven system model written in PLI ... used among other things for modeling paging behavior ... and an analytical system model written in apl.
we used a variation on the apl system model in the automated
benchmarking for validating the resource manager before release.
https://www.garlic.com/~lynn/subtopic.html#fairshare
basically in excess of two thousand benchmarks were run taking three
months elapsed time. initially there were something like 1000
different benchmarks defined that had wide range of configuration,
workload, and system parameters. the modified apl system model was
feed all results and allowed to select the set of conditions for the
next benchmark. these results were fed back into the apl system model
and it repeated the condition selection settings for the next set
of benchmarks. this was repeated for another 1000 or so benchmarks
https://www.garlic.com/~lynn/submain.html#bench
the apl system model was also adapted to the HONE system (world wide
vm-based system that supported all field, sales, and marketing, by the
mid-70s, salesmen couldn't even place a mainframe order w/o having first
run it thru one of the HONE configurators)
https://www.garlic.com/~lynn/subtopic.html#hone
where it was called the performance predictor and allowed marketing people to input customer configuration and workload information and ask "what-if" questions (what happens if amount of memory is doubled or the workload changes, etc).
another instruction analysis tool was "REDCAP" which had been developed in POK for doing workload instruction traces ... for studying detailed workload instruction execution characteristics as aid in processor design. the science center adapted REDCAP for analyzing application execution in virtual memory environments. this was used to analyze the port of apl\360 to cms\apl (and execution characteristics of the memory allocation and garbage collection change from small 16k-32k byte real memory workspaces to very large virtual memory workspaces). It was also used by a number of application development groups to study their application in the transition from real storage to virtual memory operation (applications like IMS). It was also released as a product called Vs/Repack. Vs/Repack would also perform cluster analysis of program operation and attempt semi-automated program reorganization for improved execution in virtual memory environment.
some recent references to old vs/repack
https://www.garlic.com/~lynn/2006i.html#37 virtual memory
https://www.garlic.com/~lynn/2006j.html#18 virtual memory
https://www.garlic.com/~lynn/2006j.html#22 virtual memory
https://www.garlic.com/~lynn/2006j.html#24 virtual memory
https://www.garlic.com/~lynn/2006l.html#11 virtual memory
A few years ago, I ran into a consultant (european) that was doing work using a descendant of the performance predictor (with nearly 20 years of enhancements). During the corporate troubles in 1992, the vendor had acquired the rights to the software and had run it through an APL-to-C language converter ... and then subsequently made additional enhancements.
He was doing some consulting at a large datacenter that had an enormous application that ran across a large number of mainframes ($$ value in the 8-9 digit range). Even a few percentage performance improvements in the application translated into large number of hardware dollars. The application had been studied extensively using standard mainframe monitoring tools and heavily optimized. The consultant, using his enhanced performance modeling tool had identified additional areas that resulted in another ten percent optimization savings.
Remembering the science center experience from the early 70s (nearly 35 years earlier), i wondered if multiple regression analysis could identify opportunities; in fact it turned up something accounting for over 20% of total usage. The issue has been that things like instruction sampling and event modeling tend to turn up things at the micro level ... while multiple regression analysis frequently can highlight more macro level issues. The identified feature was a complex, spaghetti combination of low-level stuff ... which turned out could be optimized (at the macro level) and resulted in 14% total system savings.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: computational model of transactions Newsgroups: comp.databases.theory Date: Tue, 01 Aug 2006 13:50:58 -0600paul c writes:
and then when my wife and i were doing ha/cmp
https://www.garlic.com/~lynn/subtopic.html#hacmp
i designed and did ha/cmp's initial dlm implementation; minor
reference
https://www.garlic.com/~lynn/95.html#13
i actually had difference of opinion with jim during '91 sigops conference in asilomor about whether (ha/cmp) commodity clusters could be used in business critical settings.
for a little drift ... recent post about performance management
https://www.garlic.com/~lynn/2006o.html#23 Strobe equivalents
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: CPU usage for paging Newsgroups: bit.listserv.ibm-main Date: Wed, 02 Aug 2006 11:20:33 -0600Craig Dudley wrote:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Cache-Size vs Performance Newsgroups: comp.arch Date: Wed, 02 Aug 2006 11:36:31 -0600me writes:
... previous post
https://www.garlic.com/~lynn/2006o.html#22 Cache-Size vs Performance
for some drift collected past posts mentioning original relational/sql
work
https://www.garlic.com/~lynn/submain.html#systemr
and other collected past posts mentioning lru replacement algorithms
and working set type stuff ... dating back to 60s
https://www.garlic.com/~lynn/subtopic.html#wsclock
recent post on some performance management tools
https://www.garlic.com/~lynn/2006o.html#23 Strobe equivalents
including some discussion of vs/repack technology ... which was used internally in the early 70s to do detailed studies of applicationoperation in virtual memory environments (and replacement strategies). In the mid-70s, it was released as a product. part of the vs/repack technology did detailed studies of application instruction and storage references and attempted semi-automated program re-organization for improved operation in environments involving lru-type replacement strategies. Some of the large dbms products made extensive use of vs/repack as part of transition from real-storage environments to virtual memory plactforms.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: oops Date: Sun, 06 Aug 2006 05:49:16 -0600 Newsgroups: bit.listserv.vmesa-lPhil Smith III wrote:
cp67 was developed by the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
... supporting virtual machines and virtual memory. cp67 was released to customers. there had been an earlier cp40 developed on a custom modified 360/40 with virtual memory ... pending availability of a 360/67.
there was joint project between cambridge and endicott to add a lot of 370 stuff to cp67 kernel ... this was discussed recently in the series of posts on "sequence numbers" and cms multi-level source maintenance ... which mostly evolved out of the cp67 cambridge/endicott 370 effort (CMS originally stood for the cambridge monitor system, but morphed to conversational monitor system for vm370)
modified version of cp67 ran internally extensively on 370s ... pending availability of vm370. also CP67's CCWTRANS (supporting virtual memory ccws translated to shadow real CCWs) was used in initial prototype of os/vs2 (i.e. mvt hacked to directly support 370 virtual memory).
gobs of posts just this year mentioning cp/67
https://www.garlic.com/~lynn/2006.html#5 Page fault question (zero-filling)
https://www.garlic.com/~lynn/2006.html#7 EREP , sense ... manual
https://www.garlic.com/~lynn/2006.html#10 How to restore VMFPLC dumped files on z/VM V5.1
https://www.garlic.com/~lynn/2006.html#13 VM maclib reference
https://www.garlic.com/~lynn/2006.html#17 {SPAM?} DCSS as SWAP disk for z/Linux
https://www.garlic.com/~lynn/2006.html#19 DCSS as SWAP disk for z/Linux
https://www.garlic.com/~lynn/2006.html#25 DCSS as SWAP disk for z/Linux
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006.html#40 All Good Things
https://www.garlic.com/~lynn/2006b.html#7 Mount a tape
https://www.garlic.com/~lynn/2006b.html#8 Free to good home: IBM RT UNIX
https://www.garlic.com/~lynn/2006b.html#15 {SPAM?} Re: Expanded Storage
https://www.garlic.com/~lynn/2006b.html#16 {SPAM?} Re: Expanded Storage
https://www.garlic.com/~lynn/2006b.html#23 Seeking Info on XDS Sigma 7 APL
https://www.garlic.com/~lynn/2006b.html#25 Multiple address spaces
https://www.garlic.com/~lynn/2006b.html#32 Multiple address spaces
https://www.garlic.com/~lynn/2006b.html#39 another blast from the past
https://www.garlic.com/~lynn/2006b.html#40 another blast from the past ... VAMPS
https://www.garlic.com/~lynn/2006c.html#2 Multiple address spaces
https://www.garlic.com/~lynn/2006c.html#18 Change in computers as a hobbiest
https://www.garlic.com/~lynn/2006c.html#21 Military Time?
https://www.garlic.com/~lynn/2006c.html#22 Military Time?
https://www.garlic.com/~lynn/2006c.html#28 Mount DASD as read-only
https://www.garlic.com/~lynn/2006c.html#45 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006d.html#0 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006d.html#18 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006d.html#21 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006d.html#35 Fw: Tax chooses dead language - Austalia
https://www.garlic.com/~lynn/2006e.html#7 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006e.html#28 MCTS
https://www.garlic.com/~lynn/2006e.html#40 transputers again was: The demise of Commodore
https://www.garlic.com/~lynn/2006e.html#45 using 3390 mod-9s
https://www.garlic.com/~lynn/2006f.html#0 using 3390 mod-9s
https://www.garlic.com/~lynn/2006f.html#1 using 3390 mod-9s
https://www.garlic.com/~lynn/2006f.html#5 3380-3390 Conversion - DISAPPOINTMENT
https://www.garlic.com/~lynn/2006f.html#21 Over my head in a JES exit
https://www.garlic.com/~lynn/2006g.html#1 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#3 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#18 TOD Clock the same as the BIOS clock in PCs?
https://www.garlic.com/~lynn/2006g.html#58 REP cards
https://www.garlic.com/~lynn/2006h.html#7 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#20 Binder REP Cards (Was: What's the linkage editor really wants?)
https://www.garlic.com/~lynn/2006h.html#22 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#30 The Pankian Metaphor
https://www.garlic.com/~lynn/2006h.html#55 History of first use of all-computerized typesetting?
https://www.garlic.com/~lynn/2006h.html#57 PDS Directory Question
https://www.garlic.com/~lynn/2006i.html#4 Mainframe vs. xSeries
https://www.garlic.com/~lynn/2006i.html#9 Hadware Support for Protection Bits: what does it really mean?
https://www.garlic.com/~lynn/2006i.html#10 Hadware Support for Protection Bits: what does it really mean?
https://www.garlic.com/~lynn/2006i.html#23 Virtual memory implementation in S/370
https://www.garlic.com/~lynn/2006i.html#26 11may76, 30 years, (re-)release of resource manager
https://www.garlic.com/~lynn/2006i.html#28 virtual memory
https://www.garlic.com/~lynn/2006i.html#30 virtual memory
https://www.garlic.com/~lynn/2006i.html#31 virtual memory
https://www.garlic.com/~lynn/2006i.html#33 virtual memory
https://www.garlic.com/~lynn/2006i.html#36 virtual memory
https://www.garlic.com/~lynn/2006i.html#42 virtual memory
https://www.garlic.com/~lynn/2006i.html#43 virtual memory
https://www.garlic.com/~lynn/2006j.html#2 virtual memory
https://www.garlic.com/~lynn/2006j.html#5 virtual memory
https://www.garlic.com/~lynn/2006j.html#17 virtual memory
https://www.garlic.com/~lynn/2006j.html#19 virtual memory
https://www.garlic.com/~lynn/2006j.html#21 virtual memory
https://www.garlic.com/~lynn/2006j.html#23 virtual memory
https://www.garlic.com/~lynn/2006j.html#24 virtual memory
https://www.garlic.com/~lynn/2006j.html#27 virtual memory
https://www.garlic.com/~lynn/2006j.html#29 How to implement Lpars within Linux
https://www.garlic.com/~lynn/2006j.html#33 How to implement Lpars within Linux
https://www.garlic.com/~lynn/2006j.html#36 The Pankian Metaphor
https://www.garlic.com/~lynn/2006j.html#38 The Pankian Metaphor
https://www.garlic.com/~lynn/2006j.html#41 virtual memory
https://www.garlic.com/~lynn/2006j.html#44 virtual memory
https://www.garlic.com/~lynn/2006k.html#9 Arpa address
https://www.garlic.com/~lynn/2006k.html#13 The Pankian Metaphor
https://www.garlic.com/~lynn/2006k.html#14 The Pankian Metaphor
https://www.garlic.com/~lynn/2006k.html#29 PDP-1
https://www.garlic.com/~lynn/2006k.html#30 PDP-1
https://www.garlic.com/~lynn/2006k.html#31 PDP-1
https://www.garlic.com/~lynn/2006k.html#32 PDP-1
https://www.garlic.com/~lynn/2006k.html#34 PDP-1
https://www.garlic.com/~lynn/2006k.html#35 PDP-1
https://www.garlic.com/~lynn/2006k.html#36 PDP-1
https://www.garlic.com/~lynn/2006k.html#41 PDP-1
https://www.garlic.com/~lynn/2006k.html#42 Arpa address
https://www.garlic.com/~lynn/2006l.html#21 Virtual Virtualizers
https://www.garlic.com/~lynn/2006l.html#22 Virtual Virtualizers
https://www.garlic.com/~lynn/2006l.html#43 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006l.html#55 virtual memory
https://www.garlic.com/~lynn/2006m.html#2 An Out-of-the-Main Activity
https://www.garlic.com/~lynn/2006m.html#21 The very first text editor
https://www.garlic.com/~lynn/2006m.html#25 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#26 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#28 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#29 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#30 Old Hashing Routine
https://www.garlic.com/~lynn/2006m.html#32 Old Hashing Routine
https://www.garlic.com/~lynn/2006m.html#41 Why Didn't The Cent Sign or the Exclamation Mark Print?
https://www.garlic.com/~lynn/2006m.html#42 Why Didn't The Cent Sign or the Exclamation Mark Print?
https://www.garlic.com/~lynn/2006m.html#47 The System/360 Model 20 Wasn't As Bad As All That
https://www.garlic.com/~lynn/2006m.html#53 DCSS
https://www.garlic.com/~lynn/2006m.html#56 DCSS
https://www.garlic.com/~lynn/2006n.html#11 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#13 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#21 The System/360 Model 20 Wasn't As Bad As All That
https://www.garlic.com/~lynn/2006n.html#42 Why is zSeries so CPU poor?
https://www.garlic.com/~lynn/2006n.html#45 sorting
https://www.garlic.com/~lynn/2006n.html#49 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006o.html#3 MTS, Emacs, and... WYLBUR?
https://www.garlic.com/~lynn/2006o.html#13 The SEL 840 computer
https://www.garlic.com/~lynn/2006o.html#14 SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006o.html#19 Source maintenance was Re: SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006o.html#21 Source maintenance was Re: SEQUENCE NUMBERS
From: lynn@garlic.com Subject: Re: Google Architecture Date: Sun, 06 Aug 2006 11:13:12 -0700 Newsgroups: bit.listserv.ibm-main,alt.folklore.computerssomewhat keeping this thread going ...
Another Operating System Expert Goes to Google
http://www.microsoft-watch.com/article2/0,1995,1999763,00.asp?kc=MWRSS02129TX1K0000535
The State of the Mainframe Today
http://www.osnews.com/story.php?news_id=15398
past posts in thread:
https://www.garlic.com/~lynn/2006l.html#4 Google Architecture
https://www.garlic.com/~lynn/2006l.html#6 Google Architecture
https://www.garlic.com/~lynn/2006l.html#7 Google Architecture
https://www.garlic.com/~lynn/2006l.html#8 Google Architecture
https://www.garlic.com/~lynn/2006l.html#24 Google Architecture
https://www.garlic.com/~lynn/2006l.html#26 Google Architecture
https://www.garlic.com/~lynn/2006l.html#27 Google Architecture
https://www.garlic.com/~lynn/2006l.html#28 Google Architecture
https://www.garlic.com/~lynn/2006l.html#31 Google Architecture
https://www.garlic.com/~lynn/2006l.html#32 Google Architecture
https://www.garlic.com/~lynn/2006l.html#33 Google Architecture
https://www.garlic.com/~lynn/2006l.html#37 Google Architecture
https://www.garlic.com/~lynn/2006m.html#43 Google Architecture
https://www.garlic.com/~lynn/2006n.html#12 Google Architecture
https://www.garlic.com/~lynn/2006o.html#15 Google Architecture
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: oops, cics Newsgroups: alt.folklore.computers, bit.listserv.vmesa-l Date: Tue, 08 Aug 2006 06:28:29 -0600bob shair wrote:
the university i was at had a 360/67 (originally installed for
tss/360) ... and with all the tss/360 problems started looking for
other uses (besides running it in 360/65 mode with os/360). they
stumbled across the cp/67 sometime in 1967 and had three people from
the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
come out the last week in jan68 to install cp67. i got to play with cp67 (as an undergraduate) in addition to supporting os/360.
part of that also led to us doing our own clone controller ... recent
topic drift on cloning
https://www.garlic.com/~lynn/aadsm25.htm#10 Crypto to defend chip IP: snake oil or good idea?
above mentions the university cloning project ... and cloned controllers also motivating FS project.
however, the university library also had an ONR grant and was selected
to be a CICS beta test site ... and i got roped into shooting some
number of early CICS bugs. misc. past post mentioning early CICS (and/or
BDAM)
https://www.garlic.com/~lynn/submain.html#bdam
From: lynn@garlic.com Subject: Re: The Question of Braces in APL-ASCII Date: Wed, 09 Aug 2006 14:01:23 -0700 Newsgroups: comp.lang.apl,alt.folklore.computersKenneth Brody wrote:
misc past posts mentioning apl and/or hone .... hone was the internal
world-wide online service supporting field, marketing, & sales ....
majority of applications written in apl (originally cp67 with cms\apl
... and then migrated to vm370, first with apl\cms and then vs\apl).
https://www.garlic.com/~lynn/subtopic.html#hone
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Metroliner telephone article Newsgroups: misc.transport.rail.americas,nyc.transit,alt.folklore.computers Date: Fri, 11 Aug 2006 10:35:09 -0600"Sancho Panza" writes:
slightly earlier thread on the same subject:
https://www.garlic.com/~lynn/aadsm24.htm#35 Interesting bit of a quote
https://www.garlic.com/~lynn/aadsm24.htm#36 Interesting bit of a quote
https://www.garlic.com/~lynn/aadsm24.htm#39 Interesting bit of a quote
https://www.garlic.com/~lynn/aadsm24.htm#40 Interesting bit of a quote
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Fri, 11 Aug 2006 11:25:17 -0600sidd@situ.com () writes:
we had a number of meetings with some of the major dbms vendors that had cluster implementations that ran on vax/cluster. we got a list of the 8-10 things that they felt could be improved about vax/cluster ... as well as the vax/cluster distributed lock manager. one of the things was the long time that it took vax/cluster to recover to a stable state after change in cluster membership.
so one of the things that i did in the original design and implementation of the ha/cmp dlm was significantly shorten the time it took to recover to stable state.
random ha/cmp posting
https://www.garlic.com/~lynn/95.html#13
misc past postings mentioning ha/cmp dlm
https://www.garlic.com/~lynn/aadsm16.htm#22 Ousourced Trust (was Re: Difference between TCPA-Hardware and a smart card and something else before
https://www.garlic.com/~lynn/aadsm21.htm#29 X.509 / PKI, PGP, and IBE Secure Email Technologies
https://www.garlic.com/~lynn/2001c.html#66 KI-10 vs. IBM at Rutgers
https://www.garlic.com/~lynn/2001e.html#2 Block oriented I/O over IP
https://www.garlic.com/~lynn/2001j.html#47 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2001k.html#5 OT - Internet Explorer V6.0
https://www.garlic.com/~lynn/2002e.html#67 Blade architectures
https://www.garlic.com/~lynn/2002k.html#8 Avoiding JCL Space Abends
https://www.garlic.com/~lynn/2004i.html#1 Hard disk architecture: are outer cylinders still faster than inner cylinders?
https://www.garlic.com/~lynn/2004i.html#2 New Method for Authenticated Public Key Exchange without Digital Certificates
https://www.garlic.com/~lynn/2004i.html#8 Hard disk architecture: are outer cylinders still faster than inner cylinders?
https://www.garlic.com/~lynn/2004m.html#0 Specifying all biz rules in relational data
https://www.garlic.com/~lynn/2004m.html#5 Tera
https://www.garlic.com/~lynn/2004q.html#10 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2004q.html#70 CAS and LL/SC
https://www.garlic.com/~lynn/2005.html#40 clusters vs shared-memory (was: Re: CAS and LL/SC (was Re: High Level Assembler for MVS & VM & VSE))
https://www.garlic.com/~lynn/2005b.html#1 Foreign key in Oracle Sql
https://www.garlic.com/~lynn/2005f.html#18 Is Supercomputing Possible?
https://www.garlic.com/~lynn/2005h.html#26 Crash detection by OS
https://www.garlic.com/~lynn/2005i.html#42 Development as Configuration
https://www.garlic.com/~lynn/2006c.html#8 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#41 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006j.html#20 virtual memory
https://www.garlic.com/~lynn/2006o.html#24 computational model of transactions
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Fri, 11 Aug 2006 12:15:13 -0600sidd@situ.com () writes:
it had support for the same api/semantics as offered by vms dlm ... but internally it kept/piggybacked state in more places so that it shorten recovery time (slightly more upfront work but shortened any fault/recovery time).
some of the dbms vendors had fast commit or something similar in non-cluster environment ... but was disabled for any cluster operation. as part of the dlm work, i had also worked out the conventions for doing fast commit type operations across a cluster operation. however, originally it was considered somewhat too advanced ... although I've had follow-up in the past couple years about implementations for doing fast commit type operation in cluster environment.
misc. past posts mentioning fast commit stuff:
https://www.garlic.com/~lynn/2001.html#40 Disk drive behavior
https://www.garlic.com/~lynn/2002k.html#8 Avoiding JCL Space Abends
https://www.garlic.com/~lynn/2003i.html#70 A few Z990 Gee-Wiz stats
https://www.garlic.com/~lynn/2003j.html#7 A few Z990 Gee-Wiz stats
https://www.garlic.com/~lynn/2004q.html#70 CAS and LL/SC
https://www.garlic.com/~lynn/2005f.html#32 the relational model of data objects *and* program objects
https://www.garlic.com/~lynn/2006c.html#8 IBM 610 workstation computer
other ha/cmp posts
https://www.garlic.com/~lynn/subtopic.html#hacmp
and other posts on continuous availability, disaster survivability, and
geographic survivability
https://www.garlic.com/~lynn/submain.html#available
and other drift misc. past posts mentioning original relational/sql
implementation
https://www.garlic.com/~lynn/submain.html#systemr
note, some amount of the work also drew on my wife's experience doing
a stint (long ago and far away) in POK responsible for mainframe
loosely-coupled architecture (i.e. loosely-coupled is mainframe speak
for cluster, dates back to at least 360 cluster operation in the
60s). while there, she developed Peer-Coupled Shared Data
architecture
https://www.garlic.com/~lynn/submain.html#shareddata
which didn't see much uptake at the time ... but eventually used by IMS hot-standby ... and since has evolved into (mainframe) parallel sysplex.
a parallel sysplex URL:
http://www-03.ibm.com/servers/eserver/zseries/pso/
misc. past posts mentioning parallel sysplex:
https://www.garlic.com/~lynn/98.html#30 Drive letters
https://www.garlic.com/~lynn/98.html#35a Drive letters
https://www.garlic.com/~lynn/98.html#36 What is MVS/ESA?
https://www.garlic.com/~lynn/98.html#37 What is MVS/ESA?
https://www.garlic.com/~lynn/98.html#40 Comparison Cluster vs SMP?
https://www.garlic.com/~lynn/98.html#57 Reliability and SMPs
https://www.garlic.com/~lynn/99.html#71 High Availabilty on S/390
https://www.garlic.com/~lynn/99.html#77 Are mainframes relevant ??
https://www.garlic.com/~lynn/99.html#128 Examples of non-relational databases
https://www.garlic.com/~lynn/2000.html#13 Computer of the century
https://www.garlic.com/~lynn/2000.html#31 Computer of the century
https://www.garlic.com/~lynn/2000f.html#29 OT?
https://www.garlic.com/~lynn/2000f.html#30 OT?
https://www.garlic.com/~lynn/2001b.html#73 7090 vs. 7094 etc.
https://www.garlic.com/~lynn/2001c.html#2 Z/90, S/390, 370/ESA (slightly off topic)
https://www.garlic.com/~lynn/2001c.html#69 Wheeler and Wheeler
https://www.garlic.com/~lynn/2001g.html#46 The Alpha/IA64 Hybrid
https://www.garlic.com/~lynn/2001n.html#47 Sysplex Info
https://www.garlic.com/~lynn/2002e.html#25 Crazy idea: has it been done?
https://www.garlic.com/~lynn/2002f.html#6 Blade architectures
https://www.garlic.com/~lynn/2002o.html#68 META: Newsgroup cliques?
https://www.garlic.com/~lynn/2003h.html#60 The figures of merit that make mainframes worth the price
https://www.garlic.com/~lynn/2004m.html#24 IBM Spells Out Mainframe Strategy
https://www.garlic.com/~lynn/2004n.html#16 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004n.html#38 RS/6000 in Sysplex Environment
https://www.garlic.com/~lynn/2005d.html#25 The future of the Mainframe
https://www.garlic.com/~lynn/2005i.html#43 Development as Configuration
https://www.garlic.com/~lynn/2005n.html#0 Cluster computing drawbacks
https://www.garlic.com/~lynn/2005n.html#7 54 Processors?
https://www.garlic.com/~lynn/2005n.html#25 Data communications over telegraph circuits
https://www.garlic.com/~lynn/2005o.html#30 auto reIPL
https://www.garlic.com/~lynn/2005o.html#37 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005p.html#15 DUMP Datasets and SMS
https://www.garlic.com/~lynn/2005p.html#44 hasp, jes, rasp, aspen, gold
https://www.garlic.com/~lynn/2005u.html#23 Channel Distances
https://www.garlic.com/~lynn/2005v.html#0 DMV systems?
https://www.garlic.com/~lynn/2006.html#32 UMA vs SMP? Clarification of terminology
https://www.garlic.com/~lynn/2006d.html#24 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006e.html#46 using 3390 mod-9s
https://www.garlic.com/~lynn/2006f.html#19 Over my head in a JES exit
https://www.garlic.com/~lynn/2006h.html#52 Need Help defining an AS400 with an IP address to the mainframe
https://www.garlic.com/~lynn/2006i.html#2 The Pankian Metaphor
https://www.garlic.com/~lynn/2006l.html#4 Google Architecture
https://www.garlic.com/~lynn/2006l.html#6 Google Architecture
https://www.garlic.com/~lynn/2006l.html#45 Mainframe Linux Mythbusting (Was: Using Java in batch on z/OS?)
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Source maintenance was Re: SEQUENCE NUMBERS Newsgroups: bit.listserv.ibm-main,alt.folklore.computers,bit.listserv.vmesa-l Date: Sat, 12 Aug 2006 08:37:05 -0600ref:
for some additional drift, old history about requiring source for
application distribution on the internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: the personal data theft pandemic continues Newsgroups: bit.listserv.ibm-main Date: Sat, 12 Aug 2006 11:50:04 -0600Efinnell15@ibm-main.lst wrote:
and mention of another sox thread here:
https://www.garlic.com/~lynn/2006o.html#31
there is the generic category of Identity Theft ... which FTC and some other organizations have been trying to differentiate into identity theft and account theft/fraud.
the account theft/fraud is obtaining sufficient information to perform fraudulent transactions against existing accounts. the other is obtaining sufficient information to create fraudulent new accounts or records in the name of the victim.
part of the issue discussed here
https://www.garlic.com/~lynn/aadsm25.htm#13
is security breaches and/or data breaches involving account related information ... where just knowing the account number is sufficient to perform fraudulent transaction. the problem in such situations is that the account number needs to be readily available for correct operation of scores of business processes. however, at the same time, because of the fraudulent transaction vulnerability, the account number needs to be kept strictly confidential and never divulged or made available. the diametrically opposing requirements in the treatment of account numbers creates quite a bit of conflict.
in the mid-90s, the x9a10 financial standards working group was given
the requirement to preserve the integrity of the financial
infrastructure for all retail payments. one of the items in the
resulting x9.59 financial standard
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
was to remove knowledge of account number as a fraudulent transaction vulnerability (i.e. account numbers used in x9.59 financial standards couldn't be used in other kinds of transactions w/o the required authentication).
this is somewhat related to my old post on security proportional to risk
https://www.garlic.com/~lynn/2001h.html#61
a similar tread related to account theft/fraud discusses the
vulnerability of "naked transactions" (transactions that don't carry
individual authentication/armoring)
https://www.garlic.com/~lynn/aadsm24.htm#5
https://www.garlic.com/~lynn/aadsm24.htm#7
https://www.garlic.com/~lynn/aadsm24.htm#9
https://www.garlic.com/~lynn/aadsm24.htm#10
https://www.garlic.com/~lynn/aadsm24.htm#12
https://www.garlic.com/~lynn/aadsm24.htm#14
https://www.garlic.com/~lynn/aadsm24.htm#26
https://www.garlic.com/~lynn/aadsm24.htm#41
https://www.garlic.com/~lynn/aadsm24.htm#42
also in the 90s, we had been called in to help word smith the cal. (and later the federal) electronic signature legislation. one of the industry groups involved was also looking at privacy issues and had done a survey about factors motivating privacy legislation ... they found the two major driving factors behind privacy legislation were
1) Identity Theft (including account fraud/theft) 2) "denial of service" (against individuals by institutions and organizations)
at the time, cal. was also working on a data breach notification law, in part because any subsequent fraud (including fraudulent account transactions) was frequently against individuals, as opposed to the institution that had the security/data breach.
misc. past posts mentioning electronic signature related stuff
https://www.garlic.com/~lynn/subpubkey.html#signature
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Metroliner telephone article Newsgroups: misc.transport.rail.americas,nyc.transit,alt.folklore.computers Date: Sat, 12 Aug 2006 15:33:18 -0600floyd@apaflo.com (Floyd L. Davidson) writes:
and:
SEMINAR
Monday, June 11, 1984
10:00 a.m. - 2C-012
Dan Dvorak
AT&T Bell Laboratories
ABSTRACT
The Bell Laboratories Network (BLN) provides a host-to-host networking
service that has been specifically designed for the heterogeneous
computer environment at AT&T Bell Laboratories. BLN incorporates two
important concepts: a 7-layer architecture similar to the one proposed
by ISO and CCITT, and implementation techniques that allow most of the
networking software to reside in totally portable modules. BLN has
been operational since March 1979, and currently runs on over 25 nodes
throughout AT&T. This talk presents an overview of the network
service requirements and the architecture and implementation that was
developed to provide those services.
BIOGRAPHY
Dan Dvorak joined AT&T Bell Laboratories in 1972 and was named
"Distinguished MTS" in 1984. His current work focuses on the DATAKIT*
Virtual Circuit Switch where he is coordinating the development of a
DATAKIT central network management system and also engineering the
large internal DATAKIT VCS network for local-area and wide-area data
communications within Bell Labs. Earlier he worked on a layered
network architecture and implementation for host-to-host networking,
and later surveyed existing LAN products. Dan holds a MSEE in
Computer Engineering from Stanford University (1974).
... snip ...
misc. past postings mentioning osi, 7-layer architecture, and/or
other stuff
https://www.garlic.com/~lynn/subnetwork.html#xtphsp
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: the personal data theft pandemic continues Newsgroups: bit.listserv.ibm-main Date: Sun, 13 Aug 2006 06:22:50 -0600Ed Finnell wrote:
1974 privacy act overview (for federal executive branch agencies)
http://www.usdoj.gov/04foia/04_7_1.html
intro/overview
http://www.usdoj.gov/04foia/1974intro.htm
the popular press somewhat treats the (account fraud) situation like a bucket that periodically springs links. the issue in the "naked transaction" paradigm is that it is possible for information to leak at the millions of business processes that use and process transactions.
the analogy is then much more like a giant sieve than a giant bucket (that periodically springs leaks). in the "naked transaction" scenario ... it isn't so much that the information can be leaking from millions of business processes ... but the vulnerability that it is possible to turn around and use the leaked information for fraudulent transactions. this is my scenario that even if the planet was buried under miles of (information hiding) crypto ... that the (account) business process information would continue to leak ... since it is required and used in millions of different places.
the x9.59 financial standard scenario
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
... rather than trying to continue the impossible task of plugging all the potential leakage points ... was eliminate the leaks as fraudulent transaction vulnerability (i..e the information could continue to leak but couldn't be turned around and used for fraudulent transactions)
for a little more drift, i was co-author of the financial industry PIA
x9.99 standard ... and had to spend an unexpected amount of time not
only looking at glba but also hipaa and eu-dpd. I also did a privacy
merged taxonomy and glossary as part of the effort
https://www.garlic.com/~lynn/index.html#glosnote
some of the fed. gov privacy officers attended some of the financial standard privacy working group meetings. one of them commented that the original hipaa "security" language had hardly changed since it was originally drafted in the 70s.
Also, the OECD privacy guidelines have been around since 1980
http://www.cdt.org/privacy/guide/basic/oecdguidelines.html
lots of past posts related to fraud, vulnerabilities, threats, and exploits
https://www.garlic.com/~lynn/subintegrity.html#fraud
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: hardware virtualization slower than software? Newsgroups: alt.folklore.computers,comp.arch,bit.listserv.vmesa-l Date: Sun, 13 Aug 2006 06:54:24 -0600Hardware virtualization slower than software?
... from above:
One example given is compilation of a Linux kernel under a virtualized
Linux OS. Native wall-clock time: 265 seconds. Software-assisted
virtualization: 393 seconds. Hardware-assisted virtualization: 484
seconds. Ouch. It sounds to me like a hybrid approach may be the best
answer to the virtualization problem.
... snip ...
similar, but different posting made here not too long ago
https://www.garlic.com/~lynn/2006j.html#27 virtual memory
the above has a discussion about hardware/software virtualization trade-off in 3081 vis-a-vis 3090. note that this was pre-"PR/SM" (which has since evolved into LPARS) ... where the microcode support can create virtual machines ... w/o requiring separate hypervisor monitor running (i.e. "dropping" everything into hardware was no longer a performance trade-off issue).
for other drift, the performance characterization in the article is
reminisent of presentation i made at Atlantic City share meeting in fall68.
three people had came out from the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
the last week in jan68 to install cp67 at the university. during the
spring and summer of 68, i rewrote significant poritions of the
kernel, some cases descreasing pathlengths by factor of 10 to 100
times. past posting of parts of that presentation
https://www.garlic.com/~lynn/94.html#18 CP/67 and OS MFT14
which has a bare-machine (native wall clock) time of 322 sec. original virtualization elapsed time 856 sec. virtualization elapsed time (after rewrites of the spring and summer) 435 secs (virtualization processing was reduced from 534 cpu secs. to 113 cpu secs.).
misc. other posts repeating the same information:
https://www.garlic.com/~lynn/97.html#22 Pre S/360 IBM Operating Systems?
https://www.garlic.com/~lynn/97.html#28 IA64 Self Virtualizable?
https://www.garlic.com/~lynn/98.html#21 Reviving the OS/360 thread (Questions about OS/360)
https://www.garlic.com/~lynn/99.html#93 MVS vs HASP vs JES (was 2821)
https://www.garlic.com/~lynn/2001h.html#12 checking some myths.
https://www.garlic.com/~lynn/2005m.html#16 CPU time and system load
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: sorting Newsgroups: alt.folklore.computers Date: Sun, 13 Aug 2006 09:37:31 -0600krw writes:
and came up with this idea that online phone directories would go a
long way to getting a lot of the internal non-computer users ... to
start using online computer facilities. as a result, we started
project to do internal online phone directories. recent post (in this
thread) discussing some of that
https://www.garlic.com/~lynn/2006n.html#22 sorting was: The System/360 Model 20 Wasn't As Bad As All That
for some drift ... i maintain a few merged taxonomies and glossaries
on a number of subjects
https://www.garlic.com/~lynn/index.html#glosnote
which also includes some number of acronyms.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: the personal data theft pandemic continues Newsgroups: bit.listserv.ibm-main Date: Sun, 13 Aug 2006 10:23:19 -0600ref:
for some additional drift related to being able to harvest personal information and whether or not it represents a vulnerability, risk, threat, and/or fraud potential.
here is a lot of past postings on account number harvesting
https://www.garlic.com/~lynn/subintegrity.html#harvest
and even more posts on general fraud
https://www.garlic.com/~lynn/subintegrity.html#fraud
... basically being able to harvest (static) information and perform fraudulent activities ... frequently as some form of replay-attack.
x9.59 included countermeasure to skimming and
replay-attacks (i.e. simple skimming/harvesting of readily
available information and using it for fraudulent transactions)
https://www.garlic.com/~lynn/x959.html#x959
https://www.garlic.com/~lynn/subpubkey.html#x959
another example is the recent news articles about cloning e-passport chips
https://www.garlic.com/~lynn/aadsm25.htm#9 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm25.htm#11 And another cloning tale
where there have been subsequent comments that e-passport cloning doesn't represent a vulnerability (i.e. personal information may be captured, but it supposedly isn't subject to exploits).
this is somewhat in light of recent items about similar cloning of financial payment chip cards ... and yes card vulnerability
first a quicky comment about 3-factor authentication model
https://www.garlic.com/~lynn/subintegrity.html#3factor
• something you have
• something you know
• something you are
in the yes card vulnerability, the chip card represented something
you have authentication. it contained static information that is very
similar to what is found on a magstripe ... and the chip is vulnerable
to some of the same techniques used to harvest magstripe
information. then a counterfeit yes card chip card is built in
manner similar to creating a counterfeit magstripe card. presenting a
supposedly valid card is then a form of something you have
authentication.
supposedly the e-passport can be considered a form of electronic surrogate passport. there can be a digital image, a name and a passport number ... supposedly all protected from modification by some form of cryptographic technique or secure hash.
if the threat model is the stealing and use of electronic passport then the e-passport is a failure ... since it is easier to copy/steal the e-passport information (compared to physical passport). furthermore, the theft of a physical passport is frequently noticed and reported ... while the "theft" of e-passport may not even be noticed.
however, the e-passport does provide a countermeasure to modification threat model (i.e. altering information/picture on valid passport and/or creating purely counterfeit passport with false information).
the lack of vulnerability, somewhat supposes that there is a (trusted) human in the loop that reads the electronic information, looks at the digital picture and compares it against the person standing in front of them (basically a form of something you are or biometric authentication).
the issue with the yes card, was that the card represented purely something you have authentication (whoever possesses the object is authenticated). it does require a PIN (something you know authentication) for supposedly multi-factor authentication and as a countermeasure to lost/stolen cards.
however, a fault in the yes card scenario was that the terminal would authenticate the (potentially counterfeit) card (with static data vulnerable to replay attacks) and then asked the card if the correct PIN was entered. the counterfeit yes cards were programmed to always respond YES (that the correct pin was entered).
Slight additional digression on yes card and multi-factor authentication; supposedly multi-factor authentication is considered more secure based on the different authentication factors having independent threats and vulnerabilities (which is NOT a valid assumption, if they have common threat/attack). A copy of the (static/SDA) authentication information can copied into a yes card and then it is no longer necessary for the attacker to know the correct PIN.
supposedly the countermeasure to the yes card replay
attack exploit (using static data authentication) is to convert to
dynamic data authentication (DDA; i.e. changes on every use). However,
there may still be a man-in-the-middle vulnerability
(MITM-attack)
https://www.garlic.com/~lynn/subintegrity.html#mitm
where a counterfeit yes card is paired with some valid (DDA) card, the counterfeit yes card transparently passes the (DDA) authentication operation to a valid card ... but then takes control of the remaining interactions. as an aside, this is somewhat similar to the "naked transaction" thread mentioned earlier, i.e. straight forward something you have card authentication (with or w/o PIN, something you know entry as countermeasure to lost/stolen card) separate from the actual transactions and business processes; opening gaps for MITM-attacks.
a few recent posts discussing yes card vulnerability, chip cloning, etc:
https://www.garlic.com/~lynn/aadsm22.htm#34 FraudWatch - Chip&Pin, a new tenner (USD10)
https://www.garlic.com/~lynn/aadsm22.htm#39 FraudWatch - Chip&Pin, a new tenner (USD10)
https://www.garlic.com/~lynn/aadsm22.htm#40 FraudWatch - Chip&Pin, a new tenner (USD10)
https://www.garlic.com/~lynn/aadsm23.htm#20 Petrol firm suspends chip-and-pin
https://www.garlic.com/~lynn/aadsm23.htm#25 Petrol firm suspends chip-and-pin
https://www.garlic.com/~lynn/aadsm23.htm#27 Chip-and-Pin terminals were replaced by "repairworkers"?
https://www.garlic.com/~lynn/aadsm23.htm#30 Petrol firm suspends chip-and-pin
https://www.garlic.com/~lynn/aadsm23.htm#55 UK Detects Chip-And-PIN Security Flaw
https://www.garlic.com/~lynn/aadsm24.htm#0 FraudWatch - Chip&Pin, a new tenner (USD10)
https://www.garlic.com/~lynn/aadsm24.htm#1 UK Detects Chip-And-PIN Security Flaw
https://www.garlic.com/~lynn/aadsm24.htm#2 UK Banks Expected To Move To DDA EMV Cards
https://www.garlic.com/~lynn/aadsm24.htm#27 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#29 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#30 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#31 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#32 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm24.htm#43 DDA cards may address the UK Chip&Pin woes
https://www.garlic.com/~lynn/aadsm25.htm#4 Crypto to defend chip IP: snake oil or good idea?
https://www.garlic.com/~lynn/aadsm25.htm#9 DDA cards may address the UK Chip&Pin woes
posts referencing naked transactions
https://www.garlic.com/~lynn/aadsm24.htm#5
https://www.garlic.com/~lynn/aadsm24.htm#7
https://www.garlic.com/~lynn/aadsm24.htm#9
https://www.garlic.com/~lynn/aadsm24.htm#10
https://www.garlic.com/~lynn/aadsm24.htm#12
https://www.garlic.com/~lynn/aadsm24.htm#14
https://www.garlic.com/~lynn/aadsm24.htm#26
https://www.garlic.com/~lynn/aadsm24.htm#41
https://www.garlic.com/~lynn/aadsm24.htm#42
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Mon, 14 Aug 2006 09:38:11 -0600Charles Richmond writes:
and accounting for resources used ... i was once approached about using more computing resources than the whole rest of the organization ... and asked for ideas about reducing it ... I made an offhand suggestion about possibly doing less work.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Metroliner telephone article Newsgroups: misc.transport.rail.americas,nyc.transit,alt.folklore.computers Date: Mon, 14 Aug 2006 16:24:02 -0600sidd@situ.com () writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: "25th Anniversary of the Personal Computer" Newsgroups: alt.folklore.computers Date: Mon, 14 Aug 2006 18:25:16 -0600Roland Hutchinson writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Tue, 15 Aug 2006 07:08:11 -0600jmfbahciv writes:
then there is the story about getting operating system deployed in the disk engineering lab (bldg. 14) and disk product test lab (bldg. 15). their attempts at it before hadn't been very successful (they tried it with mvs and found it to have something like 15min mtbf). i had to nearly completely rewrite the i/o supervisor to handle the significant error conditions generated by hardware in development and test.
the side-effect was they got engineering own time-sharing service ... the down-side was i got the trouble calls when anything went wrong, even when it was their own hardware.
one such was some monday mid-morning (from bldg. 15) when they called to complain that the performance had gone all to pieces and what had I done over the weekend (and they had done nothing). turns out that they had string of 16 drives that they had put together for their own use ... and had actually exchanged an existing 3830 disk controller with a 3880 disk controller (still in test) over the weekend. after some amount of diagnostic, it was shown that there had been no software changes over the weekend, and the (performance) problems were isolated to the newly installed 3880 disk controller. after some more diagnostic the nature of the problem was characterized ... and they went off to try and figure out how to redo the hardware to fix the problem. fortunately, first customer ship was still six months off and there was some time to fix things up.
lots of past telling of various activities in bldgs 14&15
https://www.garlic.com/~lynn/subtopic.html#disk
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: "25th Anniversary of the Personal Computer" Newsgroups: alt.folklore.computers Date: Tue, 15 Aug 2006 07:26:45 -0600Roland Hutchinson writes:
and old 801 reference:
https://www.garlic.com/~lynn/2003e.html#65 801 (was Re: Reviving Multics
including the following tidbit (I had already left cambridge and
transferred to sjr):
Date: 79/07/11 11:00:03
To: wheeler
i heard a funny story: seems the MIT LISP machine people proposed that
IBM furnish them with an 801 to be the engine for their prototype.
B.O. Evans considered their request, and turned them down.. offered
them an 8100 instead! (I hope they told him properly what they
thought of that)
... snip ... top of post, old email index
see the referenced 801 url for some comments about the difference between 801 and 8100.
at the time, the 801 group had pl.8 and cp.r monitor; and of course,
801 has since evolved into power and power/pc.
https://www.garlic.com/~lynn/subtopic.html#801
and other posts in the thread:
https://www.garlic.com/~lynn/2003e.html#54 Reviving Multics
https://www.garlic.com/~lynn/2003e.html#55 Reviving Multics
https://www.garlic.com/~lynn/2003e.html#56 Reviving Multics
https://www.garlic.com/~lynn/2003e.html#60 Reviving Multics -- Computer Museum
https://www.garlic.com/~lynn/2003e.html#62 Reviving Multics -- Computer Museum
https://www.garlic.com/~lynn/2003e.html#63 Reviving Multics -- Computer Museum
https://www.garlic.com/~lynn/2003e.html#64 Reviving Multics -- Computer Museum
and some old posts mentioning various acorn related activities:
https://www.garlic.com/~lynn/2002g.html#79 Coulda, Woulda, Shoudda moments?
https://www.garlic.com/~lynn/2003c.html#31 difference between itanium and alpha
https://www.garlic.com/~lynn/2003d.html#9 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003d.html#19 PC history, was PDP10 and RISC
https://www.garlic.com/~lynn/2003e.html#16 unix
https://www.garlic.com/~lynn/2005q.html#24 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005r.html#8 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006k.html#48 Hey! Keep Your Hands Out Of My Abstraction Layer!
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: "25th Anniversary of the Personal Computer" Newsgroups: alt.folklore.computers Date: Tue, 15 Aug 2006 07:51:24 -0600Roland Hutchinson writes:
so they are somewhat getting around to natural language front ends
... however, old reference to somewhat larger 801 configuration; which
have since grown significantly larger than the ones mentioned here:
https://www.garlic.com/~lynn/95.html#13
on the other hand ... 801 cores have also morphed into the "game" personal computers.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: the personal data theft pandemic continues Newsgroups: bit.listserv.ibm-main Date: Tue, 15 Aug 2006 08:34:19 -0600ref:
various recent news articles involving security/data breaches and authentication technology.
part of the breach issue involves whether or not the leaked
information can result in fraud ... i.e. like authentication
replay-attacks (in the case of cloned magstripe or cloned yes cards)
... or possibly other infrastructure flaws that can result in things
like mitm-attacks
https://www.garlic.com/~lynn/subintegrity.html#mitm
Data breaches And Congress
http://www.internetnews.com/bus-news/article.php/3624536
Clock is ticking on data security bills
http://www.greensheet.com/PriorIssues-/060702-/5.htm
Consumer groups, banks battle over ID theft legislation
http://www.oxfordpress.com/business/content/shared/news/stories/IDENTITY_THEFT16_COX_W1718.html
Congress must pass strongest protection of consumer data
http://www.fortwayne.com/mld/newssentinel/news/editorial/15134762.htm
Federal bill may trump ID theft law; Lynch asks Congress to reject the
measure
http://www.concordmonitor.com/apps/pbcs.dll/article?AID=/20060727/REPOSITORY/607270344/1043/NEWS01
Recent Wave of Data Thefts Breeds Changes in IT Security Policy and
Legislation
http://www.techweb.com/showPressRelease.jhtml?articleID=X512630
FISMA Could Solve Data Security Issues
http://www.cioupdate.com/trends/article.php/3625756
Data Security | Deadline For Agencies To Secure Remote Data Comes--And
Goes
http://www.informationweek.com/internet/showArticle.jhtml?articleID=202804307
Keep from being the 'Breach of the Week'
http://news.zdnet.com/2100-1009_22-6105339.html
Security breaches steadily increasing
http://www.hackinthebox.org/modules.php?op=modload&name=News&file=article&sid=20957
UK's Biometric Passport OK, Dutch Passports Cracked in 2 Hours
http://www.dailytech.com/article.aspx?newsid=600
S'pore: Biometric passports are secure
http://www.zdnetasia.com/news/security/0,39044215,39390380,00.htm
Beijing ATMs to recognize your face
http://www.hackinthebox.org/modules.php?op=modload&name=News&file=article&sid=20962
Are we ready for biometric passports and ID cards?
http://www.thejakartapost.com/detaileditorial.asp?fileid=20060815.E03&irec=2
Industry group defends e-passports
http://www.theregister.com/2006/08/11/e-passports_defended/
High-tech passports fail to pass hacker's security test
http://www.smh.com.au/news/world/hightech-passports-fail-to-pass-hackers-security-test/2006/08/07/1154802823195.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: sorting Newsgroups: alt.folklore.computers Date: Tue, 15 Aug 2006 08:56:03 -0600jmfbahciv writes:
old story about VP testing phone circuit with his tongue ... and then
mandating that phone jacks on all modems had to be recessed so that
executives wouldn't get shocked when they went around sticking their
tongue in phone jacks:
https://www.garlic.com/~lynn/2002d.html#11 Security Proportional to Risk (was: IBM Mainframe at home)
https://www.garlic.com/~lynn/2003e.html#68 The Pentium 4 - RIP?
https://www.garlic.com/~lynn/2004j.html#26 Losing colonies
https://www.garlic.com/~lynn/2004q.html#57 high speed network, cross-over from sci.crypt
https://www.garlic.com/~lynn/2005r.html#12 Intel strikes back with a parallel x86 design
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Fate of VM - was: Re: Baby MVS??? Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 15 Aug 2006 12:31:35 -0600Mickey wrote:
it was major time-sharing, "personal computing", online interactive
offering platform ... both by commercial companies like idc, ncss,
tymshare, etc
https://www.garlic.com/~lynn/submain.html#timeshare
as well as the internal HONE system which provided interactive, personal
computing support for all field, sales, and marketing world wide.
https://www.garlic.com/~lynn/subtopic.html#hone
that role was taken over in the 80s with the appearance of individual computers for personal computing.
a few recent postings touching on various aspectst:
https://www.garlic.com/~lynn/2006n.html#6 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#8 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#10 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#13 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006n.html#29 CRAM, DataCell, and 3850
https://www.garlic.com/~lynn/2006n.html#44 Any resources on VLIW?
https://www.garlic.com/~lynn/2006n.html#45 sorting
https://www.garlic.com/~lynn/2006n.html#52 the more things change, the more things stay the same
https://www.garlic.com/~lynn/2006o.html#2 the more things change, the more things stay the same
https://www.garlic.com/~lynn/2006o.html#19 Source maintenance was Re: SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006o.html#21 Source maintenance was Re: SEQUENCE NUMBERS
https://www.garlic.com/~lynn/2006o.html#27 oops
https://www.garlic.com/~lynn/2006o.html#38 hardware virtualization slower than software?
https://www.garlic.com/~lynn/2006o.html#44 When Does Folklore Begin??
https://www.garlic.com/~lynn/2006o.html#45 "25th Anniversary of the Personal Computer"
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Tue, 15 Aug 2006 12:53:35 -0600Charles Richmond writes:
misc. past refs:
https://www.garlic.com/~lynn/2001g.html#7 New IBM history book out
https://www.garlic.com/~lynn/2002k.html#39 Vnet : Unbelievable
https://www.garlic.com/~lynn/2002o.html#73 They Got Mail: Not-So-Fond Farewells
https://www.garlic.com/~lynn/2002o.html#74 They Got Mail: Not-So-Fond Farewells
https://www.garlic.com/~lynn/2002o.html#75 They Got Mail: Not-So-Fond Farewells
https://www.garlic.com/~lynn/2004c.html#15 If there had been no MS-DOS
https://www.garlic.com/~lynn/2004l.html#28 Shipwrecks
https://www.garlic.com/~lynn/2004l.html#31 Shipwrecks
https://www.garlic.com/~lynn/2005c.html#50 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005u.html#41 Mainframe Applications and Records Keeping?
https://www.garlic.com/~lynn/2006n.html#26 sorting was: The System/360 Model 20 Wasn't As Bad As All That
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Fate of VM - was: Re: Baby MVS??? Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 15 Aug 2006 13:41:32 -0600Tom Marchant wrote:
then all during early vm370 .... developers were constantly being told that if they wanted a career, promotion, and/or raise ... they needed to move to hudson valley (pok or kingston) and work on a "real" system ... since the next release of vm370 was always going to be the last.
then in '76 they killed the vm development group in burlington (the development group had split off from the science center, absorbed the boston programming center, and when they outgrew space in 545 tech sq. ... moved out to the old service bureau corp. building in burlington mall) and told everybody that they needed to move to pok ... vm370 was being killed ... because mvs/xa wasn't going to meet its schedule and mvs/xa needed all the vm developers working on mvs/xa ... in order to try and meet schedule.
there was an episode where the shutdown was leaked to the people in burlington ... well before it was officially announced ... which resulted in a couple month witch hunt for who leaked the information (as well as lots of people looking for how they could stay in the area and not have to move). the guilty party was never identified.
endicott was eventually able to salvage part of the vm370 product development mission ... of course you saw some number of the burlington people staying in the area and going to work for dec (vax/vms) or to places like prime computer.
in the late 70s and early 80s ... there was a huge explosion in the number of vm machines in the mid-range market place ... 4341s competing against vax machines (which also saw a huge market explosion). this was before the mid-80s when the workstations and large PCs started taking over that market segment. the 4381 was being ramped up to continue the huge 4341 market explosion ... but by that time the workstations and PCs was starting to take over that market segment (other vendors in that market segment saw similar effects).
random past posts mentioning burlington mall location (and/or shutdown
of burlington mall so everybody could move to POK to help get mvs/xa
development back on track):
https://www.garlic.com/~lynn/94.html#2 Schedulers
https://www.garlic.com/~lynn/98.html#7 DOS is Stolen!
https://www.garlic.com/~lynn/99.html#179 S/360 history
https://www.garlic.com/~lynn/2000b.html#54 Multics dual-page-size scheme
https://www.garlic.com/~lynn/2000b.html#55 Multics dual-page-size scheme
https://www.garlic.com/~lynn/2001m.html#47 TSS/360
https://www.garlic.com/~lynn/2001m.html#49 TSS/360
https://www.garlic.com/~lynn/2001n.html#67 Hercules etc. IBM not just missing a great opportunity...
https://www.garlic.com/~lynn/2002e.html#27 moving on
https://www.garlic.com/~lynn/2002h.html#34 Computers in Science Fiction
https://www.garlic.com/~lynn/2002h.html#59 history of CMS
https://www.garlic.com/~lynn/2002j.html#17 CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002m.html#9 DOS history question
https://www.garlic.com/~lynn/2002o.html#78 Newsgroup cliques?
https://www.garlic.com/~lynn/2002p.html#14 Multics on emulated systems?
https://www.garlic.com/~lynn/2003c.html#0 Wanted: Weird Programming Language
https://www.garlic.com/~lynn/2003d.html#8 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003f.html#53 Alpha performance, why?
https://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
https://www.garlic.com/~lynn/2003h.html#34 chad... the unknown story
https://www.garlic.com/~lynn/2003k.html#0 VSPC
https://www.garlic.com/~lynn/2003k.html#55 S/360 IPL from 7 track tape
https://www.garlic.com/~lynn/2004.html#20 BASIC Language History?
https://www.garlic.com/~lynn/2004.html#32 BASIC Language History?
https://www.garlic.com/~lynn/2004c.html#47 IBM 360 memory
https://www.garlic.com/~lynn/2004d.html#42 REXX still going strong after 25 years
https://www.garlic.com/~lynn/2004e.html#37 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2004g.html#24 |d|i|g|i|t|a|l| questions
https://www.garlic.com/~lynn/2004g.html#35 network history (repeat, google may have gotten confused?)
https://www.garlic.com/~lynn/2004g.html#38 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004k.html#23 US fiscal policy (Was: Bob Bemer, Computer Pioneer,Father of
https://www.garlic.com/~lynn/2004m.html#6 a history question
https://www.garlic.com/~lynn/2004m.html#54 Shipwrecks
https://www.garlic.com/~lynn/2004n.html#7 RISCs too close to hardware?
https://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
https://www.garlic.com/~lynn/2005f.html#58 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2005h.html#37 Software for IBM 360/30
https://www.garlic.com/~lynn/2005j.html#25 IBM Plugs Big Iron to the College Crowd
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005p.html#0 Article: The True Value of Mainframe Security
https://www.garlic.com/~lynn/2005q.html#12 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005q.html#14 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005s.html#35 Filemode 7-9?
https://www.garlic.com/~lynn/2005s.html#36 Filemode 7-9?
https://www.garlic.com/~lynn/2006b.html#18 {SPAM?} Re: Expanded Storage
https://www.garlic.com/~lynn/2006j.html#44 virtual memory
https://www.garlic.com/~lynn/2006l.html#25 Mainframe Linux Mythbusting (Was: Using Java in batch on z/OS?)
https://www.garlic.com/~lynn/2006m.html#21 The very first text editor
https://www.garlic.com/~lynn/2006m.html#25 Mainframe Limericks
https://www.garlic.com/~lynn/2006m.html#28 Mainframe Limericks
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Fate of VM - was: Re: Baby MVS??? Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 15 Aug 2006 15:54:47 -0600Mickey wrote:
in the late 70s and early 80s ... there was joke about pulling 4shift
... working in sjr/28 1st shift ... there was the original
relational/sql implementation system/r
https://www.garlic.com/~lynn/submain.html#systemr
working across street in the disk engineering and product test labs 2nd
shift (bldg. 14 & 15),
https://www.garlic.com/~lynn/subtopic.html#disk
working down in stl (bldg. 90) 3rd shift
https://www.garlic.com/~lynn/subnetwork.html#hsdt
and then working up at hone on the weekend.
https://www.garlic.com/~lynn/subtopic.html#hone
i had helped build and support hone systems from the time it was on cp67
and then thru much of its life on vm370. much of hone services and
applications had been built in apl ... starting originally with cms\apl.
the cambridge science center
https://www.garlic.com/~lynn/subtopic.html#545tech
had ported apl\360 to cms (under cp67). apl\360 had its own multitasking monitor and terminal support ... which could be discarded under cms. apl\360 also supported its own swapping of 16kbyte (sometimes 32kbyte) real memory workspaces. This had to be completely reworked for the large virtual memory environment provided with cms. cms\apl also introduced mechanism for accessing operating system APIs (filesystem operations, etc ... which offended the apl purists). in aggregate, this allowed some major applications to be developed in cms\apl (which wasn't possible in the purely self-contained 16kbyte workspaces provided by apl\360).
HONE evolved a major APL-based delivery vehicle called SEQUOIA (itself a very large APL application) which attempted to isolate majority of (cms) computing infrastructure characteristics from the end-user. All HONE APL applications then had major requirements to implement SEQUOIA consistent characteristics and interfaces.
in the mid-70s, US HONE operations consolidated all their datacenters in northern california ... the new datacenter was across the back parking lot from the palo alto science center. palo alto science center had done the work for apl\cms (as opposed to the earlier work cambridge had done for cms\apl) and also the apl microcode assist for the 370/145.
HONE had its own equivalent of constant attempts to kill vm
https://www.garlic.com/~lynn/2006o.html#51 The Fate of VM - was: re: Baby MVS???
Especially during the late 70s and the 80s ... HONE would get a new executive every couple years. HONE was part of the marketing division and so the new executive typically came up through the marketing and sales ranks.
The corporation constantly had a sales/marketing theme that MVS was the solution to all computing requirements. That HONE was actually a vm370 based infrastructure was pretty well hidden from the world-wide field and marketing people. As a result, it frequently came as quite a shock to the new, incoming executive that HONE wasn't a mvs-based operation.
Then there ensued a period where the whole organization would be directed to drop nearly everything else and work on moving HONE operation to a mvs-based operation. Usually within 9-12 months, it would be thoroughly proven that it couldn't be done and things would sort of settle back to semi-normal ... at least until the next, new replacement executive came in (which happened about once every two years) and the process would be repeated. As a result, something like 1/3rd to 1/2 of HONE resources went into repeatedly proving to newly appointed executives that you couldn't use MVS for the HONE platform.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Fate of VM - was: Re: Baby MVS??? Newsgroups: bit.listserv.ibm-main,alt.folklore.computers,bit.listserv.vmesa-l Date: Tue, 15 Aug 2006 17:03:17 -0600re:
email from long ago and far away
Date: 11/04/82 22:45:27
To: wheeler
From: xxxxx
Subject: GENDMOD module
Could I ask you to get an assembly listing of the GENMOD module so I can
study it to determine what changes I have to make to VS APL. If we make
this change, it could have a tremendous impact on the HONE system, above
what their SEQUOIA system is giving them. There are several very large
APL applications on there .... particularly the configurators. If
users are sharing that code as well, we could get some big savings ...
not to mention the time savings in just loading the workspaces.
... snip ... top of post, old email index, HONE email
shared variables was eventually created as an alternative paradigm (to that originally implemented in cms\apl) for accessing system api/functions.
apl\cms and apl\sv eventaully evolved into vs apl.
the (cms) apl interpreter had been structured into code that could be
shared across all the virtual address spaces. however, HONE apl
operations had another couple hundred kbytes of commonly used apl
applications that appeared in nearly all workspaces
https://www.garlic.com/~lynn/subtopic.html#hone
i had originally done paged mapped filesystem for cms in the early 70s
along with a mechanism that allowed loading of objects from cms paged
mapped filesystem as memory objects shared across multiple virtual
address spaces.
https://www.garlic.com/~lynn/submain.html#mmap
one of the internal datacenters this was installed on was at HONE. HONE used it to create a "shared" executable image of the APL interpretor (under cms). I had modified the standard CMS executable creation command (GENMOD) and executable load command (LOADMOD) to add support for the shared executable object option (common r/o image shared across different virtual address spaces)
A small subset of the cp & cms memory mapped feature/function was released in vm/370 release 3 called DCSS.
However, the full function was in use at a number of internal datacenters, like HONE.
The issue in this particular email ... was that there were several large APL applications (like the HONE mega-application mentioned in the previous post, SEQUOIA). These "programs" were mostly static data that was "interpreted" by the APL interpreter (not directly executable code in the 370 sense). The idea here was to modify the APL workspace loader to play some of the same games that I had done in CMS GENMOD/LOADMOD ... so that static APL workspace applications could be loaded as shared memory objects (allowing a single common image to be used across all virtual address spaces). This could significantly cut both the aggregate HONE application real-storage requirements ... as well as I/Os involved in retrieving unique copies off disk for every HONE user.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Wed, 16 Aug 2006 12:55:05 -0600jmfbahciv writes:
Fastest-evolving human gene linked to brain boost
http://www.newscientist.com/article.ns?id=dn9767&feedId=online-news_rss20
Did Humans Evolve? No, Say Americans
http://science.slashdot.org/science/06/08/15/1845200.shtml
and the possibility of dealing with species that hasn't evolved.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: When Does Folklore Begin??? Newsgroups: alt.folklore.computers Date: Wed, 16 Aug 2006 14:16:55 -0600"Charlie Gibbs" writes:
misc. past posts mentioning boyd
https://www.garlic.com/~lynn/subboyd.html#boyd
and various URLs from around the web mentioning boyd
https://www.garlic.com/~lynn/subboyd.html#boyd2
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Greatest Software Ever Written? Newsgroups: alt.folklore.computers Date: Wed, 16 Aug 2006 17:24:33 -0600"Robert" writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Greatest Software Ever Written? Newsgroups: alt.folklore.computers Date: Wed, 16 Aug 2006 17:58:12 -0600Peter Flass writes:
how 'bout cp67 ... the original virtual machine implementation ... it has taken a little while ... but it seems to be really catching on now.
and as an aside footnote ... cp67 on 360/67 morphed into vm370
for 370 virtual memory machines ... and system/r implementation
https://www.garlic.com/~lynn/submain.html#systemr
was done on vm370 system.
recent vm thread:
https://www.garlic.com/~lynn/2006o.html#49 The Fate of VM - was: Re: Baby MVS???
https://www.garlic.com/~lynn/2006o.html#51 The Fate of VM - was: Re: Baby MVS???
https://www.garlic.com/~lynn/2006o.html#52 The Fate of VM - was: Re: Baby MVS???
https://www.garlic.com/~lynn/2006o.html#53 The Fate of VM - was: Re: Baby MVS???
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Greatest Software Ever Written? Newsgroups: alt.folklore.computers Date: Thu, 17 Aug 2006 16:47:56 -0600Roland Hutchinson writes:
a lot of public-key cryptography got side-tracked into PKI software
... the widest deployed is a typically something of a subset called
SSL or HTTPS ... for which we coined the term certificate
manufacturing ... to help highlight the difference. this was back
in the days when we were working with this small client/server startup
in the valley that wanted to do payment transaction on their server
... a past discussion
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
and a more recent comment on its application to what became called
e-commerce (and some of the current vulnerabilities in the way that
it is being used now):
https://www.garlic.com/~lynn/aadsm25.htm#17 Hamiltonian path as protection against DOS
https://www.garlic.com/~lynn/aadsm25.htm#19 Hamiltonian path as protection against DOS
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Why no double wide compare and swap on Sparc? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 18 Aug 2006 06:05:05 -0600"Chris Thomasson" writes:
the trick then was to come up with a mnemonic that matched Charlie' initials, CAS.
the attempt was then made to get the instruction into the up and coming 370 architecture. working with ron smith in the pok 370 architecture group (they owned the 370 architecture "red book"), the response was that 370 didn't need another multiprocessor specific instruction, that the test and set from 360 was sufficient.
to get compare and swap into the 370 architecture we had to come up with usage for compare&swap that wasn't multiprocessor specific. thus was born some number of examples that were applicable to multi-threaded applications that might be running enabled for interrupts ... independent of whether the machine was single processor or multiprocessor.
originally in the 370 principles of operation, the examples were part of the programming notes that were part of the compare&swap instruction. in subsequent version of the principles of operation the examples were moved to a section in the appendix.
also as part of this activity, compare&swap double instruction was added in addition to compar&swap. that resulted in two instructions for 370, compare&swap along with compare&swap double ... so the instruction mnemonics become CS and CDS (instead of CAS ... defeating the original objective of coming up with instruction name compare&swap).
total topic drift ... science center was like that ... GML
https://www.garlic.com/~lynn/submain.html#sgml
precursor to SGML, HTML, XML, etc ... also invented at the science center, actually are the first initials of the last name of the three inventors (and you probably thot it stood for generalized markup language).
misc. past posts on multiprocessor support and/or compare&swap
instruction
https://www.garlic.com/~lynn/subtopic.html#smp
esa/390 principles of operation appendix for multiprogramming
(i.e. multithread) and multiprocessing
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9AR004/A.6?SHELF=EZ2HW125&DT=19970613131822
cs & cds appendix:
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9AR004/A.6.2?SHELF=EZ2HW125&DT=19970613131822
bypassing post and wait
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9AR004/A.6.3?SHELF=EZ2HW125&DT=19970613131822
lock/unlock:
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9AR004/A.6.4?SHELF=EZ2HW125&DT=19970613131822
free pool manipulation
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9AR004/A.6.5?SHELF=EZ2HW125&DT=19970613131822
and more recent z/architecture (64-bit) principles of operation
multiprogramming and multiprocessing examples appendix
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/A.6?SHELF=DZ9ZBK03&DT=20040504121320
note that the above also includes discussion of the newer PLO ...perform lock operation instruction
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Greatest Software? Newsgroups: bit.listserv.ibm-main Date: Fri, 18 Aug 2006 08:18:00 -0600Timothy Sipples wrote:
a couple of my comments from that thread:
https://www.garlic.com/~lynn/2006o.html#56 Greatest Software Ever Written?
https://www.garlic.com/~lynn/2006o.html#57 Greatest Software Ever Written?
https://www.garlic.com/~lynn/2006o.html#58 Greatest Software Ever Written?
as to "worms", in a.f.c. somebody suggested christmas exec on bitnet
(lots of academic vm systems, with misc. other stuff) ... which
preceeded morris worm by a year. misc. past bitnet and/or earn (european
equivalent) posts:
https://www.garlic.com/~lynn/subnetwork.html#bitnet
as i've commented before, the internal network ... vast majority vm
systems for a variety of reasons
https://www.garlic.com/~lynn/subnetwork.html#internalnet
was larger than the arpanet/internet from just about the beginning until around the summer of 85. furthermore, while the internal network and bitnet/earn used similar technologies ... the calculated size of the two networks were totally separate (I believe that even bitnet/earn may have had more nodes than internet for some period).
almost total serendipity there is a similar current thread in comp.arch n.g. called "admired designs / designs to study" .... a little x-post from the original post in that thread (by Mark Smotherman):
#1 - admired designs It's been five years since I asked a group of computer architects about the designs that they admired:... snip ...
https://people.computing.clemson.edu/~mark/admired_designs.html The list of admired designs is: 6502 CDC-6600 and 7600 Cray-1, -2, -4 Cray X-MP and Cray Y-MP GE-645 (Multics) IAS IBM Stretch IBM 1401 IBM 1570 (not marketed) IBM 7040 and 7090 IBM S/360 and S/370 IBM S/360 Model 91 IBM ACS IBM America (RS/6000) Intel x86 LC-2 MIPS Multiflow PDP-11 and a list of some designs which might serve as a source of counterexamples is: CDC-8600 IBM Stretch (on both lists) NS-32016 (16032) VAX-11
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Health Care Newsgroups: alt.folklore.computers Date: Fri, 18 Aug 2006 13:30:41 -0600John Ahlstrom writes:
I had watched the speech on cspan (8apr2006)
http://www.gao.gov/cghome/nat408/index.html America's Fiscal Future
comptroller general's url
http://www.gao.gov/cghome/
misc. pieces from the previous posts:
... the comptroller general talk had something about there being enormous
increases in gov. spending as a percent of gnp over the past 50 years
... however the defense budget as percent of gnp is the same as it was
50 years ago
... snip ...
... where some numbers are provided. For one set of numbers he made
some comment that some of the numbers (from congressional budget
office) were extremely conservative based on four assumptions. He read
off each assumption and asked people in the audience (meeting of
state governors) to raise their hand if they believed the assumption
was valid (nobody raised their hand for any one of the assumptions).
The point was the probable financial impact would be significantly
more severe (assuming any set of realistic assumptions).
He repeatedly made the point that he believed that nobody in congress
has been capable of even simple school math for at least the past 50
years.
... snip ...
... the talk mentioned that there is a problem that most economic
policies have poor metrics, instrumentation and audits to be able to
check whether they have actually accomplished anything at all in
addressing/meeting the stated objectives.
... snip ...
i caught bits & pieces of discussion last night about directed
appropriations ... I think I heard that one transportation bill had
something like 3000 amendments for directed appropriations and
something like $26B was involved (I may have gotten it wrong ... the
number of directed appropriation amendments may have been spread over
a larger number of bills ... but mostly they supposedly had little or
nothing to do with transportation).
... snip ...
One of the comments the comptroller general made during the talk was
that there is a $160k/person (every man, woman, child, and baby)
fed. program liability in the US for various obligations. The extract
(in this earlier thread) explains how the bailout of the S&L industry
is being carried off-books, since it represents a $100k/person
liability. It wasn't clear in the comptroller general's speech whether
his figure of $160k/person included the S&L $100k/person bailout
obligation or was in addition to the S&L bailout obligation.
... snip ...
the following has reference to the S&L bailout
https://www.garlic.com/~lynn/aepay3.htm#riskm The Thread Between Risk Management and Information Security
and from (note that the numbers are in TRILLIONS):
http://www.gao.gov/cghome/nat408/408natlconfstatelegis.txt
Estimated Fiscal Exposures (in $ trillions): Explicit liabilities (Publicly held debt, military & civilian pensions & retiree health, other); 2000: $6.9; 2005: $9.9. Commitments & Contingencies: e.g., PBGC, undelivered orders; 2000: $0.5; 2005: $0.9. Implicit exposures; 2000: $13.0; 2005: $35.6. Implicit exposures: Future Social Security benefits; 2000: $3.8; 2005: $5.7. Implicit exposures: Future Medicare Part A benefits; 2000: $2.7; 2005: $8.8. Implicit exposures: Medicare Part B benefits; 2000: $6.5; 2005: $12.4. Implicit exposures: Medicare Part D benefits; 2005: $8.7. Total; 2000: $20.4; 2005: $46.4. How Big is Our Growing Fiscal Burden? Total Fiscal Exposures; 2000: $20.4 trillion; 2005: $46.4 trillion; Burden: Per Person; 2000: $72,000; 2005: $156,000. Burden: Per Full-time Worker; 2000: $165,000; 2005: $375,000. Burden: Per Household; 2000: $189,000; 2005: $411,000.... snip ...
Social Security, Medicare, and Medicaid Spending as a Percent of GDP: .... 2080: Total value: 25.23% of GDP. Medicare value: 13.85% of GDP, which is 54.9% of 2080 spending. Medicaid value: 4.75% of GDP, which is 18.8% of 2080 spending. Social Security value: 6.63% of GDP, which is 26.3% of 2080 spending. Note: Social Security and Medicare projections based on the intermediate assumptions of the 2005 Trustees' Reports. Medicaid projections based on CBO's January 2006 short-term Medicaid estimates and CBO's December 2005 long-term Medicaid projections under mid-range assumptions. Source: GAO analysis based on data from the Office of the Chief Actuary, Social Security Administration, Office of the Actuary, Centers for Medicare and Medicaid Services, and the Congressional Budget Office.... snip ...
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Greatest Software, System R Newsgroups: alt.folklore.computers Date: Tue, 22 Aug 2006 1:28 PMBrian Inglis wrote:
i had done a lot with os/360 as an undergraduate .... and then visited pok quite a bit during the days of building original prototype of vs2 ... i.e. adding virtual memory to a mvt platform.
I've noted in the past that a lot of SNA was continuation of major
motivation behind FS
https://www.garlic.com/~lynn/submain.html#futuresys
some specific quotes with respect to FS (which also includes a stray
system/r reference):
https://www.garlic.com/~lynn/2000f.html#16
i.e. countermeasure to clone control units. as undergraduate i was
involved in building a telecommunication control unit ... which got
written up as origins of clone control unit
https://www.garlic.com/~lynn/submain.html#360pcm
my wife did somewhat antagonize the SNA group when she co-authored AWP39 ... peer-to-peer networking ... as opposed to sna which primarily involved (centralized) controlling (large numbers of) terminals (or terminal emulation devices, settop boxes, atm cash machines, etc).
my wife also had her problems with the SNA group when she took the job
in POK in charge of loosely-coupled architecture and developed
Peer-Coupled Shared Data architecture
https://www.garlic.com/~lynn/submain.html#shareddata
SNA group then was behind "SAA" which had a large component in trying
to contain emerging client/server and maintain the PC terminal
emulation paradigm.
https://www.garlic.com/~lynn/subnetwork.html#emulation
Unfortunately in the heyday of SAA we had come up with 3-tier
architecture and out presenting it to customer executives (for which
we took a bit of heat)
https://www.garlic.com/~lynn/subnetwork.html#3tier
the foundation for 3-tier architecture and whole middleware architecture stuff, my wife had originally layed out when she co-authored a response to a large federal RFP for large, secure, reliable, enterprise networking and distributed infrastructure.
as an aside, was able to use some amount of the system/r experience
later when doing ha/cmp product
https://www.garlic.com/~lynn/subtopic.html#hacmp
and the distributed lock manager for cluster scale-up operation ...
including parallel database operation ... a few recent posts mentioning
distributed lock manager work:
https://www.garlic.com/~lynn/2006c.html#8 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#41 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006j.html#20 virtual memory
https://www.garlic.com/~lynn/2006o.html#24 computational model of transactions
https://www.garlic.com/~lynn/2006o.html#32 When Does Folklore Begin???
https://www.garlic.com/~lynn/2006o.html#33 When Does Folklore Begin???
old post mentioning some of the cluster scale-up stuff
https://www.garlic.com/~lynn/95.html#13
random past posts referencing AWP39
https://www.garlic.com/~lynn/2004n.html#38 RS/6000 in Sysplex Environment
https://www.garlic.com/~lynn/2004p.html#31 IBM 3705 and UC.5
https://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
https://www.garlic.com/~lynn/2005p.html#15 DUMP Datasets and SMS
https://www.garlic.com/~lynn/2005p.html#17 DUMP Datasets and SMS
https://www.garlic.com/~lynn/2005q.html#27 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2005u.html#23 Channel Distances
https://www.garlic.com/~lynn/2006h.html#52 Need Help defining an AS400 with an IP address to the mainframe
https://www.garlic.com/~lynn/2006j.html#31 virtual memory
https://www.garlic.com/~lynn/2006k.html#9 Arpa address
https://www.garlic.com/~lynn/2006k.html#21 Sending CONSOLE/SYSLOG To Off-Mainframe Server
https://www.garlic.com/~lynn/2006l.html#4 Google Architecture
https://www.garlic.com/~lynn/2006l.html#45 Mainframe Linux Mythbusting (Was: Using Java in batch on z/OS?)
random past posts mentioning early vs2 prototyp work ... essentially adding virtual memory support to MVT:
https://www.garlic.com/~lynn/2000c.html#34 What level of computer is needed for a computer to Love?
https://www.garlic.com/~lynn/2001b.html#18 Linux IA-64 interrupts [was Re: Itanium benchmarks ...]
https://www.garlic.com/~lynn/2001i.html#37 IBM OS Timeline?
https://www.garlic.com/~lynn/2001i.html#38 IBM OS Timeline?
https://www.garlic.com/~lynn/2001l.html#36 History
https://www.garlic.com/~lynn/2002c.html#39 VAX, M68K complex instructions (was Re: Did Intel Bite Off More Than It Can Chew?)
https://www.garlic.com/~lynn/2002d.html#31 2 questions: diag 68 and calling convention
https://www.garlic.com/~lynn/2002g.html#61 GE 625/635 Reference + Smart Hardware
https://www.garlic.com/~lynn/2002j.html#70 hone acronym (cross post)
https://www.garlic.com/~lynn/2002l.html#65 The problem with installable operating systems
https://www.garlic.com/~lynn/2002l.html#67 The problem with installable operating systems
https://www.garlic.com/~lynn/2002n.html#62 PLX
https://www.garlic.com/~lynn/2002p.html#49 Linux paging
https://www.garlic.com/~lynn/2002p.html#51 Linux paging
https://www.garlic.com/~lynn/2003.html#60 MIDAS
https://www.garlic.com/~lynn/2003b.html#0 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003g.html#13 Page Table - per OS/Process
https://www.garlic.com/~lynn/2003g.html#14 Page Table - per OS/Process
https://www.garlic.com/~lynn/2003k.html#27 Microkernels are not "all or nothing". Re: Multics Concepts For
https://www.garlic.com/~lynn/2004.html#18 virtual-machine theory
https://www.garlic.com/~lynn/2004c.html#59 real multi-tasking, multi-programming
https://www.garlic.com/~lynn/2004d.html#0 IBM 360 memory
https://www.garlic.com/~lynn/2004e.html#40 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#50 Chained I/O's
https://www.garlic.com/~lynn/2004m.html#16 computer industry scenairo before the invention of the PC?
https://www.garlic.com/~lynn/2004n.html#26 PCIe as a chip-to-chip interconnect
https://www.garlic.com/~lynn/2004n.html#54 CKD Disks?
https://www.garlic.com/~lynn/2004o.html#57 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005b.html#23 360 DIAGNOSE
https://www.garlic.com/~lynn/2005b.html#49 The mid-seventies SHARE survey
https://www.garlic.com/~lynn/2005b.html#50 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005f.html#45 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005f.html#47 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005j.html#17 Performance and Capacity Planning
https://www.garlic.com/~lynn/2005p.html#18 address space
https://www.garlic.com/~lynn/2005p.html#45 HASP/ASP JES/JES2/JES3
https://www.garlic.com/~lynn/2005q.html#41 Instruction Set Enhancement Idea
https://www.garlic.com/~lynn/2005s.html#25 MVCIN instruction
https://www.garlic.com/~lynn/2005t.html#7 2nd level install - duplicate volsers
https://www.garlic.com/~lynn/2006.html#31 Is VIO mandatory?
https://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory?
https://www.garlic.com/~lynn/2006b.html#25 Multiple address spaces
https://www.garlic.com/~lynn/2006f.html#5 3380-3390 Conversion - DISAPPOINTMENT
https://www.garlic.com/~lynn/2006i.html#33 virtual memory
https://www.garlic.com/~lynn/2006j.html#5 virtual memory
https://www.garlic.com/~lynn/2006j.html#27 virtual memory
https://www.garlic.com/~lynn/2006m.html#25 Mainframe Limericks
https://www.garlic.com/~lynn/2006o.html#27 oops
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Greatest Software, System R Newsgroups: alt.folklore.computers Date: Tue, 22 Aug 2006 6:13 pmi've commented before that we when we were asked to work with a small client/server startup that wanted to do payments on their server
and ran into two of the people in charge of something the startup
called the commerce server ... had been in the following meeting
previously mentioned here
https://www.garlic.com/~lynn/95.html#13
... and that the results has since been come to be known as e-commerce.
i've also commented in the past that one of the other people in the
same meeting
https://www.garlic.com/~lynn/95.html#13
had commented that he had been the primary catcher in STL for technology transfer of sql/ds from endicott to stl for (mainframe) DB2.
somewhat unrelated story is that one of the main people that had been in Endicott for the technology transfer of system/r from sjr to endicott for sql/ds ... had reached some corporate anniversity (35?) a few years ago ... and his management wanted some stuff from his career. for my contribution i dug up a dozen or so emails (from some archive) that were exchanged with him concerning the sjr to endicott system/r technology transfer activity (for sql/ds)
and as before ... misc. system/r related postings:
https://www.garlic.com/~lynn/submain.html#systemr
From: lynn@garlic.com Subject: Re: The Fate of VM - was: Re: Baby MVS??? Date: Tue, 22 Aug 2006 17:10:17 -0700 Newsgroups: bit.listserv.ibm-main,alt.folklore.computersre:
for even more drift related to page mapped filesystem related to doing zero copy i/o operations
one of the things i did for cms paged map filesystem (starting in the
early 70s)
https://www.garlic.com/~lynn/submain.html#mmap
was putting a lot of effort into avoiding moving things around ...
directly mapping pages. there were numerous challenges ... one was when
i was did the internal backup/archive system ... i had to do some
tricks so that backup of images on disk to tape and thre restore of
blocks from tape to disk .... would be done with zero copies (i.e. the
tape i/o operations directly specified the address of the page mapped
images). this package went thru some amount of evoluation ...
eventually being released as a product called workstation datasave ...
which then morphed into adsm (adstar storage manager) and subsequently
renamed tsm (tivoli backup system)
https://www.garlic.com/~lynn/submain.html#backup
then when doing performance speedups for our high-speed backbone
project in the early 80s
https://www.garlic.com/~lynn/subnetwork.html#hsdt
i was faced with similar opportunity ... not only wanting to do zero copy network i/o ... but also when page mapped disk objects do it directly using the page mapped addresses. played some games with some of the page mapped optimization and the network i/o operations ... was to come as close as possible to streaming data from/to disk thru mainframe memory involving network i/o ... with the absolute minimum of intermediate processing (including any kind of data copy/movement).
for a whole lot of topic drift, a side reference is recent comment
about also having to do rate-based pacing as part of hsdt ...
https://www.garlic.com/~lynn/aadsm25.htm#19
the above also mentions xtp which was also looking at pipelining and
zero buffer copies (in addition to rate-based pacing)
https://www.garlic.com/~lynn/aadsm25.htm#17
some postings mentioning scatter/gather and/or zero copy
https://www.garlic.com/~lynn/2001k.html#62 SMP idea for the future
https://www.garlic.com/~lynn/2002l.html#36 Do any architectures use instruction count instead of timer
https://www.garlic.com/~lynn/2001n.html#92 "blocking factors" (Was: Tapes)
https://www.garlic.com/~lynn/2002d.html#51 Hardest Mistake in Comp Arch to Fix
https://www.garlic.com/~lynn/2002d.html#52 Hardest Mistake in Comp Arch to Fix
https://www.garlic.com/~lynn/2002e.html#21 Crazy idea: has it been done?
https://www.garlic.com/~lynn/2002g.html#5 Black magic in POWER5
https://www.garlic.com/~lynn/2004e.html#35 The attack of the killer mainframes
https://www.garlic.com/~lynn/2004e.html#41 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004f.html#16 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004g.html#50 Chained I/O's
https://www.garlic.com/~lynn/2004k.html#29 CDC STAR-100
https://www.garlic.com/~lynn/2005j.html#51 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005m.html#46 IBM's mini computers--lack thereof
https://www.garlic.com/~lynn/2006.html#6 UDP and IP Addresses
including pieces of the internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet
as part of hsdt effort required modifying various components of its implementation. part of that implementation involved the vm370 spool file system as intermediate repository for store&forward. to fix some those problems required reimplementing the vm370 spool file systems with lots of enhancements and allowing pieces of infrastructure supporting page mapped filesystem .... allowing read-ahead, write-behind, contiguous block allocation, consistency checkpointing, multi-block operation, and page mapped/align data doing zero block/page copies between the spool file i/o operations and the network information i/o operation.
as an aside ... hsdt also involved doing things like rfc 1044
implementation in the mainframe tcp/ip product (the base product would
burn a 3090 processor getting 44kbyte/sec sustained, after some tuning
at cray research between a cray and 4341-clone, the 1044 support would
sustain 1mbyte/sec using only a modest amount of the 4341 processor)
https://www.garlic.com/~lynn/subnetwork.html#1044
misc. past postings mention spool file rewrite (in support of hsdt
work)
https://www.garlic.com/~lynn/2000b.html#43 Migrating pages from a paging device (was Re: removal of paging device)
https://www.garlic.com/~lynn/2002b.html#44 PDP-10 Archive migration plan
https://www.garlic.com/~lynn/2003b.html#33 dasd full cylinder transfer (long post warning)
https://www.garlic.com/~lynn/2003b.html#44 filesystem structure, was tape format (long post)
https://www.garlic.com/~lynn/2003b.html#46 internal network drift (was filesystem structure)
https://www.garlic.com/~lynn/2003g.html#27 SYSPROF and the 190 disk
https://www.garlic.com/~lynn/2003k.html#26 Microkernels are not "all or nothing". Re: Multics Concepts For
https://www.garlic.com/~lynn/2003k.html#63 SPXTAPE status from REXX
https://www.garlic.com/~lynn/2004g.html#19 HERCULES
https://www.garlic.com/~lynn/2004m.html#33 Shipwrecks
https://www.garlic.com/~lynn/2004p.html#3 History of C
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005j.html#58 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005n.html#36 Code density and performance?
https://www.garlic.com/~lynn/2005s.html#28 MVCIN instruction
https://www.garlic.com/~lynn/2005s.html#46 Various kinds of System reloads
https://www.garlic.com/~lynn/2005s.html#50 Various kinds of System reloads
https://www.garlic.com/~lynn/2006.html#35 Charging Time
https://www.garlic.com/~lynn/2006e.html#36 The Pankian Metaphor
https://www.garlic.com/~lynn/2006k.html#51 other cp/cms history
From: lynn@garlic.com Date: Tue, 22 Aug 2006 17:49:01 -0700 Subject: Re: "25th Anniversary of the Personal Computer" Newsgroups: alt.folklore.computersBrian Inglis wrote:
the issue was possibly starting sometime around the mid-70s ... it was becoming more and more critical to use the increasing available real storage resources to compensate for the inability of disk performance to track the rest of the system thruput
basically the increase in the number of users increased proportional to
disk thruput ... and not cpu or real storage resources (i.e. went from
104 pageable pages to approx. 7000 pageable pages)
https://www.garlic.com/~lynn/93.html#31 Big I/O or Kicking the Mainframe out the Door
https://www.garlic.com/~lynn/94.html#43 Bloat, elegance, simplicity and other irrelevant concepts
https://www.garlic.com/~lynn/94.html#55 How Do the Old Mainframes Compare to Today's Micros?
https://www.garlic.com/~lynn/95.html#10 Virtual Memory (A return to the past?)
https://www.garlic.com/~lynn/98.html#46 The god old days(???)
https://www.garlic.com/~lynn/99.html#4 IBM S/360
https://www.garlic.com/~lynn/2001d.html#66 Pentium 4 Prefetch engine?
https://www.garlic.com/~lynn/2001f.html#62 any 70's era supercomputers that ran as slow as today's supercomputers?
https://www.garlic.com/~lynn/2001l.html#40 MVS History (all parts)
https://www.garlic.com/~lynn/2001l.html#61 MVS History (all parts)
https://www.garlic.com/~lynn/2001m.html#23 Smallest Storage Capacity Hard Disk?
https://www.garlic.com/~lynn/2002.html#5 index searching
https://www.garlic.com/~lynn/2002b.html#11 Microcode? (& index searching)
https://www.garlic.com/~lynn/2002b.html#20 index searching
https://www.garlic.com/~lynn/2002e.html#8 What are some impressive page rates?
https://www.garlic.com/~lynn/2002e.html#9 What are some impressive page rates?
https://www.garlic.com/~lynn/2002i.html#16 AS/400 and MVS - clarification please
https://www.garlic.com/~lynn/2003i.html#33 Fix the shuttle or fly it unmanned
https://www.garlic.com/~lynn/2004n.html#22 Shipwrecks
https://www.garlic.com/~lynn/2004p.html#39 100% CPU is not always bad
https://www.garlic.com/~lynn/2005h.html#13 Today's mainframe--anything to new?
https://www.garlic.com/~lynn/2005k.html#53 Performance and Capacity Planning
https://www.garlic.com/~lynn/2006m.html#32 Old Hashing Routine
https://www.garlic.com/~lynn/2006o.html#27 oops
From: lynn@garlic.com Subject: Re: "25th Anniversary of the Personal Computer" Date: Tue, 22 Aug 2006 22:03:35 -0700 Newsgroups: alt.folklore.computersmisc. old rumors from the archives ...
i paid significantly more than that for mine ... and employee orders took so long to fulfill ... that a couple days after mine arrived, they dropped the (list) price to a little less than what i was charged.
From: lynn@garlic.com Subject: How the Pentium Fell Short of a 360/195 Date: Wed, Aug 23 2006 6:47 pm Newsgroups: alt.folklore.computers, comp.arch.arithmeticSteve Richfie1d wrote:
and previous post in the thread
https://www.garlic.com/~lynn/2006e.html#0 About TLB in lower-level caches
for part of the above reference ... i had to go to the wayback machine
https://web.archive.org/web/20021226021851/www.hpl.hp.com/news/2001/apr-jun/2worley.html
but one of the other references in the above (among other comments) is still the original:
Inventing Itanium: How HP Labs Helped Create the Next-Generation Chip
Architecture
https://web.archive.org/web/20051031092309/http://www.hpl.hp.com/news/2001/apr-jun/itanium.html
From: lynn@garlic.com Subject: Re: DASD Response Time (on antique 3390?) Date: Wed, 23 Aug 2006 19:55:37 -0700 Newsgroups: bit.listserv.ibm-main, alt.folklore.computersDavid Day wrote:
recent post regarding number of users supported by vm370 on old 32mbyte
3081 system
https://www.garlic.com/~lynn/2006o.html#65 "25th Anniversary of the Personal Computer"
i had written an analysis that disk relative system thruput had declined by an order of magnitude over a 10-15 year period ... or otherwise the 3081 system could have supported on the order of 3000 users ... i.e. the number of users supported actually increased proportional to the increase in disk thruput ... not cpu or memory resources. initially the disk division performance group was assigned to refute my statements ... however, after several weeks, they came back and observed that i had slightly understated the problem. they eventually turned the analysis around into share presentation on how to configure disks and system to improve thruput (somewhat implicit implication that it was compensation for disk thruput bottleneck).
from long ago and far away:
SHARE 63 Presentation B874
Acknowledgments
This review makes liberal use of the computer science literature. As
usual, the views expressed in this report are those of the
author. Many contributed facts and ideas, but the selection and
presentation are the author's responsibility, including any mistakes.
I am especially indebted to Lynn Wheeler for pointing out how the
relative speeds of things have changed over the years, to Brian
J. Smith for helping me through many of the intricacies of attachment
modeling, to Bill O'Brien for suggesting this review, and to my
manager, Steve Goldstein, for his patient support throughout these
activities.
... snip ...
somewhat related to that there was general trend thru-out the last half of the 70s with the increasing use of electronic storage to compensate for disk thruput bottleneck.
we had done some kernel hooks to capture record numbers from disk accesses for modeling things like file activity caching. this was installed in a variety of different systems in the san jose area ... some interactive online systems .... some much more commercial batch oriented. the traces were then run thru model of various kinds of caching configurations and strategies. one of the results was for a fixed amount of electronic storage ... and all other factors being equal .... a single global system file cache always provided better performance than subdividing the electronic storage into channel, controller, and/or drive caches.
you do find electronic storage in controllers and/or other places .... in addition to use of system memory for global system cache ... possibly because there are different kinds of memory technology being used in the different locations (invalidating the model assumption regarding all other things being equal, possibly things like controller memory being less expensive than global system memory). another scenario is that there have deficiencies shown up in some of the global system management strategies ... which can be compensated for by having (less efficient) partitioned management of the resources.
on of the other thing that the detailed i/o record traces started to show up was that some amount of activity had periodic clustering .... i.e. collections of files tended to be used together on periodic basis ... one any specific member of the collection was accessed, others in the collection tended to be used also.
somewhat related recent post regarding doing i/o with zero buffer
copies
https://www.garlic.com/~lynn/2006o.html#64 The Fate of VM - was: Re: Baby MVS???
some past post mentioning the record traces and cache modeling work
https://www.garlic.com/~lynn/99.html#104 Fixed Head Drive (Was: Re:Power distribution (Was: Re: A primeval C compiler)
https://www.garlic.com/~lynn/99.html#105 Fixed Head Drive (Was: Re:Power distribution (Was: Re: A primeval C compiler)
https://www.garlic.com/~lynn/2000d.html#11 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2001l.html#55 mainframe question
https://www.garlic.com/~lynn/2004i.html#0 Hard disk architecture: are outer cylinders still faster than
https://www.garlic.com/~lynn/2004q.html#76 Athlon cache question
https://www.garlic.com/~lynn/2005.html#2 Athlon cache question
https://www.garlic.com/~lynn/2005m.html#28 IBM's mini computers--lack thereof
https://www.garlic.com/~lynn/2005n.html#23 Code density and performance?
https://www.garlic.com/~lynn/2006b.html#14 Expanded Storage
https://www.garlic.com/~lynn/2006f.html#0 using 3390 mod-9s
https://www.garlic.com/~lynn/2006i.html#36 virtual memory
https://www.garlic.com/~lynn/2006j.html#14 virtual memory