From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 10 worst PCs Newsgroups: alt.folklore.computers Date: Tue, 27 Mar 2007 14:00:47 -0600bv@wjv.com (Bill Vermillion) writes:
Rick Adams' history page
http://www.rickadams.org/adventure/a_history.html
some old email trying to track down the port to CMS
https://www.garlic.com/~lynn/2006y.html#email780405 780405
https://www.garlic.com/~lynn/2006y.html#email780405b 780405
i.e. somebody (at tymshare?) had ported the fortran version to CMS.
old post that has mention of "microsoft version of adventure"
https://www.garlic.com/~lynn/2000d.html#33 Adventure Games (Was: Navy orders supercomputer)
other old posts/threads mentioning adventure
https://www.garlic.com/~lynn/99.html#169 Crowther (pre-Woods) "Colossal Cave"
https://www.garlic.com/~lynn/2001m.html#44 Call for folklore - was Re: So it's cyclical.
https://www.garlic.com/~lynn/2002d.html#12 Mainframers: Take back the light (spotlight, that is)
https://www.garlic.com/~lynn/2003f.html#46 Any DEC 340 Display System Doco ?
https://www.garlic.com/~lynn/2003i.html#69 IBM system 370
https://www.garlic.com/~lynn/2003l.html#40 The real history of computer architecture: the short form
https://www.garlic.com/~lynn/2004c.html#34 Playing games in mainframe
https://www.garlic.com/~lynn/2004g.html#49 Adventure game (was:PL/? History (was Hercules))
https://www.garlic.com/~lynn/2004g.html#57 Adventure game (was:PL/? History (was Hercules))
https://www.garlic.com/~lynn/2004h.html#0 Adventure game (was:PL/? History (was Hercules))
https://www.garlic.com/~lynn/2004h.html#1 Adventure game (was:PL/? History (was Hercules))
https://www.garlic.com/~lynn/2004h.html#2 Adventure game (was:PL/? History (was Hercules))
https://www.garlic.com/~lynn/2004h.html#4 Adventure game (was:PL/? History (was Hercules))
https://www.garlic.com/~lynn/2004k.html#56 Xah Lee's Unixism
https://www.garlic.com/~lynn/2004m.html#20 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2005c.html#45 History of performance counters
https://www.garlic.com/~lynn/2005h.html#38 Systems Programming for 8 Year-olds
https://www.garlic.com/~lynn/2005k.html#18 Question about Dungeon game on the PDP
https://www.garlic.com/~lynn/2005l.html#16 Newsgroups (Was Another OS/390 to z/OS 1.4 migration
https://www.garlic.com/~lynn/2005u.html#15 Fast action games on System/360+?
https://www.garlic.com/~lynn/2005u.html#25 Fast action games on System/360+?
https://www.garlic.com/~lynn/2005u.html#28 Fast action games on System/360+?
https://www.garlic.com/~lynn/2006n.html#3 Not Your Dad's Mainframe: Little Iron
https://www.garlic.com/~lynn/2006y.html#18 The History of Computer Role-Playing Games
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 27 Mar 2007 16:54:24 -0600Peter Flass <Peter_Flass@Yahoo.com> writes:
couple old posts mentioning yale iup
https://www.garlic.com/~lynn/2002j.html#36 Difference between Unix and Linux?
https://www.garlic.com/~lynn/2003e.html#43 IBM 3174
other (recent) mention of series/1
https://www.garlic.com/~lynn/2007f.html#80 The Perfect Computer - 36 bits?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Wed, 28 Mar 2007 08:08:47 -0600nmm1@cus.cam.ac.uk (Nick Maclaren) writes:
official system for series/1 was RPS ... quite heavyweight ... there were jokes that some of the people that transferred from IBM Kingston to Boca were trying to re-invent OS/360 MFT.
EDX was much more lightweight system coming out of research physicists for doing instrument automation. no sna orientation. the closest that it might have to sna ... was a very early (actually pre sna) battle to try and get the series/1 (peachtree) engine used for 3705 controllers (peachtree was much more capable processor than what actually got selected for 3705).
yale iup was pure (full-duplex) ascii terminal emulation going into mainframe ... with no hint of sna. one of the target markets was mainframe unix.
the palo alto science center also first did port of UCLA's Locus to some 68000 processors and series/1. Later Locus was ported to mainframe and PS2s ... and sold as aix/360 and aix/ps2.
recent series/1 post with wiki reference that talks about use for GM
manufacturing (i have vaque recollection of something called MAP
protocol?) and extensive deployment by the Marines (whoever did the
wiki articile must have been one of those datadinks?)
https://www.garlic.com/~lynn/2007f.html#42 Is computer history taught now?
quicky search engine use turned up
http://www.gcom.com/home/company/custpers.html
... from above
What does a person do after working on one of the most exciting and
successful university-based computer projects ever? That was the
question confronting Dave Grothe back in 1979. Dave had been a
systems programmer on the immensely successful ILLIAC IV computer
project at the University of Illinois.
...
Gcom's first customer, another small company located in Santa Barbara,
CA, built a Z80-based protocol processor card for the IBM Series/1
minicomputer. Gcom provided an X.25 protocol stack for this board. IBM
liked this product so much that it adopted it and put it into its
catalog. IBM's first customer for the X.25 adapter was MasterCard.
... snip ...
Mastercard had large number of series/1 driving large x.25 network (for all i know still does ... although i assume that they've since moved on to various PC platforms).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: University rank of Computer Architecture Newsgroups: comp.arch Date: Wed, 28 Mar 2007 08:24:19 -0600anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
SCI website
http://www.scizzl.com/
the multi-processor boards are somewhat the analog of today's multi-core chip ... i.e. SCI provided for 64-port memory infrastructure; two-processor boards gave convex 128-system configuration ... and the four-processor boards gave sequent and DG, 256-processor configuration.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: ISPF Limitations (was: Need for small machines ... ) Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Wed, 28 Mar 2007 09:52:40 -0600Gerard Schildberger wrote:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Call for XEDIT freaks, submit ISPF requirements Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Wed, 28 Mar 2007 13:36:12 -0600/*DLW wrote:
old email about XEDIT being chosen to ship rather than an internal
editor that had been widely deployed internally for some number of
years (i.e. this was in period when almost all internal
edit/development went on under VM/CMS ... regardless of what product
it involved).
https://www.garlic.com/~lynn/2006u.html#email800311 800311
https://www.garlic.com/~lynn/2006u.html#email800312 800312
one of the come-backs was request for documentation on all the better/more features and they would look into adding the support to XEDIT ... somewhat ignoring the issue of where might the resources come from (then came the line about it being the responsibility of the RED author to make XEDIT as good as RED).
a couple recent posts about POK convincing corporate to kill off VM,
transfer all the resources to POK and assigned to help turn-out MVS/XA
... and Endicott managing to salvaging very small number of the people
and mission ...
https://www.garlic.com/~lynn/2007.html#23 How to write a full-screen Rexx debugger?
https://www.garlic.com/~lynn/2007e.html#41 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007f.html#7 IBM S/360 series operating systems history
part of this possibly was big rush attempting to make up for a lot of
(370 related) lost yrs after future system project as killed (which
had been planned to be the replacement for 370)
https://www.garlic.com/~lynn/submain.html#futuresys
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: U.S. Cedes Top Spot in Global IT Competitiveness Newsgroups: alt.folklore.computers Date: Wed, 28 Mar 2007 18:58:14 -0600Survey shows U.S. slipping globally in IT use
US No Longer Technology King
http://slashdot.org/articles/07/03/28/2042247.shtml
U.S. Cedes Top Spot in Global IT Competitiveness
http://www.eweek.com/article2/0,1895,2108825,00.asp
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness Newsgroups: alt.folklore.computers Date: Wed, 28 Mar 2007 20:24:16 -0600re:
some past posts about y2k remediation ... one of the issues
is that the uptick in internet (bubble) and y2k remediation
competing for (scarce) resources at the same time ....
accelerated offshoring
https://www.garlic.com/~lynn/2004b.html#2 The SOB that helped IT jobs move to India is dead!
https://www.garlic.com/~lynn/2004f.html#39 Who said "The Mainframe is dead"?
https://www.garlic.com/~lynn/2004o.html#66 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005.html#20 I told you ... everybody is going to Dalian,China
https://www.garlic.com/~lynn/2005s.html#16 Is a Hurricane about to hit IBM ?
https://www.garlic.com/~lynn/2006g.html#21 Taxes
https://www.garlic.com/~lynn/2006s.html#40 Ranking of non-IBM mainframe builders?
the off-sharing was already going on in the early 90s ... we were doing a lot of marketing in the far east in the early 90s ... on one trip, ran across a long article in hong kong comparing the competitive characteristics of china vis-a-vis india for offshoring work (which a lot of people didn't even notice was going on until a decade later).
some past posts about the 1990 census ... one of the results was some
statement about half the 18yr olds were considered funtionally
illiterate ... as well as other references to decline in competence
(and increasing skill shortage)
https://www.garlic.com/~lynn/2002k.html#41 How will current AI/robot stories play when AIs are real?
https://www.garlic.com/~lynn/2003i.html#28 Offshore IT
https://www.garlic.com/~lynn/2003i.html#45 Offshore IT
https://www.garlic.com/~lynn/2003l.html#13 Cost of patching "unsustainable"
https://www.garlic.com/~lynn/2003p.html#12 Danger: Derrida at work
https://www.garlic.com/~lynn/2004b.html#2 The SOB that helped IT jobs move to India is dead!
https://www.garlic.com/~lynn/2004b.html#42 The SOB that helped IT jobs move to India is dead!
https://www.garlic.com/~lynn/2004d.html#18 The SOB that helped IT jobs move to India is dead!
https://www.garlic.com/~lynn/2004h.html#18 Low Bar for High School Students Threatens Tech Sector
https://www.garlic.com/~lynn/2005e.html#48 Mozilla v Firefox
https://www.garlic.com/~lynn/2005g.html#43 Academic priorities
https://www.garlic.com/~lynn/2006f.html#44 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#20 The Pankian Metaphor
https://www.garlic.com/~lynn/2006g.html#21 Taxes
https://www.garlic.com/~lynn/2006l.html#63 DEC's Hudson fab
part of the above implied that one of the big things that did keep the internet bubble going in the 90s ... was that half or more of the skilled workers in silicon valley (and other domestic hitech centers) were foreign born (w/o those resources it couldn't have happened as well as it did)
there have been articles that a lot of the economy was driven by technical leadership ... and that leadership would slip because: 1) insufficient domestic resources resulting in growing amount of outsourcing as well as growing numbers of high skilled foreign born workers, 2) insufficient domestic resources because there weren't sufficient skills in the following generation(s) (significnat percentage were functionally illiterate), 3) large risk that as offshoring increased and native economies improved, significant numbers of highly skilled foreign workers return home (significantly exaserbating domestic skill shortages) 4) retiring baby boomers that had dominated the high-skilled domestic market (further aggravating high-skill domestic shortages)
... basically (for two decades or more) it has never been "if" ... it has been "when"
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Securing financial transactions a high priority for 2007 Newsgroups: alt.folklore.computers Date: Thu, 29 Mar 2007 06:57:37 -0600jmfbahciv writes:
for a little topic drift
https://www.garlic.com/~lynn/aadsm26.htm#42 "Dilemmas of Privacy and Surveillance" report launched
https://www.garlic.com/~lynn/aadsm26.htm#43 Cost of an identity
More Than 100 Security breaches Reported Under Law to Thwart ID Thieves
http://www.govtech.net/magazine/channel_story.php/104461
and small sample of breach notification news URLs going back to the start of 2006:
Ohio Enacts Security Breach Notification Law
http://www.mondaq.com/i_article.asp?articleid=37836
Breach notification laws: When should companies tell all?
http://www.computerworld.com/securitytopics/security/story/0,10801,109161,00.html
House Slated to Pass Data Breach Bill
http://www.securitypronews.com/insiderreports/insider/spn-49-20060316HouseSlatedtoPassDataBreachBill.html
Security Breach Notification Requirements: Guidelines and Securities Law Considerations
http://www.mondaq.com/i_article.asp?articleid=38698
Data-Breach Disclosure Bill Passes House Panel
http://www.internetnews.com/bus-news/article.php/3595291
Data Breach Bills Crowding Congress
http://www.internetnews.com/bus-news/article.php/3605666
Bill puts cops first in data leak notification
http://news.com.com/Bill+puts+cops+first+in+data+leak+notification/2100-7348_3-6071216.html
Bill puts cops first in data leak notification
http://news.zdnet.com/2100-1009_22-6071216.html
Data Breach Bills Crowding Congress
http://www.internetnews.com/security/article.php/3605666
Bill Would Criminalize Failure to Report Breaches
http://blog.washingtonpost.com/securityfix/2006/05/bill_would_criminalize_failure.html
House Panel Moves on Data Breach Bill
http://www.internetnews.com/bus-news/article.php/3608816
Information Policy Institute Examines Data Breach Notification Legislation
http://www.govtech.net/magazine/channel_story.php/99946
Will a Federal Data Security Breach Legislation Pass This Congressional Session?
http://www.dmnews.com/cms/dm-news/legal-privacy/37204.html
Congress Proposes Data Breach Notification Law
http://www2.csoonline.com/blog_view.html?CID=23257
Data breach notification law unlikely this year
http://www.pcwelt.de/news/englishnews/137225/
ID theft law expanding in Maine; State agencies will be required to notify victims of stolen data
http://www.bangornews.com/news/templates/?a=138226
Europe may require data breach notification
http://www.out-law.com/page-7287
Europe may mandate data breach notification
http://www.theregister.co.uk/2006/09/13/europe_data_breach_law/
Handling Security breaches Under European Law
http://www.law.com/jsp/ihc/PubArticleIHC.jsp?id=1158682105389
House passes data breach bill
http://www.fcw.com/article96246-09-27-06-Web
Data Breach Bill Does Little
http://www.consumeraffairs.com/news04/2006/09/davis_data_bill.html
DISUK warns Europe to prepare for data breach notification legislation
http://sourcewire.com/releases/rel_display.php?relid=27588&hilite=
Data breach legislation on the cards for EU firms
http://www.onestopclick.com/news/Data-breach-legislation-on-the-cards-for-EU-firms_17873890.html
European companies should prepare for data breach notification legislation
http://www.securitypark.co.uk/article.asp?articleid=26029&CategoryID=1
EU proposes US-style data breach laws
http://www.itpro.co.uk/security/news/97140/eu-proposes-usstyle-data-breach-l
What You Need to Know About Security breaches and European Legislation
http://www.law.com/jsp/legaltechnology/pubArticleLT.jsp?id=1163671526352
Data breaches rising as firms, laws move slowly
http://www.palmbeachpost.com/business/content/business/epaper/2007/01/08/c1bz_idtheftlaws_0108.html
Advocates call for data breach notification law
http://www.itbusiness.ca/it/client/en/home/News.asp?id=41817
Data Breach Law Back in Senate
http://www.internetnews.com/bus-news/article.php/3653856
Privacy breaches expose flaws in law
http://www.thestar.com/Business/article/173418
National Bill Could Require Companies To Report Data breaches
http://www.informationweek.com/news/showArticle.jhtml?articleID=197004220
Data Breach Bills Resurface in Congress
http://www.linuxsecurity.com/content/view/126929/169/
Concealment a Crime in Latest Data Breach Bill
http://www.internetnews.com/security/article.php/3658296
US Senate Bill Holds IT Managers Responsible for Privacy Breaches
http://www.betanews.com/article/US_Senate_Bill_Holds_IT_Managers_Responsible_for_Privacy_Breaches/1170983371
Lawmakers Introduce Breach Notification, Other Bills
http://www.pcworld.com/article/id,128887-pg,1/article.html
National Bill Could Require Companies To Report Data breaches
http://www.informationweek.com/showArticle.jhtml?articleID=197004220&queryText=security+breach+bill
Data privacy bill requires breach disclosure
http://arstechnica.com/news.ars/post/20070209-8807.html
ICO gives qualified backing to security breach law
http://www.out-law.com/page-7783
National Bill Could Require Companies To Report Data breaches
http://www.optimizemag.com/showArticle.jhtml?articleId=197007659
New Laws Target Data Security breaches
http://www2.csoonline.com/blog_view.html?CID=29000
Symantec: U.S. Data Breach Legislation Needed
http://www.pcworld.com/article/id,129448-c,techrelatedlegislation/article.html
Symantec: US data breach legislation needed
http://www.infoworld.com/article/07/02/27/HNbreachlegislationneeded_1.html
Identity Theft: U.S. Data Breach Legislation Needed
http://www2.csoonline.com/blog_view.html?CID=29043
More Than 100 Security breaches Reported Under Law to Thwart ID Thieves
http://www.govtech.net/magazine/channel_story.php/104461
Feinstein Charges Again on Data Breach Notification Bill
http://www.internetnews.com/security/article.php/3667221
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Thu, 29 Mar 2007 07:26:24 -0600Jan Vorbrüggen <jvorbrueggen@not-mediasec.de> writes:
customers could get microfiche for the os/360 genre ... at least up
until OCO announcement ... recent reference
https://www.garlic.com/~lynn/2007f.html#67 The Perfect Computer - 36 bits?
... but typically didn't have machine readable source.
In fact, there was situation where some gov. agency requested that
they be provided source that was guaranteed to exactly match the
executable they were running. after spending several million dollars
investigating the problem, it was decided that it wasn't practical. it
wasn't just that there was a large amount of source ... in large
number of different components ... supported by large number of
different groups ... but many of the groups were in several different
physical locations around the world (doing their own builds and test
... and then would forward executables for final integration, test and
release). a couple past posts mentioning the agency request:
https://www.garlic.com/~lynn/2001n.html#26 Open Architectures ?
https://www.garlic.com/~lynn/2002q.html#32 Collating on the S/360-2540 card reader?
the vm/cms genre was quite a bit different ... where source and
(machine readable) source maintenance distribution to customers were
part of the culture. around the time of the OCO announcement, there
was study of amount of customized source changes ... looking at both
internal accounts as well as external customer accounts. The external
customers had the SHARE (univ. of) Waterloo tape ... and internal
accounts had a couple internal packaging operations ... including ones
that I would do periodically over the years ... a couple old email
references (i.e. large body of code changes that I would package
for production systems)
https://www.garlic.com/~lynn/2006w.html#email750430
https://www.garlic.com/~lynn/2006u.html#email800429
https://www.garlic.com/~lynn/2007c.html#email830711
the study found that the total amount of code in the customized source changes were larger than the base source ... and the total amount of code changes on the SHARE waterloo tape and the internal customized packages were about the same (i.e. both external customer installations and internal installations had similar requirements).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Record Credit card heist...TJM Newsgroups: bit.listserv.ibm-main Date: Thu, 29 Mar 2007 10:39:14 -0600Efinnell15@ibm-main.lst wrote:
part of most recent topic drift about why is such stuff showing up in
the press ...
https://www.garlic.com/~lynn/2007f.html#72 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007f.html#75 Securing financial transactions a high priority for 2007
and slightly earlier post with reference to "cyber thieves are hauling
in more cash than drug dealers" as well as URL references to half
dozen previous posts (going back nearly to the start of the year)
mentioning the TJX data breach. also some references to the
information (from the breach) being used; "tjx data shows up in
massive credit card fraud at florida wal-mart"
https://www.garlic.com/~lynn/2007f.html#68 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Thu, 29 Mar 2007 13:39:29 -0600krw <krw@att.bizzzz> writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: University rank of Computer Architecture Newsgroups: comp.arch Date: Thu, 29 Mar 2007 13:58:21 -0600Terje Mathisen <terje.mathisen@hda.hydro.com> writes:
the other "problem" in the transition from 3830 disk controllers in the 70s to 3880 disk controllers in the 80s ... was that the 3880 used a much slower processor for command handling (compared to the 3830). there were attempts to mask slower processing/latency by having something similar to caching of the processing. this worked as long as everything was coming in thru single channel interface ... but as soon as there was a request from a different channel/processor interface ... it took processing milliseconds to switch interfaces (significant penalty for 3880 multi-system operation vis-a-vis earlier 3830s).
misc. past posts about my wife having been con'ed into going to
POK to be in charge of loosely-coupled (mainframe) architecture
https://www.garlic.com/~lynn/submain.html#shareddata
misc. past posts about getting to play in the disk engineering
labs ... including period when much of 3880 controller and 3380
disk development was going on (floating heads, etc)
https://www.garlic.com/~lynn/subtopic.html#disk
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 30 Mar 2007 07:34:02 -0600krw <krw@att.bizzzz> writes:
Huge amount of money was spent on FS project ... and while everybody was distracted by FS project ... there weren't a lot of people minding the 370 store ... and then with the death of FS ... there was enormous amount of scurring about trying to make up for lost time ... trying to get stuff into the 370 pipeline (to market/sell)
from
http://www-03.ibm.com/ibm/history/
starting with
http://www-03.ibm.com/ibm/history/history/decade_1970.html
yr revenue net
70 7.5b 1.01b
71 8.27b 1.07b
72 9.53b 1.27b
73 10.99b 1.57b
74 12.67b 1.83b
75 14.43b 1.99b
76 16.3b 2.39b
77 18.13b 2.71b
78 21.07b 3.11b
79 22.86b 3.01b
and
92 64.52b -4.96b
and comment about product for gov. agencies, some of it was possibly
related to
https://web.archive.org/web/20090117083033/http://www.nsa.gov/research/selinux/list-archive/0409/8362.shtml
above science center reference is of course 545 tech sq
https://www.garlic.com/~lynn/subtopic.html#545tech
also Boyd ran NKP ("spook base") 72-73 ... in one of Boyd biographies, it mentioned that it represeted a $2.5B "windfall" for IBM
past posts mentioning $2.5B windfall
https://www.garlic.com/~lynn/2005m.html#22 Old Computers and Moisture don't mix - fairly OT
https://www.garlic.com/~lynn/2005m.html#23 Old Computers and Moisture don't mix - fairly OT
https://www.garlic.com/~lynn/2005m.html#24 Old Computers and Moisture don't mix - fairly OT
https://www.garlic.com/~lynn/2005t.html#1 Dangerous Hardware
https://www.garlic.com/~lynn/2006q.html#37 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006q.html#38 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006u.html#49 Where can you get a Minor in Mainframe?
https://www.garlic.com/~lynn/2006u.html#50 Where can you get a Minor in Mainframe?
https://www.garlic.com/~lynn/2006x.html#18 The Future of CPUs: What's After Multi-Core?
misc. collected posts mentioning Boyd:
https://www.garlic.com/~lynn/subboyd.html#boyd
and URLs from around the web mentioning Boyd:
https://www.garlic.com/~lynn/subboyd.html#boyd2
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: ISPF not productive Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 30 Mar 2007 07:56:07 -0600Shmuel Metz , Seymour J. wrote:
I was first exposed to CMS edit in the spring '68 on 2741. I then wrote the TTY/ASCII terminal support for cp67. Then for OS/MVT release 18 system ... i re-implemented the CMS editor syntax (along with 2741 and TTY terminal support) from scratch for HASP CRJE implementation (CMS editor implementation wasn't re-entrant ... each running in its own address space ... while HASP implementation required fully re-entrant implementation). Being somewhat biased, I considered it enormously better than subsequent TSO release.
As far as I know, the HASP CRJE implementation never survived ... but
the effort didn't totally go to waste. Later I was able to use the
experience of writing re-entrant code as part of pushing portions of
CMS (including the editor) into "shared" (r/o protected) segments
https://www.garlic.com/~lynn/submain.html#mmap
old communication reference (some amount of the following reference involved
moving stuff that had already been implemented in cp67 to vm370)
https://www.garlic.com/~lynn/2006v.html#email731212
unrelated old email mentioning TSO
https://www.garlic.com/~lynn/2006b.html#email800310
and slightly truncated
https://www.garlic.com/~lynn/2006v.html#email800310b
shortly after the mid-80s, i got moved to a unix/emacs environment ... one of the things that i missed was the all command ... and was able to acquire one (two decades ago now) ... although the implementation that i currently use dates from '94.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: T.J. Maxx data theft worse than first reported Newsgroups: bit.listserv.ibm-main Date: Fri, 30 Mar 2007 08:09:03 -0600Howard Brazee wrote:
recent side-track, somewhat into the privacy side of the issue
https://www.garlic.com/~lynn/aadsm26.htm#42 Dilemmas of Privacy and Surveillance
https://www.garlic.com/~lynn/aadsm26.htm#43 Cost of an identity
for a little drift, we had been co-author of the financial privacy
standard, x9.99 and i had done one of our merged glossaries and
taxonomies in support of the work ... reference here
https://www.garlic.com/~lynn/index.html#glosnote
referencing glba, hipaa, eu-dpd, etc.
in the mid-90s, the x9a10 financial standard working group had been
given the requirement to preserve the integrity of the financial
infrastructure for all retail payments ... the result was the x9.59
standard
https://www.garlic.com/~lynn/x959.html#x959
one of the claims was that it was also privacy agnostic
https://www.garlic.com/~lynn/subpubkey.html#privacy
in part, at the time, the EU was making some statements that they were going to require that point-of-sale electronic transactions be as anonymous as cash.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: What's a CPU second? Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 30 Mar 2007 10:29:35 -0600Gerhard Adam wrote:
3081 was only going to be a two-way offering ... and there wasn't going to be any uniprocessor. In large part because ACP/TPF (at the time) didn't have multiprocessor support ... they came out with 3083 ... which was a single processor ... that had processor about 15percent faster than 3081 processor (being able to eliminate the cross-cache handling).
The 3084 4-way ... was three times as bad as a 3081 2-way (each processor cache having to listen to 3 other processors caches ... rather than just one other). In that time-frame ... both VM and MVS had some amount of kernel storage restructuring to make things aligned on cache-line boundaries and multiples of cache-lines (attempting to avoid two different kernel storage structures overlapping in the same cache line ... possibly being used by two different processes concurrently ... resulting in significant cache-line trashing). The claim was that the kernel storage restructuring for cache-line sensitivity improved overall thruput by something like five percent.
lots of past SMP related postings
https://www.garlic.com/~lynn/subtopic.html#smp
including mentioning Charlie inventing compare&swap at the
science center
https://www.garlic.com/~lynn/subtopic.html#545tech
I've claimed in the past John's work on 801/risc in the mid-70s
https://www.garlic.com/~lynn/subtopic.html#801
was at least partially motivated by reaction to the extreme hardware
complexity (and failure) of the Future System project
https://www.garlic.com/~lynn/submain.html#futuresys
there was also a strong drive that 801/risc would never support multiprocessing and cache consistency ... reaction to the enormous thruput penalty seen in 370 (and later) mainframe multiprocessor cache consistency implementations.
the lack of cache consistency and multiprocessor support was
one of the motivations driving us to do the ha/cmp product,
as a way of getting scale-up
https://www.garlic.com/~lynn/subtopic.html#hacmp
and related old email about MEDUSA effort (cluster in a rack)
https://www.garlic.com/~lynn/lhwemail.html#medusa
however at the time ... we also participated some in the SCI
activity ... we just didn't have a processor that we could
build any machines from ... recent post mentioning SCI
https://www.garlic.com/~lynn/2007g.html#3 University rank of Computer Architecture
somewhat related past thread (from this mailing list) discussing the issue and
citing some 2084 LSPR ratios
https://www.garlic.com/~lynn/2006l.html#30 One of two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006l.html#41 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006l.html#43 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006l.html#47 One or two CPUs - the pros & cons
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 30 Mar 2007 12:53:59 -0600krw <krw@att.bizzzz> writes:
a lot of the claims were that full technology cycle was on the order
of 7yrs. 3033 was a way of trying to get something new thru the cycle in
half the time (since FS diversion had somewhat drained the 370 pipeline).
https://www.garlic.com/~lynn/submain.html#futuresys
... 303x channel director was 158 microengine with the 158 integrated
channel microcode and no 370 microcode, 3031 was 158 microengine with
370 microcode (and no integrated channel microcode), 3032 was 168-3
reconfigured to use "channel directors", and 3033 started out being
168 wiring diagram mapped to newer/faster chip technology ... some
past posts
https://www.garlic.com/~lynn/2007d.html#21 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007d.html#62 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#32 I/O in Emulated Mainframes
https://www.garlic.com/~lynn/2007f.html#28 The Perfect Computer - 36 bits?
for some drift ... somewhat related to this post
https://www.garlic.com/~lynn/2007g.html#16 What's a CPU second
by '76, the 5-way smp project I had been working on had been killed
... minor old email ref
https://www.garlic.com/~lynn/2006w.html#email750827
other posts mentioning the effort
https://www.garlic.com/~lynn/submain.html#bounce
afterwards, a couple of us from the science center had somewhat surreptitiously dropped into POK and co-opted a couple of the processor engineers (working on 3033) to spend some of their spare time working on a 16-way 158 (engine) multiprocessor design (158 engine economic selection was similar to why it was selected for the channel director).
everything went fine for some time ... most people thot it was significantly more interesting than the other stuff going on. that is until somebody happened to mention to the POK director that MVS would never be able to support the machine (at least not in the expected lifetime of the product). That resulted in a lot of uproar and some people were invited to never appear in POK again (and the processor engineers told to get back to the grind stone and don't look up again).
part of the issue was that POK had already convinced corporate that vm
product had to be completely killed off and all the people re-assigned
to help getting mvs/xa out the door ... although endicott got a
partial stay of execution ... recent posts/references
https://www.garlic.com/~lynn/2007f.html#26 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#5 Call for XEDIT freeks, submit ISPF requirements
in any case, it wouldn't do to have a revolutionary new high-end
product that the favorite son operating system wouldn't be able to
support (for possibly a couple more decades). so ok, maybe i had
other issues than the ones mentioned here
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
it was in this time-frame that I first ran into 801/risc. Somebody in
pok was sponsoring an advanced technology symposium ... and we
presented 16-way smp ... and the 801 group also made presentation
on 801/risc and related software technology:
https://www.garlic.com/~lynn/subtopic.html#801
other past posts mentioning the 16-way smp effort
https://www.garlic.com/~lynn/95.html#5 Who started RISC? (was: 64 bit Linux?)
https://www.garlic.com/~lynn/95.html#6 801
https://www.garlic.com/~lynn/95.html#11 801 & power/pc
https://www.garlic.com/~lynn/98.html#40 Comparison Cluster vs SMP?
https://www.garlic.com/~lynn/2002i.html#82 HONE
https://www.garlic.com/~lynn/2003.html#4 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#5 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2004f.html#21 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004f.html#26 command line switches [Re: [REALLY OT!] Overuse of symbolic
https://www.garlic.com/~lynn/2004j.html#45 A quote from Crypto-Gram
https://www.garlic.com/~lynn/2004m.html#53 4GHz is the glass ceiling?
https://www.garlic.com/~lynn/2005k.html#45 Performance and Capacity Planning
https://www.garlic.com/~lynn/2005m.html#48 Code density and performance?
https://www.garlic.com/~lynn/2005p.html#39 What ever happened to Tandem and NonStop OS ?
https://www.garlic.com/~lynn/2006c.html#40 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006l.html#30 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006n.html#37 History: How did Forth get its stacks?
https://www.garlic.com/~lynn/2006r.html#22 Was FORTRAN buggy?
https://www.garlic.com/~lynn/2006t.html#7 32 or even 64 registers for x86-64?
https://www.garlic.com/~lynn/2006t.html#9 32 or even 64 registers for x86-64?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Complete April Fools' Day RFCs Newsgroups: bit.listserv.ibm-main Date: Fri, 30 Mar 2007 14:55:21 -0600Gabe Goldberg wrote:
my RFC index
https://www.garlic.com/~lynn/rfcietff.htm
in the RFCs listed by section, click on TERM (term->RFC#)
and scroll down to "April1" ... i.e.
April1
4042 4041 3751 3514 3252 3251 3093 3092 3091 2795 2551 2550 2549 2325
2324 2323 2322 2321 2100 1927 1926 1925 1924 1776 1607 1606 1605 1437
1313 1217 1149 1097 852 748
... clicking on an RFC number brings up that RFC summary in the lower
frame. clicking on the ".txt=nnnn" field in the RFC summary retrieves
the actual RFC.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: T.J. Maxx data theft worse than first reported Newsgroups: bit.listserv.ibm-main Date: Fri, 30 Mar 2007 15:48:07 -0600Don Leahy wrote:
lots of times the dispute process has the consumer calling their bank with credit card number, merchant, amount and date. the bank then contacts the merchant with credit card number, merchant, amount and date ... there was transaction id introduced several years ago to replace it ... but the uptake wasn't very successful. the consumer may also contact the merchant with just account number, amount and date.
the current infrastructure not only requires the account number in several
places in the infrastructure ... making it vulnerable "at rest" ... but
also has it vulnerable in transit as the process is flowing thru various
processes ... i.e. skimming and harvesting vulnerabilities
https://www.garlic.com/~lynn/subintegrity.html#harvest
for replay attacks.
in the past decade ... a number of financial institutions have tried
"one time account numbers" as countermeasure to replay attacks ...
frequently internet specific ... i.e. the consumer is given a whole
list of account numbers ... each which may be used once, and only once.
this moved a significant burden (related to attempting to limit the
current infrastructure fraud vulnerabilities) to the consumer
(where it became the consumers responsibility of keeping track
of which account number went with which purchase). some past posts
mentioning some of the one-time account number deployments:
https://www.garlic.com/~lynn/aadsm17.htm#42 Article on passwords in Wired News
https://www.garlic.com/~lynn/aadsm26.htm#4 Citibank e-mail looks phishy
https://www.garlic.com/~lynn/2003n.html#0 public key vs passwd authentication?
https://www.garlic.com/~lynn/2007c.html#6 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#15 Securing financial transactions a high priority for 2007
note ... these financial institutions typically already had transaction infrastructures that could map multiple different account numbers to a common (primary) account.
now, as i've mentioned before, in the mid-90s, the x9a10 financial standard
working group had been given the requirement to preserve the integrity
of the financial institution for all retail payments. the result was
the x9.59 financial standard
https://www.garlic.com/~lynn/x959.html#x959
part of the standard provided end-to-end strong authentication ... and precluded being able to use an account number used in x9.59 transactions ... in non-authenticated transactions (eliminating being able to use harvested/skimmed information from previous transactions in replay attacks for fraudulent transactions)
other posts/discussions related to the x9.59 financial standard for
all retail transactions
https://www.garlic.com/~lynn/subpubkey.html#privacy
i.e. the issue is that account numbers in the current infrastructure have diametrically opposing requirements ... on one hand they are used as a type of shared-secret authentication (analogous password) ... in which case they have to be kept confidential and never divulged to anybody. On the other hand, the account numbers are a standard part of numerous business process ... and as such have to be divulged and made available.
part of the x9.59 financial standard was eliminating the use of account numbers for two distinctly different business purposes with diametrically opposing business requirements problem can somewhat be viewed as frequently occurring systemic problem when a single construct is used for multiple different business purposes which impose radically different (and possibly diametrically opposing) requirements. It would be somewhat like taking existing mainframe security paradigm using userid & password ... where a lot of permissions and privileges are associated with the userid ... and the password is separately used for authentication ... and eliminating the userid ... requiring that the password be used for both specifying permissions and privileges as well as used for the purposes of authentication.
in the financial cryptography mailing list blog
https://financialcryptography.com/mt/archives/000877.html
somebody also used the analogy of infrastructure that decided that the color of a person's eyes were going to be used for authentication ... and then blaming the individuals if they didn't go around perpetually with their eyes closed.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: T.J. Maxx data theft worse than first reported Newsgroups: bit.listserv.ibm-main Date: Fri, 30 Mar 2007 16:52:30 -0600re:
and a recent update:
TJX Intruder Had Retailer's Encryption Key
http://www.physorg.com/news94480989.html
from above:
Not that the culprit necessarily needed it. Data was apparently taken
during the card-approval process before it was encrypted. These are
among the latest details in what is almost certainly the worst retail
data breach ever.
... snip ...
i.e. the attacker was skimming the information as part of the initial transaction process ... as opposed to waiting for a copy to be moved into some sort of transaction log and then harvesting that log.
for a little drift on the subject
https://www.garlic.com/~lynn/aadsm26.htm#44 Governance of anonymous financial services
all of this has been my periodic comment about security proportional to risk
https://www.garlic.com/~lynn/2001h.html#61
and/or that the attacker can possibly afford to outspend the defender
by possibly 100:1
https://www.garlic.com/~lynn/2007f.html#75 Securing financial transactions a high priority for 2007
and/or that even if the planet was buried under miles of information
hiding encryption, it still wouldn't stop such leaks
https://www.garlic.com/~lynn/2007b.html#8 Special characters in passwords was Re: RACF - Password rules
https://www.garlic.com/~lynn/2007b.html#20 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#60 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#10 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#33 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007c.html#53 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007d.html#34 Mixed Case Password on z/OS 1.7 and ACF 2 Version 8
https://www.garlic.com/~lynn/2007e.html#26 Securing financial transactions a high priority for 2007
https://www.garlic.com/~lynn/2007f.html#75 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 30 Mar 2007 17:34:26 -0600Peter Flass <Peter_Flass@Yahoo.com> writes:
each individual component had to have its own price and profit and be justified purely based on the specific item's profit ... w/o consideration of possible synergy with other things.
there had been a lot of synergy among components in the 60s (i.e. bundled) ... but with unbundling ... it started to unravel ... customers were expected to (effectively) justify paying for each individual component (theoretically w/o regard to any synergy). In such an environment ... there were difficulties not only for vendors but also in the customer ranks.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Bidirectional Binary Self-Joins Newsgroups: comp.databases.theory Date: Fri, 30 Mar 2007 19:25:50 -0600paul c <toledobythesea@oohay.ac> writes:
in a different life, we were given the opportunity to rewrite ROUTES ... one of the common airline res system applications ... i.e. finding flights/times/etc to get from origin to a destination. as part of the effort, we were provided a machine readable copy of the OAG ... with all world-wide commercial flight segments. I believe the "worst" I found was what appeared to be six different flight segments ... i.e. different flight numbers but identical equipment, identical departure times from the same airport and identical arrival times at the same destination airport.
when i expressed my opinion about the "change of equipment" scenario ... the explanation was that agent reservation screens (as well as printed manuals) typically ordered all direct flights first on the screen (or in books) before all connecting flights. judicious use of multiple flights numbers for the same equipment, got a lot of things moved up to the top of the screen (with people who were avoiding connecting flights found themselves faced with "change of equipment")
the other "benefit" (of creating multiple different flight nos for the same equipment), was typical reservation system provided agents with only a limited number of connecting flight operations. more complex travel scenarios required agents to manually stitch together some number of connections. use of multiple flight numbers per equipment ... could provide some additional trip planning help to agents.
so one of the "ten impossible" things (current ROUTES couldn't do and we were suppose to implement), was being able to find connections between any two (commercial) airports (some 4k plus) in the world. for demo, they would give two airports codes ... frequently ones that nobody had ever heard of before on opposite sides of the world. there were some that took more than 24hrs elapsed time with 5-6 different connections.
being able to automatically find all possible origin/destination ... at least eliminated the excuse (for multiple flight nos per equipment) that the agent was being helped on how to get from any possible origin to any possible destination.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 30 Mar 2007 20:22:47 -0600krw <krw@att.bizzzz> writes:
we didn't co-op any of the 3081 processor engineers ... just the guys working on 3033 ... so I knew much less about what the 3081 guys were doing ... other than i think they got to play leapfrog, the kingston(?) engineers doing the 3081 while the pok engineers did the 3033, who then went on to do trout/3090.
i.e. get 3033 out in half the time (4-5 years) while it was taking 7-8 years to get 3081 out (as soon as 3033 was out the door ... switch to trout/3090 in parallel with finishing 3081) ... or ... are we possibly in violent agreement.
one of the suspicions was that the "i/o" in the 158, 303x channel director and 3081 had similar characteristics/profile ... i was doing tests on latency involving different vendor disks, different vendor controllers, channels and processors ... related to disk head-switch. 3081, 303x channel director and 158 elapsed latencies were nearly identical. i/o commands in "channel programs" were executed end-to-end synchronous ... with programs residing in processor memory ... so end-to-end latency on each command involved processor memory, channel, control unit, device (and various cable lengths)
you have channel program that reads record on one track and then does a head switch to a different track ... and attempts to read the next record ... how much has the disk continued to rotate while the processing of the head switch command is being processed.
past posts mentioning doing variety of head-switch latencies tests
https://www.garlic.com/~lynn/2000d.html#7 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#11 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2000d.html#12 4341 was "Is a VAX a mainframe?"
https://www.garlic.com/~lynn/2001j.html#3 YKYGOW...
https://www.garlic.com/~lynn/2002b.html#17 index searching
https://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
https://www.garlic.com/~lynn/2004d.html#64 System/360 40 years old today
https://www.garlic.com/~lynn/2004d.html#65 System/360 40 years old today
https://www.garlic.com/~lynn/2004d.html#66 System/360 40 years old today
https://www.garlic.com/~lynn/2004e.html#41 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004h.html#43 Hard disk architecture: are outer cylinders still faster than inner cylinders?
https://www.garlic.com/~lynn/2005p.html#38 storage key question
https://www.garlic.com/~lynn/2005s.html#22 MVCIN instruction
https://www.garlic.com/~lynn/2006r.html#40 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006t.html#19 old vm370 mitre benchmark
https://www.garlic.com/~lynn/2006w.html#8 Why these original FORTRAN quirks?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Bidirectional Binary Self-Joins Newsgroups: comp.databases.theory Date: Fri, 30 Mar 2007 20:29:57 -0600paul c <toledobythesea@oohay.ac> writes:
the max. in the world that i found ... was 16 flight segments for the same flight number (and presumably same equipment) that started early in the morning and finished late at night at the same airport.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Bidirectional Binary Self-Joins Newsgroups: comp.databases.theory Date: Fri, 30 Mar 2007 20:58:26 -0600paul c <toledobythesea@oohay.ac> writes:
some considered that we cheated ... in previous life I had been involved in doing automated circuit layout ... and number of airports and flight segments was a much smaller problem than typical circuit layout problems ... the real trick was being able to do any possible from/to in subsecond elapsed time (for all possible airports and all possible flight segments)
bringing it somewhat back to database theory ... when i had been doing
some of the stuff on system/r
https://www.garlic.com/~lynn/submain.html#systemr
other refs
https://www.garlic.com/~lynn/2007e.html#31 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#36 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#37 Quote from comp.object
i was also involved lending hand to some vlsi design tool group. there was stuff like chip design, chip physical layout, board layouts, circuit routing, etc.
the system/r group sort of took some optimizations with relational, creating tables where the same schema was applied to everything in the table. some types of chip stuff is very regular/uniform (say memory) ... but other types of chips (processors) could be extremely non-uniform.
so there was a joint project between the vlsi tools group and various database people from STL (also where IMS went on) ... where all relationships were bidirectional and physically instantiated. However, instead of doing it as exposed record pointers (as in ims) ... it was done as indexes ... ala the system/r metaphor ... but since there were a huge number of (bidirectional, instantiated) relationships ... there was also huge forest of such indexes.
this is the type of stuff that we use for managing the information
for out RFC index
https://www.garlic.com/~lynn/rfcietff.htm
and the various merged taxonomies and glossaries
https://www.garlic.com/~lynn/index.html#glosnote
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Bidirectional Binary Self-Joins Newsgroups: comp.databases.theory Date: Sat, 31 Mar 2007 05:24:02 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
i.e. all the information is maintained in an infrastructure that
directly instantiates bi-directional relationships ... then
applications are used to generate html files for the website
https://www.garlic.com/~lynn/index.html
one of the issues is that the html generation applications attempt to simulate the extensive bi-directional relationships with (one-way) hrefs ... which partially accounts for the extremely high density of "hrefs" per mbyte.
this possibly accounts for what appears to be all the major search engine crawlers using the site as regression test ... with avg. of 1000 hits/day just from crawlers from all the major search engines.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Complete April Fools' Day RFCs Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sat, 31 Mar 2007 05:40:19 -0600re:
for other drift ... old posting of the 1984 april 1st corporate
directive on passwords ... old posting
https://www.garlic.com/~lynn/2001d.html#51 A beautiful morning in AFM.
https://www.garlic.com/~lynn/2001d.html#52 A beautiful morning in AFM.
https://www.garlic.com/~lynn/2001d.html#53 April Fools Day
That year, 1apr84 was on a sunday. the corporate directive appeared on several bulletin boards monday morning. Unfortunately, several people took it to be valid (even tho the 1apr84, sunday date should have been a dead give-away), as a result there was an attempt to identify (and punish?) the culprit responsible.
Afterwards, corporate letterhead paper was kept under lock and key ... no longer laying around in the various bldg. 6670/sherpa print rooms.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Jim Gray Is Missing Newsgroups: alt.folklore.computers Date: Sat, 31 Mar 2007 06:18:35 -0600most recent summary (from this morning)
The Search For Microsoft Researcher Jim Gray
http://www.informationweek.com/news/showArticle.jhtml?articleID=199204114
from above:
Computer scientist Jim Gray disappeared Jan. 26 after sailing out of
San Francisco Bay to scatter his mother's ashes at the Farallon
Islands, 27 miles offshore. An extended, four-day search by the
U.S. Coast Guard by air and sea turned up nothing, and that might have
been that. But the search for the 63-year-old Gray--a distinguished
engineer with Microsoft Research, database expert, and Turing Award
winner for his work in transaction processing--didn't end there.
... snip ...
past pieces of the thread
https://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#17 Jim Gray Is Missing
https://www.garlic.com/~lynn/2007d.html#33 Jim Gray Is Missing
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 31 Mar 2007 10:57:23 -0600krw <krw@att.bizzzz> writes:
re:
https://www.garlic.com/~lynn/2007g.html#11 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#13 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#21 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#23 The Perfect Computer - 36 bits?
so this came up in a slightly different way around 1990 with the C4 project in the automobile industry. some number of different vendors were invited ... including groups from both mainframe and 6000.
now some drift here about rios coming in a year earlier than expected
https://www.garlic.com/~lynn/2007f.html#73 Is computer history taught now?
a few past posts mentioning C4 effort
https://www.garlic.com/~lynn/2000f.html#41 Reason Japanese cars are assembled in the US (was Re: American bigotry)
https://www.garlic.com/~lynn/2000f.html#43 Reason Japanese cars are assembled in the US (was Re: American bigotry)
https://www.garlic.com/~lynn/2003i.html#61 TGV in the USA?
https://www.garlic.com/~lynn/2003i.html#65 TGV in the USA?
https://www.garlic.com/~lynn/2004c.html#51 [OT] Lockheed puts F-16 manuals online
https://www.garlic.com/~lynn/2004h.html#22 Vintage computers are better than modern crap !
https://www.garlic.com/~lynn/2006m.html#49 The Pankian Metaphor (redux)
https://www.garlic.com/~lynn/2007f.html#50 The Perfect Computer - 36 bits?
so i thot that it was slightly ironic that on a project to investigate how to cut a 7-8yr product cycle in half (to start with) in order to remain competitive ... that an organization that also had a 7-8yr product cycle was participating.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: T.J. Maxx data theft worse than first reported Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sat, 31 Mar 2007 15:05:50 -0600Anne & Lynn Wheeler wrote:
and even more
Why Encryption Didn't Save TJX
http://www.physorg.com/news94568787.html
from above:
Encryption has no value when data isn't encrypted, obviously, but
credit cards can't be processed when their numbers are
encrypted. Hence, a smart crook will seek a way to get the data during
that window of time when it's in that state of being "in the clear" -
that is, unencrypted.
TJX's intruder also had a backup plan if data in the clear wasn't
attainable: namely, the decryption key.
... snip ...
we had been brought in to consult with a small client/server startup ... that wanted to do
payments on its server ... past reference
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
and they had this technology called SSL ... the effort has since come to be referred to frequently as electronic commerce
then we spent some time in the x9a10 financial standards working group
... which had been given the requirement in the mid-90s to preserve
the integrity of the financial infrastructure for all retail
payments. the result was the x9.59 financial sandard
https://www.garlic.com/~lynn/x959.html#x959
part of x9.59 to provide end-to-end strong authentication ... effectively armoring the transaction. the standard effectively addressed the issue of skimming/harvesting existing information as part of replay attacks involving fraudulent transactions. Once the transaction was armored, then there was little need to hide/encrypt existing transactions and transaction information ... since the crooks were no longer able to use the information for fraudulent financial transactions.
this also somewhat negated the requirement for the major use of SSL that we had worked on previously (namely electronic commerce transactions).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Wylbur and Paging Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 01 Apr 2007 09:24:01 -0600gah writes:
apl\360 had its own terminal handler, dispatcher, and (workspace)
swapper ... the issue was that the workspaces were typically only
16kbytes or possibly 32kbytes. apl\360 tended to have at least two
different allocated (real-storage) workspace areas ... allowing some
overlap of swapping and execution. however, since they were
(real-storage) addresses in a workspace ... they had to be relative to
the start of the workspace ... since any swap-out/swap-in operation
wouldn't guarantee that a apl application always resided at the same
real address i.e. rather than having hardware (virtual) address
relocation ... the application instructions stream had to perform
relative address relocation. some amount of past posts about the
troubles dealing with os/360 paradigm "relocatable address constants"
... which are swizzled to absolute addresses on initial loading
of program image (and therefor became absolute addresses during
execution)
https://www.garlic.com/~lynn/submain.html#adcon
the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
ported apl\360 to cms (cp67/cms) for cms\apl (in the very early 70s) ... and dispensed with apl\360s terminal handler, dispatcher, and workspace handler ... basically the majority of "operating system" functions ... leaving basically the apl interpreter and storage manager. this allowed for arbitrarily large workspaces (up to the size of the virtual address space limit) in virtual memory paged environment.
however, while the apl storage manager worked ok in a small workspace swapped environment ... it could wreck havoc in large page space environment. apl did all space management ... eliminating applications have to worry about allocating and releasing storage maintenance worries (somewhat like some of the more recent environments like JAVA).
however, on any assignment operation, new storage was always allocated (and any previous location was "forgotten"). when apl got to the end of the workspace ... it would perform garbage collection ... coalescing all allocated memory into (bottom) contiguous area (i.e. garbage collection) ... and starting the process all over again.
the science center was also doing a lot of work on characterizing operation in virtual memory environment ... one of the things were detailed execution traces of instruction and storage reference/stores (this was eventually released as a product called vs/repack ... which included ability to do semi-automated program restructuring for optimizing operation in a paged virtual memory environment). One of the trace applications was drawing storage reference maps ... printed on 1403 printer ... basically storage on the vertical and time along the horizontal. six ft printed strips (reverse side of green bar paper) would be printed ... and multiple strips would be stitched together hanging along the hallway of the science center. apl storage address references exhibited a very strong saw-tooth pattern ... with storage location references starting low and then rising very quickly (over time) to high storage location ... and then a solid vertical line when garbage collection occurred.
the behavior wasn't hazardous with a small swapped workspace ... but was extremely detrimental in a large paged virtual address space. In any case, APL storage management (and garbage collection) had to be significantly reworked for virtual memory environment.
in that period, you saw APL being used for a lot of business modeling and what-if type operations ... a lot of stuff that you now find being done with spreadsheet technology. the corporate hdqtrs people had been doing some business modeling in APL ... but with limitation of 16kbyte workspaces ... they were hardly able to deal with significant amount of customer information. The science center cp/cms operation including offering some amount of timesharing services to other corporate locations. When cms\apl became available ... several corporate hdqtr business planners got accounts on the science center machine ... and had a physical tape sent with large amount of customer information (the most secret of secret corporate information). This required some amount of "security" ... since the same machine was also being accessed by some number of people (faculty and students) from various educational institutions in the cambridge area.
for lots of topic drift ... reference to other kinds of security
needed to be met by cp67/cms
https://web.archive.org/web/20090117083033/http://www.nsa.gov/research/selinux/list-archive/0409/8362.shtml
the other interesting cms\apl related effort was HONE ... where most
of the applications supporting sales, marketing and field people
were written in APL. lots of past posts mentioning HONE and/or APL
applications
https://www.garlic.com/~lynn/subtopic.html#hone
HONE organization initially started by cloning the science center cp67/cms system deployed on several 360/67 machines in datacenters around the US. Later this was ported to vm370 and apl\cms (which then went thru a number of morphs to apl/sv, vs/apl, etc). These systems were further cloned at numerous places around the world, providing world-wide online, interactive support for field, sales, and marketing people.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Can SSL sessions be compromised? Newsgroups: comp.security.misc Date: Sun, 01 Apr 2007 09:48:46 -0600"Powercat" <powercat@verizon.net> writes:
the issue is weakness in various setups having to do with SSL startup and whether the client is checking to see whether the server is actually who the client thinks the server is ... or the process has degenerated into the client just checking that the server is who the server claims to be.
part of this has to do with the fundamental digital certificate and PKI paradigm ... i.e. the trusted distribution of information in an offline environment ... and the client can have some level of trust that the information in the digital certificate is valid. the issue is that an attacker may have a perfectly valid digital certificate with perfectly valid information ... it is just not the information that the client expects it to be. what is happening is that some client processes will just check for valid information (i.e. valid digital certificate) ... as opposed to valid information exactly matching some predefined requirement. when clients are (effectively) just checking for any valid information ... then a MITM-attack involves setting up a intermediate SSL session (impersonating the server to the client) and then setting up a second intermediate SSL session (impersonating the client to the server).
lots of past posts about SSL certificates (including some number of
methods for attacks/compromises)
https://www.garlic.com/~lynn/subpubkey.html#sslcert
i.e. long ago and far away ... we had been called into consult
with this small client/server startup that wanted to do payments
on their servers ... a couple old posts
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
they had this technology that they called SSL ... and we had to do some transformation from technology to business process and also detailed vulnerability and threat analysis.
one of the countermeasures is to preload into the client ... the exact information that the client application has to expect (and make sure that the information in any presented digital certificate exactly matches). however, this countermeasure violates the basic assumptions under which digital certificates, certification authorities, and PKI paradigms are justified and makes the digital certificates redundant and superfluous.
If the countermeasure involves preloading the exact server information (for matching against information in digital certificate) ... then it is obvious that the preloaded information could be the server's public key ... in which case it is no longer necessary to have a digital certificate. With the client already having the server's public key, then it would be possible to have a highly optimized SSL operation with much of the current SSL session protocol setup chatter eliminated.
various past posts specifically discussing various SSL vulnerabilities
and the catch-22 for the certification authority industry with
some of the countermeasures that result in making the digital
certificates and PKI infrastructure redundant and superfluous
https://www.garlic.com/~lynn/subpubkey.html#catch22
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Wylbur and Paging Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 01 Apr 2007 10:55:25 -0600gah writes:
and for somewhat inverse ... boeing huntsville had os/360 mvt release 13 running on 360/67 with DAT turned on ... and no paging. Issue was that long running applications in MVT could cause severe (real) storage fragmentation ... and applications tended to require contiguous storage allocation. they had a bunch of long-running 2250 (graphics) design applications ... that suffered severe storage fragmentation. DAT wasn't used to simulate more virtual memory than there was real storage (and therefor require paging) ... but the amount of virtual memory matched the amount of real storage ... DAT was being used to re-arrange the (real) storage addresses so they could appear contiguous.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness Newsgroups: alt.folklore.computers Date: Sun, 01 Apr 2007 11:37:40 -0600one of the places that they were obviously starting to cede was the automobile industry in the late-70s/early-80s (sparking the import quotas) ... which was some of what prompted the later C4 effort circa 1990 ... recent reference to C4 here
the above contains several past references to the C4 activity (which in turn contains URLs for more detailed descriptions of what went on in C4)
and more recent references to Toyota ascendancy here
https://www.garlic.com/~lynn/2006m.html#49 The Pankian Metaphor (redux)
https://www.garlic.com/~lynn/2006x.html#32 Toyota set to lift crown from GM
in the early 70s, one of the places I got to do a "HONE" clone
installation ... recent HONE/APL reference here
https://www.garlic.com/~lynn/2007g.html#31 Wylbur and Paging
was in Tokyo. At the time, i remember the exchange rate being somewhere around 330yen/dollar(?). I believe it then dropped (rose?) to below 90yen/dollar sometime in the 90s ... before climbing back up ... just checked and it currently lists at 118yen/dollar.
and futher checking w/search engine for historical yen/dollar 1971-current
http://research.stlouisfed.org/fred2/data/EXJPUS.txt
yen hit a "high" against the dollar of 83yen/dollar in 1995 after being at 358yen/dollar in 1971 ... between 1995 and current, it did manage to climb back as "low" as 134 in 2002.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness Newsgroups: alt.folklore.computers Date: Sun, 01 Apr 2007 12:11:09 -0600Charles Richmond <frizzle@tx.rr.com> writes:
it is much more useful to check against a major world economy ... and look at it over much longer period ... since it tends to cover a much broader range of economic factors (and smooths out relative short-term up and down fluctuations).
i.e.
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
Last year, I got taken to task for posting an article reference that included some comment that Japan's economy was second only after the US. The claimant was asserting that the EU (as a collection of countries) had a larger economy than Japan's. In my defense ... it wasn't my claim, it was a statement in the referenced article.
I may have heard somewhere that Canada had economy about the size of
the state of cal. ... but lets see if search engine can find a
reference:
https://www.cia.gov/cia/publications/factbook/rankorder/2001rank.html
above has GDP rank order and notes information is estimated for 2006
(world) 65,000 (i.e. aggregate) US 12,980 EU 12,820 (i.e. aggregate) China 10,000 Japan 4,220 India 4,042 Germany 2,585 UK 1,902 France 1,972 Italy 1,727 Russia 1,723 Brazil 1,616 S. Korea 1,180 Canada 1,165 Mexico 1,134 Spain 1,070 Indonesia 935 Taiwan 668in any case ... as in previous post
the yen/dollar hit an all-time low of 83 in 1995 (changed significantly when i saw it around 330 in the early 70s) ... and then managed to make it back to 130-some in 2002 ... and now somewhat fluctuates in the 115-130 range.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Wylbur and Paging Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 01 Apr 2007 12:53:13 -0600Efinnell15 writes:
Melinda's vm (virtual machine) history paper
https://www.leeandmelindavarian.com/Melinda#VMHist
has a quote about early justification for the project at the science
center
https://www.garlic.com/~lynn/subtopic.html#545tech
and building prototype by adding virtual memory hardware to 360/40 (before 360/67 was available) ... having to do with it was well known that paging on the Atlas machine didn't work (well? ... and the technology needing a lot of invention).
misc. past references to the quote
https://www.garlic.com/~lynn/2000f.html#78 TSS ancient history, was X86 ultimate CISC? designs)
https://www.garlic.com/~lynn/2001h.html#10 VM: checking some myths.
https://www.garlic.com/~lynn/2001h.html#26 TECO Critique
https://www.garlic.com/~lynn/2002.html#42 a.f.c history checkup... (was What specifications will the standard year 2001 PC have?)
https://www.garlic.com/~lynn/2003b.html#1 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003m.html#34 SR 15,15 was: IEFBR14 Problems
https://www.garlic.com/~lynn/2005o.html#4 Robert Creasy, RIP
https://www.garlic.com/~lynn/2006i.html#30 virtual memory
https://www.garlic.com/~lynn/2007e.html#1 Designing database tables for performance?
.... of course, I might claim that even the cp67 implementation that I
encountered as undergraduate in spring of '68 ... still wasn't working
all that well either. I then proceeded to do my own algorithms,
implementation, page replacement, thrashing controls, etc. some old
email discussing the subject
https://www.garlic.com/~lynn/lhwemail.html#globallru
and other related posts on the subject
https://www.garlic.com/~lynn/subtopic.html#wsclock
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sun, 01 Apr 2007 13:21:03 -0600Morten Reistad <first@last.name> writes:
here is tale about some people at mit having experience with both cp67
and multics in that period ... and the multics coming off very poorly in
comparison ... eventually resulting in recoding sections of multics to
try and make it more favorable comparison.
https://www.multicians.org/thvv/360-67.html
it was highlighted by a local cp67 kernel change that resulted in 27 failures/auto-restarts in a single day ... where multics wouldn't have been able to even come close to that number ... just because of the lengthy restart time.
i was partially to blame for that occurance. As an undergraduate I had added the tty/ascii support for cp67 (base system support 2741 and 1052). I had played some games in the code with truncating line-length calculations to one byte. The cp67 service running at MIT wanted to add support for some sort of simulated ascii terminal device over at harvard (plotter?) which had max. line length more like 1200 bytes. Their kernel patch updated some constants for maximum line length ... w/o changing the code that played games with 1byte truncation (which then resulted in some incorrect lengths being calculated and subsequent sotrage overlays).
the science center (responsible for cp67) was on the 4th flr
of 545 tech sq.
https://www.garlic.com/~lynn/subtopic.html#545tech
the science center 360/67 machine room was on the 2nd flr and multics was on the 5th flr.
My recollection was that the MIT Urban systems lab (and their 360/67, where the referenced cp67 story takes place) was across the tech. sq courtyard in 5?? tech sq.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Can SSL sessions be compromised? Newsgroups: comp.security.misc Date: Sun, 01 Apr 2007 14:41:29 -0600"Powercat" <powercat@verizon.net> writes:
part of the issue is that most standard SSL deployments are not doing mutual authentication ... i.e. the client is using SSL to supposedly authenticate the server ... but there isn't an equivalent "mutual" SSL authentication of the client (by the server). As a result, the "SSL server" is probably attempting to validate/authenticate clients via other mechanisms ... possibly including various mechanisms where authentication information is squirreled away in cookies (and not finding that, falling back to other things, including checking for inconsistent ip-addresses)
in the early SSL stuff that we were doing for what has since come
to be called electronic commerce
https://www.garlic.com/~lynn/2007g.html#32 Can SSL sessions be compromised?
we eventually mandated SSL mutual authentication between the commerce servers and the payment gateway (this was before there was a specification and code for mutual authentication) ... we actually mandated a number of other implementation details, attempting to compensate for standard internet environment not really have been developed with business critical dataprocessing in mind.
in any case, it was during this deployment that we also realized that for online environments and/or environments where there was existing relationship between the two entties ... digital certificates and PKI with certification authorities (CAs) were redundant and superfluous.
There had to be pre-registration and installation of each merchant with the payment gateway ... and the payment gateway preregistered with each merchant. In effect, we pre-installed the trusted infromation (& public key) of each at the other's respective site(s). The traffic flow continued to look like standard defined SSL protocol ... with all the extraneous digital certificate protocol chatter ... only because they wanted to (re-)use the existing software library that they had already done (that only had support for certificate-based operation) ... aka the (trusted) information carried by the digital certificates was essentially meaningless ... since as part of the standard business relationship process ... the (trusted) information was required to pre-exist at the respective endpoints.
as before ... lots of past posts mentioning ssl and ssl digital
certificates
https://www.garlic.com/~lynn/subpubkey.html#sslcert
also, various countermeasures to SSL (and other protocol)
vulnerabilities may result in catch-22 for certification authority
industry
https://www.garlic.com/~lynn/subpubkey.html#catch22
and posts mentioning various kinds of mitm-attacks
https://www.garlic.com/~lynn/subintegrity.html#mitm
for some additional information ... our rfc index
https://www.garlic.com/~lynn/rfcietff.htm
and select Term (term->RFC#) in the RFCs listed by section
then select "NAT" in the Acronym fastpath ... i.e.
network address translation
4787 4380 4008 3947 3715 3519 3489 3424 3235 3105 3104 3103 3102
3027 3022 2993 2766 2709 2694 2663 2428 2391 1631
clicking on any RFC number, brings up that RFC in the lower RFC summary
(frame). clicking on the ".txt=nnn" field (in the RFC summary) retrieves
that RFC.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Wylbur and Paging Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sun, 01 Apr 2007 15:24:49 -0600Steve_Thompson@ibm-main.lst (Thompson, Steve) writes:
I'm sorry, i didn't intend to imply that Wylbur was done in APL ... only that it may have implemented its own monitor and workspace swapping in a manner similar to APL\360 ... i.e. its own terminal handler, dispatcher, internal storage allocation and managed its own application load/unload via a similar kind of swapping mechanism. I also didn't mean to imply that Wylbur was done in CTSS (on the 7094) which i also mentioned in the same sentence.
Another infrastructure that essentially had a similar kind of "canned" environment (running under os/360) was CPS ... conversational programming system ... which was a product released by the Boston Programming Center ... that provided for "interactive" Basic and PLI (and also did similar kind of its own swapping). For other drift ... CPS also had on optional microcode/hardware modification for 360/50 that significantly improved its performance.
I've mentioned before that science center responsible for cp67/cms
... was on the 4th flr of 545 tech sq.
https://www.garlic.com/~lynn/subtopic.html#545tech
and that multics was on the 5th flr ... and the science center's
360/67 machine room was on the 2nd flr ... another recent reference
here
https://www.garlic.com/~lynn/2007g.html#37 The Perfect Computer - 36 bits?
The "Boston Programming Center" was on the 3rd flr of 545 tech sq. In the morph of cp67/cms to vm370, the growing vm370 development group absorbed the boston progamming center (and 3rd flr) ... before moving out to the old, vacated SBC bldg. in burlington mall. In absorbing the boston programming center ... some of the CPS developers ported CPS to CMS ... in a manner analogous to my previous description of how APL\360 was ported ... the conversational stuff was moved ... but all of the monitor gorp that was in place to mask os/360 deficiencies (its own terminal handler, dispatcher, resource management, swapping, etc) could be discarded.
And as you mentioned, another similar/analogous effort in that era
... but w/o the swapping features was CICS. Where I was an
undergraduate ... the univ. was not only selected to be the first
customer CP67 install (jan68) ... but also one of the original CICS
product betatest sites. recent post mentioning having to shoot some
number of CICS bugs during that betatest
https://www.garlic.com/~lynn/2007f.html#3 FBA rant
https://www.garlic.com/~lynn/2007f.html#64 John W. Backus, 82, Fortran developer, dies
misc other posts mentioning CICS (and/or BDAM)
https://www.garlic.com/~lynn/submain.html#bdam
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Electronic signature outside Europe Newsgroups: sci.crypt Date: Sun, 01 Apr 2007 15:50:48 -0600"kravietz" <pk102006@nym.hush.com> writes:
the laywers pointed out that digital signature and PKI paradigms were
an authentication mechanism ... not a human signature paradigm
... lacking any sense of intention along with read, understood,
agrees, approves, and/or authorizes. lots of past posts discussing the
difference between electronic signatures, digital signature, human
signatures and the sense of reading, understanding, agreeing,
approving, and/or authorizing.
https://www.garlic.com/~lynn/subpubkey.html#signature
however ... there has been some amount of other "digial signature" legislation that has been passed ... ignoring the huge gap that exists between digital signatures, human signatures, and the sense of intention along with read, understood, agrees, approves, and/or authorizes (aka some technology legislation lacking any grounding in fundamental business practices).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: US Airways badmouths legacy system Newsgroups: bit.listserv.ibm-main Date: Sun, 01 Apr 2007 18:35:04 -0600timothy.sipples@ibm-main.lst (Timothy Sipples) writes:
and different kind of scenario/result involving a very large (mainframe)
cobol application
https://www.garlic.com/~lynn/2007f.html#47 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#48 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#51 Is computer history taught now?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 1960s: IBM mgmt mistrust of SLT for ICs? Newsgroups: alt.folklore.computers Date: Sun, 01 Apr 2007 21:25:23 -0600hancock4 writes:
given that only one company was able to achieve that single most
important goal ... it would even be possible for them to not dominate in
every other category/characteristic ... and still dominate the market.
recents ref/post:
https://www.garlic.com/~lynn/2007f.html#77 John W. Backus, 82, Fortran developer, dies
actually, i believe that in terms of volume, 43xx machines dominated
over vax (low to mid-range market in mainframe terms) ... and that is
separate from the rochester product sales. old email talking about
"E" architecture (43xx) machines
https://www.garlic.com/~lynn/lhwemail.html#4341
... and then starting around mid-80s ... workstations and larger PCs started to move upstream into that mid-range (mini) market.
the SHARE studies about 43xx mid-range in the late 70s and early 80s ... wasn't so much about customer support and marketing ... it was total cost of ownership. "unbundling" announcement 23jun69 was already requiring customers to cough up for numerous kinds of service. The SHARE studies indicated that 43xx would have even further dominated over VAX if they had required lower/less customer effort operating the machines (VMS had advantage vis-a-vis vm/cms, VSE, dos/vs, etc on customer people skills/cost supporting the operation). It was one of the areas that the rochester product lines tended to excel. The two areas that Endicott looked at for 43xx was lowering the customer people operation costs for small installations (single or very few machine) ... but at the other end ... enhancing the ability of a central staff to support operations of several hundred such machine.
old post giving slicing and dicing vax sales:
https://www.garlic.com/~lynn/2002f.html#0 Computers and Science Fiction
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Wylbur and CRBE Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Mon, 02 Apr 2007 01:34:44 -0600gah writes:
and
https://www.garlic.com/~lynn/2007g.html#31 Wylbur and Paging
https://www.garlic.com/~lynn/2007g.html#33 Wylbur and Paging
https://www.garlic.com/~lynn/2007g.html#36 Wylbur and Paging
CRBE and CRJE were pretty synonomous ... with terms being used pretty interchangeable (conversational remote batch/job entry)
previous post about having done a CRJE implementation by adding
terminal and editor support (based on cms edit syntax) to HASP under
os/mvt release 18.
https://www.garlic.com/~lynn/2007g.html#14 ISPF not productive
in the APL\360 and CPS scenario it was more of a situation where users got to edit/write programs/executables that resided in (small) swappable workspace. the apl & cps environments were pretty much almost a totally self-contained (virtual?) environment running on top of os/360 (with their own dispatching and other system services).
the CRBE/CRJE scenario was something more like a single application ... a (re-entrant) editor that operated on effectively a virtual carddeck/print stream (using file buffer operations) ... where the carddeck could be passed to standard (hasp or other) job initiator for execution ... and then be able to look at the resulting print stream output.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 1960s: IBM mgmt mistrust of SLT for ICs? Newsgroups: alt.folklore.computers Date: Mon, 02 Apr 2007 02:08:54 -0600warning ... long post with lots of topic drift ... (1970s, not 1960s) re:
i had seen the trend with the 43xx machines starting with the 138/148 (virgil/tully) machines (including early trend about needing to reduce customer support and operational people expenses, i.e. 43xx were the follow-on to the 138/148 machines).
I had done a lot of work on ECPS, microcode assist for 138/148 ... some old
posts
https://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#27 370 ECPS VM microcode assist
https://www.garlic.com/~lynn/94.html#28 370 ECPS VM microcode assist
and I was doing all this stuff for VAMPS
https://www.garlic.com/~lynn/submain.html#bounce
and then 16-way SMP (w/158 engines) ... recent post
https://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits?
and at the same time I was doing all the stuff turning out my resource
manager as product
https://www.garlic.com/~lynn/subtopic.html#fairshare
https://www.garlic.com/~lynn/subtopic.html#wsclock
... and they had also decided that they were going to look at changing
the policy about charging for kernel software ... i.e. the 23jun69
unbundling announcement
https://www.garlic.com/~lynn/submain.html#unbundle
had started charging for application software ... but left kernel software alone ... in any case, they selected my resource manager as the guinea pig ... so that met i had to participate in all these business planning sessions about charging for kernel software.
somewhere in all this was the spectre of the redbox install at a large
financial institution ... reference buried in this extended post
https://www.garlic.com/~lynn/2007e.html#48 time spent/day on a computer
so in all this other stuff ... including doing my own internal product
releases ... minor old email reference:
https://www.garlic.com/~lynn/2006w.html#email750430
endicott needed to put together a business team to run around the world getting together world-wide business forecast for virgil/tully ... they paired me up with one of their business people ... and we would go to various places in the world and sit down with the business people for a week and thrash out a (138/148, virgil/tully) product forecast for that area (i didn't report to endicott and/or was in any way related, but it just seemed to an interesting thing to do ... almost along the lines of a hobby ... they did pay my expenses). we would look at the current installed customer base ... what the competition had installed ... overall economic business indicators ... competitive analysis (especially clone processors in the low/mid range outside the US) and come up with a country or regional product business forecast.
Outside the US ... this was a lot more important than inside the US. Within domestic operations the regional marketing people would put together a product forecast ... but they weren't really held to it ... whatever customer domestic orders that came in, would get filled at the factory as they came in (and might be totally unrelated to the original product forecast, and the factory would have to eat any shortfall in actually sales vis-a-vis forecast).
Outside the US, it worked differently ... based on a country's product forecast, a country operation placed orders for machines from factories ... which factories then built and delivered to that country. It was then up the that country's marketing/sales people to make sure they sold all the machines that the country had ordered (based on the earlier product forecast, difference between sales & ordered was the responsibility of the country). Also, the low/mid range could be much more important outside the US ... inside the US, revenue was dominated by a very strong high-end business (for POK machines) ... but there was a much smaller high-end business for those machines outside of the US (where the low/mid range tended to play a much larger factor).
Inside the US, people could even get promoted for turning in a completely wrong forecast (that might happen to be something that some executive liked). Outside the US, people could get fired for being inaccurate in product forecast.
there used to be a joke in domestic that you could tell a failing product ... it was one that had been declared "strategic" ... which met that salesmen were then given extra incentives to sell it (and forecasters tended to be encouraged to increase the business forecast).
back to some additional resource manager topic drift ... in this post
(about cp67 automatic reboot)
https://www.garlic.com/~lynn/2007g.html#37 The Perfect Computer - 36 bits?
there was reference to this URL
https://www.multicians.org/thvv/360-67.html
in somewhat of footnote in the above webpage ... there is mentioned that a lot of the morphing of cp67 to vm370 there was "rewriting" to meeting "type 1" corporate coding standards (copyright statements in every source module, etc). However, in the rush there was a lot of simplification and dropping of more complex features (like most of the dynamic adaptive stuff that I had done as an undergraduate to CP67).
that simplification then opened up the opportunity to put a lot of stuff
that had been dropped in the cp67->vm370 morph, back into vm370 (and was
part of what prompted the resource manager) ... the other opportunity
opening was that I had continued to do cp67 & then vm370 enhancements
during the future system distraction ...
https://www.garlic.com/~lynn/submain.html#futuresys
and when that failed, there was rush to get stuff into the 370 product
pipeline (both hardware and software) ... recent reference/post
https://www.garlic.com/~lynn/2007f.html#14 more shared segment archeology
https://www.garlic.com/~lynn/2007g.html#5 Call for XEDIT freaks, submit ISPF requirements
in past posts, I've mentioned that one of the things done in support of
getting out the resource manager was automated benchmarking which was
used for both stress testing and calibration/validating the dynamic
adaptive resource controls
https://www.garlic.com/~lynn/submain.html#bench
at the start of the stress testing ... vm370 system could always be (reliably) crashed. so as part of the resource manager, code to completely restructure the kernel serialization function was added. this eventually was able to eliminate all (known) cases of failures under extreme workload stress as well as all cases of hung/zombie processes.
another part of resource manager was restructure of serveral parts of kernel to be much more oriented for multiprocessor support (very similar to the earlier cp67 structures that had been dropped/morphed in the move to vm370).
this later caused something of a (temporary) dilemma when they went to
release product support for multiprocessor operations ... lots of past
posts mentioning multiprocessor support and/or operation
https://www.garlic.com/~lynn/subtopic.html#smp
one of the initial "policies" for charging for kernel software (mentioned earlier in this post regarding the resource manager being the guinea pig) was that kernel software directly related to hardware support would still be free. the "later" problem was that much of being able to get out multiprocessor support was dependent on the kernel restructuring that was in the (charged for) resource manager (i.e. a violation of the policy if customers had to buy the resource manager in order to get hardware multiprocessor support). So the eventual resolution ... for the next "version" of the resource manager ... was something like 80-90 percent of the code was moved from the "priced" product ... to the free, base kernel.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Complete April Fools' Day RFCs Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Mon, 02 Apr 2007 09:03:39 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
... continuing long, noble tradition:
April1
4824 4042 4041 3751 3514 3252 3251 3093 3092 3091 2795 2551 2550 2549
2325 2324 2323 2322 2321 2100 1927 1926 1925 1924 1776 1607 1606 1605
1437 1313 1217 1149 1097 852 748
4824 I
The Transmission of IP Datagrams over the Semaphore Flag Signaling
System (SFSS), Bachmann A., Hofmueller J., IO. zmoelnig, 2007/04/01
(13pp) (.txt=25521)
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: 1960s: IBM mgmt mistrust of SLT for ICs? Newsgroups: alt.folklore.computers Date: Mon, 02 Apr 2007 14:37:44 -0600re:
here is paper by DEC vp of worldwide sales and marketing
http://cbi.tepper.cmu.edu/papers/cbi_workingpaper-1994-02.html
talking about IBM world-wide marketing in 1976.
turns out the previous post about virgil/tully (low/mid range) world-wide product forecasting was done in 75/76 ... and we did a lot of detailed look at factors involved in positioning against clone competition in world-trade companies (including main focus of the cited paper) ... which was already going strong and sort-of was leading wave of what was about to hit the domestic market.
one of the issues in 76 was that domestic didn't believe that it would happen here ... and so there wasn't any need for aggressive response (and w/o domestic backing ... it was much harder to justify products &/or features that would respond to such competitive forces). there were a number of added value things that were put forward as (needed) enhancements to virgil/tully that domestic marketing would disclaim any need for ... making it extremely difficult to drive thru as part of the product justification process.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 03 Apr 2007 10:39:06 -0600Del Cecchi wrote:
Boeblingen wiki page
https://en.wikipedia.org/wiki/Boeblingen
from above:
Böblingen/Sindelfingen can be called a center of both automobile and
computer industries. Daimler-Chrysler develops and manufactures its
Mercedes brand of luxury cars here.
... snip ...
Sindelfingen wiki page
https://en.wikipedia.org/wiki/Sindelfingen
from above:
Neighboring towns and cities: Boeblingen, Stuttgart, Leonberg. Note that
there is no gap between Boeblingen and Sindelfingen.
... snip ...
earlier than these series of trips in the mid-70s
https://www.garlic.com/~lynn/2007g.html#42 1960s: IBM mgmt mistrust of SLT for ICs?
https://www.garlic.com/~lynn/2007g.html#44 1960s: IBM mgmt mistrust of SLT for ICs?
https://www.garlic.com/~lynn/2007g.html#46 1960s: IBM mgmt mistrust of SLT for ICs?
starting in the very early 70s ... i got to go around doing CP/VM
consulting and/or installs at various places around the world
... including some number of HONE clone installs (online interactive
support for world-wide sales, marketing and field people)
https://www.garlic.com/~lynn/subtopic.html#hone
as well as visits to Boeblingen lab. Very early 70s trips to the Boeblingen lab ... was before a lot of "americanization" (didn't find all the other american/computer companies, american hotels, etc, that started showing up in the 80s). they put me up in a small 3-4 story "business traveler" hotel in Sindelfingen where nobody spoke English and I had to get by on very bad college German.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Tue, 03 Apr 2007 13:14:14 -0600krw <krw@att.bizzzz> writes:
oh, and Havant was the early location of the "UK" HONE datacenter ...
i.e. HONE was the infrastructure that provided for world-wide online
interactive support for sales, marketing and field people. numerous
past HONE postings
https://www.garlic.com/~lynn/subtopic.html#hone
the US grew up a number of HONE datacenters ... starting with cloned
(and highly modified) versions of the science center's CP67 system
... with majority of the business applications implemented in cms\apl.
recent posts mentioning science center port of apl\360 to cms\apl
https://www.garlic.com/~lynn/2007g.html#31 Wylbur and Paging
Over a period, this migrated from cp67 to vm370 and from cms\apl to apl\cms. In the later part of the mid-70s, all the US HONE datacenters were consolidated in northern cal. ... and we did some pretty fancy support for large "loosely-coupled" (i.e. clustered) environment supporting single-system-image and load-balancing.
In the same time-frame ... a lot of the European HONE systems were consolidated in Uithoorne (at least the branch office sales, marketing, etc) ... including Havant. EMEA hdqtrs HONE system that I had handled move for when EMEA hdqtrs moved from the states to La Defense (just outside of paris) stayed around.
for other drift ... old email from somebody on emea hdqtrs hone system
https://www.garlic.com/~lynn/2007b.html#email821214
https://www.garlic.com/~lynn/2007b.html#email821217
and for additional drift ... other old email with mentions of
hone
https://www.garlic.com/~lynn/lhwemail.html#hone
for totally different drift ... i've made several posts about the
internal network being larger than arpanet/internet from just about the
start until possibly mid-85. this is post that lists some of the
internal network nodes/sites that had additions during 1983
https://www.garlic.com/~lynn/2006k.html#8 Arpa address
including Boeblingen, Sindelfingen, Stuttgart, Havant, and Yasu. Also listed are Sumare and Rio de Janeiro Brazil and Montevideo Uruguay.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Wed, 04 Apr 2007 11:37:27 -0600proto@oanix.com wrote:
taken to another level ... you can get into all sorts of discussions about design of SQL and relational ... vis-a-vis DBMS where user/programmer has to deal with constructs like record pointers being exposed as part of the data ... and/or other infrastructure constructs that are not part of directly solving the problem of interest.
somewhat related recent posts in c.d.t and other venues
https://www.garlic.com/~lynn/2007e.html#14 Cycles per ASM instruction
https://www.garlic.com/~lynn/2007e.html#31 Quote from comp.object
https://www.garlic.com/~lynn/2007e.html#36 Quote from comp.object
https://www.garlic.com/~lynn/2007f.html#66 IBM System z9
https://www.garlic.com/~lynn/2007g.html#24 Bidirectional Binary Self-Joins
https://www.garlic.com/~lynn/2007g.html#25 Bidirectional Binary Self-Joins
https://www.garlic.com/~lynn/2007g.html#26 Bidirectional Binary Self-Joins
https://www.garlic.com/~lynn/2007g.html#41 US Airways badmouths legacy system
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market Newsgroups: bit.listserv.ibm-main Date: Wed, 04 Apr 2007 11:46:17 -0600Howard Brazee wrote:
and the above also includes reference to this URL ... which gives a
slightly different perspective on some of the issues (from the period)
http://cbi.tepper.cmu.edu/papers/cbi_workingpaper-1994-02.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market(the sky is falling!!!the sky is falling!!) Newsgroups: bit.listserv.ibm-main Date: Wed, 04 Apr 2007 13:45:33 -0600Tom Schmidt wrote:
however, this immediately previous post ... more refers to the implicit
dataprocessing costs
https://www.garlic.com/~lynn/2007g.html#49 The Perfect Computer - 36 bits?
more along the lines are the characteristics where the infrastructure has inhibitors for application implementation and deployment.
one of the things that mainframe has been really good at is the long-term deployment and operations infrastructure ... as opposed to some of the upfront implementation costs.
i've frequently mentioned that taking a well-tested application and
making it a "service" ... can take 4-10 times the original
resources. the example i've used periodically is when we were called
in to consult with small client/server startup that was interested in
doing payment transactions on their server
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
which is now frequently referred to as electronic commerce. recent
post mentioning the 4-10 times (implementation) costs (to convert an
application to business-critical dataprocessing
https://www.garlic.com/~lynn/2007f.html#37 Is computer history taught now?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness Newsgroups: alt.folklore.computers Date: Wed, 04 Apr 2007 15:11:04 -0600re:
latest update ... somewhat going back to the whole thing about import quotas from a couple decades ago (supposedly temporary measure to allow the industry breathing room to remake themselves)
Toyota's March Sales Jump, GM, Ford Fall
http://www.redorbit.com/news/business/891452/toyotas_march_sales_jump_gm_ford_fall/index.html
as well as topic drift about the C4 activity
https://www.garlic.com/~lynn/2007g.html#29 The Perfect Computer - 36 bits?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: T.J. Maxx data theft worse than first reported Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Wed, 04 Apr 2007 15:20:26 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
slightly different aspect ... from crypto mailing list
https://www.garlic.com/~lynn/aadsm26.htm#44 Governance of anonymous financial services
https://www.garlic.com/~lynn/aadsm26.htm#48 Governance of anonymous financial services
https://www.garlic.com/~lynn/aadsm26.htm#49 Governance of anonymous financial services
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Thu, 05 Apr 2007 16:09:55 -0600Rich Alderson <news@alderson.users.panix.com> writes:
current description of the instruction
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/10.58?SHELF=DZ9ZBK03&DT=20040504121320
the problem was then you still needed (potentially new) software that had the processor specific logic
one of the things that vm370 had was a table of processor cpuids and associated values. when i was doing with dynamic adaptive control algorithms and the resource manager product ... was to be able to have completely dynamic adaptive values ... w/o requiring a (software lookup) table of all possible cpuids (with corresponding values).
in theory the idea was that i could ship the resource manager ... and it could adapt to whatever processor and resources there were ... regardless of what happened ... (in theory) w/o requiring changes/updates to the software (and/or processor tables) ... even if new processor models subsequently came out.
I had done packaged internal product releases ... before the resource
manager officially shipped to customers. old email with reference:
https://www.garlic.com/~lynn/2006w.html#email750430
i've made reference before to AT&T longlines signing some sort of agreement and also getting a copy of the enhanced code (even prior to the internal package release mentioned in the above referenced email).
part of the issue was that nearly a decade later, the national marketing rep for longlines tracked me down and wanted help with the customer. Longlines had continued to run the "custom" kernel that had been supplied them ... and over the years moving it to newer and newer processors. There was nearly two orders of magnitude difference between the slowest machine that the software ran on (at the time the longlines initially obtained the software) and the fastest machine that longlines was running (at the time of the later contact).
the "problem" was that the base kernel software originally given to longlines didn't have multiprocessor support. at the time I was contacted, the marketing team wanted to sell the customer a high-end multiprocessor machine ... which would require migration to a (current) multiprocessor kernel and the customer had all these modifications (in-use) ... that weren't in the standard kernel.
and making the issue somewhat more complex was that "OCO" (object code only)
policy had been announced by that time ... recent post/reference
https://www.garlic.com/~lynn/2007f.html#67 The Perfect Computer - 36 bits?
misc. past posts mentioning the longlines situation:
https://www.garlic.com/~lynn/95.html#14 characters
https://www.garlic.com/~lynn/96.html#35 Mainframes & Unix (and TPF)
https://www.garlic.com/~lynn/97.html#15 OSes commerical, history
https://www.garlic.com/~lynn/2000.html#5 IBM XT/370 and AT/370 (was Re: Computer of the century)
https://www.garlic.com/~lynn/2000b.html#74 Scheduling aircraft landings at London Heathrow
https://www.garlic.com/~lynn/2000f.html#60 360 Architecture, Multics, ... was (Re: X86 ultimate CISC? No.)
https://www.garlic.com/~lynn/2001f.html#3 Oldest program you've written, and still in use?
https://www.garlic.com/~lynn/2001g.html#52 Compaq kills Alpha
https://www.garlic.com/~lynn/2002.html#4 Buffer overflow
https://www.garlic.com/~lynn/2002.html#11 The demise of compaq
https://www.garlic.com/~lynn/2002b.html#62 TOPS-10 logins (Was Re: HP-2000F - want to know more about it)
https://www.garlic.com/~lynn/2002c.html#11 OS Workloads : Interactive etc
https://www.garlic.com/~lynn/2002i.html#32 IBM was: CDC6600 - just how powerful a machine was it?
https://www.garlic.com/~lynn/2002k.html#66 OT (sort-of) - Does it take math skills to do data processing ?
https://www.garlic.com/~lynn/2002p.html#23 Cost of computing in 1958?
https://www.garlic.com/~lynn/2003.html#17 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003d.html#46 unix
https://www.garlic.com/~lynn/2003j.html#76 1950s AT&T/IBM lack of collaboration?
https://www.garlic.com/~lynn/2003k.html#4 1950s AT&T/IBM lack of collaboration?
https://www.garlic.com/~lynn/2003n.html#25 Are there any authentication algorithms with runtime changeable
https://www.garlic.com/~lynn/2003p.html#23 1960s images of IBM 360 mainframes
https://www.garlic.com/~lynn/2004.html#35 40th anniversary of IBM System/360 on 7 Apr 2004
https://www.garlic.com/~lynn/2004e.html#32 The attack of the killer mainframes
https://www.garlic.com/~lynn/2004m.html#58 Shipwrecks
https://www.garlic.com/~lynn/2005o.html#25 auto reIPL
https://www.garlic.com/~lynn/2005p.html#31 z/VM performance
https://www.garlic.com/~lynn/2006b.html#21 IBM 3090/VM Humor
https://www.garlic.com/~lynn/2006o.html#36 Metroliner telephone article
https://www.garlic.com/~lynn/2007d.html#55 Is computer history taugh now?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market(the sky is falling!!!the sky is falling!!) Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Thu, 05 Apr 2007 16:38:28 -0600Steve_Thompson@ibm-main.lst (Thompson, Steve) writes:
however, a recent post in totally different thread
https://www.garlic.com/~lynn/2007g.html#54 The Perfect Computer - 36 bits?
mentioning all the dynamic adaptive code that I had done in the resource manager ... originally for cp67 ... but was dropped in the initial morph of cp67 to vm370 ... which opened up the opportunity that allowed me to later ship it as a completely separate kernel (add-on) product.
In any case, the (base) vm370 product had table of processor cpuids ... however I was able to eliminate that table with the dynamic adaptive code in the resource manager.
Another recent post mentioning the resource manager and dynamic
adaptive code
https://www.garlic.com/~lynn/2007g.html#44 1960s: IBM mgmt mistrust of SLT for ICs?
one of the issues for the resource manager ... was with the litigation
leading up to the 23jun69 unbundling announcement ... numerous past
posts:
https://www.garlic.com/~lynn/submain.html#unbundle
the case was made that charging for software applied to application software, but that kernel software should still be free (since it was required for operation of the hardware). later, somewhat as circumstances were changing ... the release of my resource manager was selected to be the (initial) guinea pig for charging for kernel software.
part of the reason that Amdahl was able to (initially) move into the
highend (in the mid to late 70s) was that the company had taken a
side-trip into Future System project (which was going to replace all
370s ... and be as radically different from 370 ... as 360 had been
different from the machines that had gone before it). Misc. past posts
mentioning FS
https://www.garlic.com/~lynn/submain.html#futuresys
When FS was canceled ... there was quite a bit of scrambling to
repopulate the 370 product pipeline. some recent posts also mentioning
the period:
https://www.garlic.com/~lynn/2007g.html#13 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits?
i've even claimed that scrambling was at least partially responsible for POK being able to convince corporate to kill off vm370 product and move all the vm370 development people to POK to work on mvs/xa (additional resources required to meet the schedule after FS was killed). Endicott did manage to pickup part of the mission and "save" a very small number of the original development people (from going to pok) to continue to work on vm370.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 06 Apr 2007 08:44:20 -0600jmfbahciv writes:
there was a (software) table of processor numbers for all known/supported processors at the time the product shipped ... with associated processor specific action/values.
rather than doing a store cpuid and then a lot of code that did (inline) compares for a specific processor type ... and branch to code for that specific processor type ... there was a (software) table of each of the processor types ... do a store cpuid and then find the corresponding processor type in the table of processor types ... which then had details for what to do for processor specific handling.
what i described about doing in the resource manager ... is being able to determine the needed processing by other characteristics ... w/o needing to match on processor specific cpuid. the dynamic adaptive code in the resource manager was supposed to dynamically adapt to things like workload and configuration. this allowed the resource manager to also dynamically adapt to processor types ... and in the case of the AT&T longlines example ... adapt to a decade of news processor (types) that were introduced for a decade after the specific code was given to longlines (not known at the time that specific code was generated)
and in this post ... referring to PCM (plug compatible manufactur)
clone processors
https://www.garlic.com/~lynn/2007g.html#55 IBM to the PCM market(the sky is falling!!!the sky is falling!!
the dynamic adaptive resource manager was also able to adapt to a variety of processor types/characteristics produced by other vendors.
there was a joke associated with the original shipment of the resource manager. at the time, somewhat the state of the art (in most other operating system products) was to have a lot of processor specific code as well as a lot of (manual) "tuning" knobs ... that allowed installations to (manually) adapt the operation to the customer's workload and configuration.
some number of corporate people reviewed the resource manager specifications and felt that it was extremely difficent that it didn't also have a whole bunch of manual tuning knobs ... and they wouldn't agree/approve to shipping the product unless manual tuning knobs were added.
so i added some manual tuning knobs ... documented what they did, included formulas and descriptions on how the tuning knobs were included in the dynamic adaptive calculations (along with shipping all the source code).
so a couple decades later ... we are doing a customer call on large
financial institution in the far east ... with respect to product
that we were currently producing
https://www.garlic.com/~lynn/subtopic.html#hacmp
and one of the younger IT people asked me if I was the same person that the resource manager was named after. He mentioned that it was studied in his computer classes at Univ. of Waterloo. I mentioned if they had studied the joke?
In any case, the joke has to do with "degress of freedom" from dynamic adaptive, feedback, feed forward, etc control algorithms ... and how much degress of freedom the dynamic adaptive controls had vis-a-vis the manual tuning controls.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market(the sky is falling!!!the sky is falling!!) Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Fri, 06 Apr 2007 09:27:07 -0600m42tom-ibmmain@YAHOO.COM (Tom Marchant) writes:
my observation was competitive offerings/response ... as opposed to what specifically it was that Amdahl was shipping (or why he might have decided leave).
The corporation had taken a side-track into the FS project
https://www.garlic.com/~lynn/submain.html#futuresys
which diverted/curtailed a lot of stuff in the 370 product pipeline.
part of the reference was to talk Amdahl gave in the early 70s at MIT
... some number of us from the science center
https://www.garlic.com/~lynn/subtopic.html#545tech
were in the back of the hall ... but didn't say anything ... in any case ... he was asked a number of questions about how he got backing for his company. He mentioned that there was already a few hundred billion dollars in (customer) application 360/370 software ... and even if IBM were to completely walk away from 370 (which might be considered a veiled reference to future system project), there was enuf customer application 360/370 software to keep him in business thru the end of the century.
so some of the other part of the business/competitive reference ... i.e.
https://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#23 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#29 The Perfect Computer - 36 bits?
when FS was killed, there was something of a mad rush to get stuff back into the 370 product pipeline. The standard product cycle was 7-8 yrs ... and so the "next generation" stuff (i.e. "811" or 370-XA) then wasn't going to be out before the early 80s.
So how to revitalize the 370 product line in much fewer yrs ... quickly getting stuff back into development (in parallel with the work going on to produce 370-xa ... in effect two parallel efforts going on at the same time).
The answer was the 303x product line.
The 370/158 had microengine that ran both 370 emulation code as well as "integrated channel" microcode. They took the 158 microengine with the integrated channel microcode (and w/o the 370 microcode) and called it a "channel director". They then took the 370/158 microengine with the 370 microcode (and w/o the 370 integrated channel microcode) and packaged it as 3031. A standard 3031 might be considered a multiprocessor configuration since it had two 158 microengines ... one dedicated to 370 execuation and one dedicated to integrated channel microcode.
The 3032 was a 370/168 repackaged to use one or more 303x channel directors.
The 3033 was the 370/168 wiring diagram mapped to newer/faster chip technology. The new chips had something like ten times the circuits per chip ... but was basically only 20percent faster (about the same level technology as being used by Amdahl at the time). However ... just using the same wiring diagram would result in the machine only being about 20percent faster than (3mip) 168-3 ... or about 3.6mips (which was much slower than Amdahl's machine). As a result, there was somewhat of a rush program to redo critical sections of the machine logic to better use more onchip circuits. The result was a machine that shipped around 4.5mips ... rather than 3.6mips.
The above reference posts (including some interchange with an engineer that worked in POK at the time) ... also mentioned that a couple of us had co-opt'ed the spare time of some of the processor engineers working on 3033 to help with the design of a 16-way smp machine. everybody thot it was a fantastic machine ... until somebody happened to point out to the head of POK that the favorite son operating system ... wasn't likely to be able to have 16-way smp support for possible another couple decades (definitly not within the lifetime of the specific machine). Then some people were invited to never show up on POK property again.
... in any case, eventually with the 303x out the door, that group then could play "leap-frog" projects with the 3081 group ... and start work on 3090.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Can SSL sessions be compromised? Newsgroups: comp.security.misc Date: Fri, 06 Apr 2007 10:13:15 -0600comphelp@toddh.net (Todd H.) writes:
SSL is suppose to do two things ... 1) are you really talking to the webserver that you think you are talking to and 2) hide/encrypt information during transmission.
the attacks that I'm aware have been with regard to the first item ... including allowing various kinds of MITM-attacks (as mentioned in previous posts).
recent post about MITM-attack
https://www.garlic.com/~lynn/aadsm26.htm#47 SSL MITM-attacks make the news
as well blog discussion
THREATWATCH: MITB SPOTTED: MITM OVER SSL FROM WITHIN THE BROWSER
https://financialcryptography.com/mt/archives/000884.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market(the sky is falling!!!the sky is falling!!) Newsgroups: bit.listserv.ibm-main,alt.folklore.computersDate: Fri, 06 Apr 2007 10:57:03 -0600
m42tom-ibmmain@ibm-main.lst (Tom Marchant) writes:
Wrong.
IBM has always specified what hardware is required to run their software.
When IBM introduced MVS/SE, it required some new instructions to run.
Amdahl processors did not implement those instructions, and was not
able to run MVS/SE until Amdahl provided support for those instructions.
In point of fact, that support was in the form of a software product that
emulated those instructions.
Amdahl also licensed that software to some companies that were
running on older IBM processors that did not implement those
instructions either, and so could not run MVS/SE either without
MVS/SE Assist.
other posts in the thread:
https://www.garlic.com/~lynn/2007g.html#50 IBM to the PCM market
https://www.garlic.com/~lynn/2007g.html#51 IBM to the PCM market(the sky is falling!!!the sky is falling!!)
https://www.garlic.com/~lynn/2007g.html#55 IBM to the PCM market(the sky is falling!!!the sky is falling!!)
https://www.garlic.com/~lynn/2007g.html#57 IBM to the PCM market(the sky is falling!!!the sky is falling!!)
two things that eventually shipped in 3033 (mid-life kickers?) ... >16mbyte storage support and cross-memory services.
disks were not keeping up with system performance ... and so there was more & more reliance on using greater amounts of real storage for caching and other mechanisms for keeping stuff around in order to maintain processor thruput.
4341s were coming on the scene ... and you were going to be able to do cluster of 4341s that had higher aggregate mip rate than 3033, 5-6 times the aggregate real storage and 3-4 times the channel capacity.
staying within 24bit addressing (both real and virtual) came up with a gimmick to re-assign two unused bits in the (370) page table entry ... to specify up to 2**14 4k pages (64mbytes) rather than 2**12 4k pages (16mbytes) ... real&virtual addressing was still limited to 16mbytes ... but the page table entry could take a 16mbyte virtual address and remap it to a 64mbyte real address. then (31bit) I/O IDALs could be used to doing transfer into/out-of the area above "16mbyte" line. Stuff that had to absolutely be (16mbyte) "below-the-line" had to be moved.
old email about being asked how to do the implementation
https://www.garlic.com/~lynn/2006t.html#email800121
so the other midlife kicker was (dual address space) cross-memory services. the basic os/360 services paradigm was pointer passing and services directly accessing parameters and values (that the pointers referenced). in real memory (or single address space) operation ... this was simple. It became much more difficult with the move from SVS to MVS ... where some number of subsystem services (outside the kernel) find themselves in their own address space. MVS started with the kernel taking half of every 16mbyte virtual address space ... leaving the other half for application. However, to allow subsystem services (in separate virtual address space) to access data/parameters from invoking applications, the "common segment" hack was invented (which appears in all address spaces ... somewhat similar to the kernel image). Applications could squirrel away stuff in the common segment and then invoke subsystem ... the kernel would switch address spaces to the appropriate subsystem ... which could then pickup the applications stuff out of the common segment.
the problem was that for larger configurations with large number of different subsystems and applications ... the common segment was ballooning out of control. A large customer configuration might find itself with 16mbyte virtual address space, 8mbytes taken by the mvs kernel and five mbytes taken by (ballooning, out of control, common segment), leaving only three mbytes for application.
one place that was particularly feeling the hurt was burlington chip
foundary ... that had a 7mbyte chip design fortran program. old email
reference (which discusses a number of different things)
https://www.garlic.com/~lynn/2006b.html#email800310
https://www.garlic.com/~lynn/2006v.html#email800310
https://www.garlic.com/~lynn/2006v.html#email800310b
so dual-address space (cross-memory services) was added to 3033 ... supposedly allowing subsystem running in one virtual address space to "reach" across into an application's virtual address space (w/o requiring the data to be staged thru the common segment).
however, it wasn't completely roses. the 3033 had basically the same sized TLB STO-stack as the 168 (i.e. i.e. maximum of number of different virtual address spaces that the hardware could keep cached addresses for simultaneously). dual-address space hardware support put some amount of additional stress on the TLB STO-stack ... resulting in increased number of TLB misses (resulting in some amount of performance degradation).
lots of past posts mentioning 3033 dual-address space feature
https://www.garlic.com/~lynn/2002g.html#17 Black magic in POWER5
https://www.garlic.com/~lynn/2002g.html#18 Black magic in POWER5
https://www.garlic.com/~lynn/2002l.html#51 Handling variable page sizes?
https://www.garlic.com/~lynn/2002l.html#57 Handling variable page sizes?
https://www.garlic.com/~lynn/2003d.html#53 Reviving Multics
https://www.garlic.com/~lynn/2003d.html#69 unix
https://www.garlic.com/~lynn/2003g.html#13 Page Table - per OS/Process
https://www.garlic.com/~lynn/2003m.html#29 SR 15,15
https://www.garlic.com/~lynn/2004f.html#53 Infiniband - practicalities for small clusters
https://www.garlic.com/~lynn/2004n.html#26 PCIe as a chip-to-chip interconnect
https://www.garlic.com/~lynn/2004n.html#54 CKD Disks?
https://www.garlic.com/~lynn/2004o.html#18 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2004o.html#57 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005.html#3 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005b.html#53 The mid-seventies SHARE survey
https://www.garlic.com/~lynn/2005c.html#63 intel's Vanderpool and virtualization in general
https://www.garlic.com/~lynn/2005d.html#62 Misuse of word "microcode"
https://www.garlic.com/~lynn/2005f.html#7 new Enterprise Architecture online user group
https://www.garlic.com/~lynn/2005f.html#57 Moving assembler programs above the line
https://www.garlic.com/~lynn/2005p.html#18 address space
https://www.garlic.com/~lynn/2005p.html#19 address space
https://www.garlic.com/~lynn/2005q.html#41 Instruction Set Enhancement Idea
https://www.garlic.com/~lynn/2005q.html#48 Intel strikes back with a parallel x86 design
https://www.garlic.com/~lynn/2006.html#39 What happens if CR's are directly changed?
https://www.garlic.com/~lynn/2006b.html#25 Multiple address spaces
https://www.garlic.com/~lynn/2006b.html#28 Multiple address spaces
https://www.garlic.com/~lynn/2006e.html#0 About TLB in lower-level caches
https://www.garlic.com/~lynn/2006i.html#33 virtual memory
https://www.garlic.com/~lynn/2006p.html#10 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006r.html#26 A Day For Surprises (Astounding Itanium Tricks)
https://www.garlic.com/~lynn/2006r.html#32 MIPS architecture question - Supervisor mode & who is using it?
https://www.garlic.com/~lynn/2006s.html#42 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006t.html#23 threads versus task
https://www.garlic.com/~lynn/2006x.html#23 Multiple mappings
https://www.garlic.com/~lynn/2006y.html#16 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2006y.html#39 Multiple mappings
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Can SSL sessions be compromised? Newsgroups: comp.security.misc Date: Fri, 06 Apr 2007 11:14:57 -0600comphelp@toddh.net (Todd H.) writes:
note that SSL is fairly, large, complex, expensive infrastructure to deploy with the certification authorities, PKIs, digital certificates, etc ... all primarily addressed at the part of SSL directed at preventing things like MITM-attacks.
the encryption part, by comparison, is much more reliable and trusted. however, there are much simpler and less expensive ways to do such encryption (if you weren't trying for MITM countermeasures).
to make the situation even more interesting ... there have been numerous discussions about the period when SSL was introduced ... that there actually hadn't been any known fraud from evesdropping attacks (listening to unencrypted transmissions) ... but there numerous situations where fraud resulted in all kinds of end-point attacks and MITM-attacks.
as a result, the evesdropping countermeausres (i.e. the encryption) was possibly the least needed ... while the MITM and end-point protections were the most needed. The additional, very expensive and extreme complexity in SSL was in large part justified as being countermeasures to the much more prevalent vulnerabilities (not the encryption for the evesdropping countermeasures).
however, all that additional complexity and very expensive infrastructure appears to have provided little additional security in the form of effective countermeasures to numerous kinds of MITM and end-point attacks.
i would contend that the encryption part of SSL is by far and away the more secure part of SSL ... and also possibly the least needed ... in terms of countermeasures to prevalent attacks (before the introduction of SSL).
the counter argument is that once SSL had been deployed ... that since the encrypted/transmission part has by far and away the highest level of security ... that then the attackers go after the weakest points ... the MITM and end-point attacks
lots of past posts mentioning SSL
https://www.garlic.com/~lynn/subpubkey.html#sslcert
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 06 Apr 2007 13:25:24 -0600Rich Alderson <news@alderson.users.panix.com> writes:
was about the resource manager being able to eliminate the explicit table of cpu/processor models that controlled certain kernel characteristics
so the 370 store cpuid instruction ... the reference for the complete
(current) instruction definition and all fields was provide in the
previous post
https://www.garlic.com/~lynn/2007g.html#54 The Perfect Computer - 36 bits?
includes all the "stuff" ... model, serial, and some additional other stuff (like lpar information, if running in a virtual machine, etc)
the model/processor type part would allow simplified code to perform various model specific/dependent operations.
the serial number part would possibly aid in doing various software licensing.
as mentioned previously ... software charging/licensing came into being
with the 23jun69 unbundling announcement
https://www.garlic.com/~lynn/submain.html#unbundle
current genre sometimes refer to such stuff under the heading of
DRM. old post
https://www.garlic.com/~lynn/2007b.html#56 old lisa info
with some old email mentioning that apple lisa shipped with
serial number feature ... that could be used for implementing
various stuff in support of DRM-like operation
https://www.garlic.com/~lynn/2007b.html#email830213
for a lot of of topic drift ... there was a serial number feature announced for intel processors in the 90s ... that got thoroughly trounced on the grounds that it might be used for privacy invasive operations.
the current feature that sometimes is referred to as possibly also being leveraged for privacy invasive operations is the TPM/TCP/etc stuff for trusted computing
this thread/posts
https://www.garlic.com/~lynn/aadsm5.htm#asrn1
https://www.garlic.com/~lynn/aadsm5.htm#asrn2
https://www.garlic.com/~lynn/aadsm5.htm#asrn3
https://www.garlic.com/~lynn/aadsm5.htm#asrn4
got started when I mentioned that I was giving a security/assurance talk in the trusted computing track at an Intel Developers Conference.
also reference here
https://www.garlic.com/~lynn/index.html#presentation
this set of posts makes reference to a whole series of patents ...
some of them related to high assurance chip/device operation
https://www.garlic.com/~lynn/aadsm26.htm#48 Governance of anonymous financial services
https://www.garlic.com/~lynn/aadsm26.htm#49 Governance of anonymous financial services
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Fri, 06 Apr 2007 18:02:34 -0600Del Cecchi <cecchinospam@us.ibm.com> writes:
how, 'bout pok plant site and myers corner ... or former myers corner
... just doing search engine, turns up
http://www.hvedc.com/siteadmin/upload/167-155MyersCornersRoad.pdf
somewhat fading memory ... but i think sindelfingen and boeblingen were closer than myers corners and pok plant site ... or closer than the (former) san jose plant site and the (former) santa teresa lab (now silicon valley lab).
for total topic drift, i was on a trip in DC the week before they had the opening ceremony for santa teresa lab. It had been originally going to be called the Coyote lab (taking the name from the closest post office) ... however, the week before, there was this demonstration on the steps of the capital (i may have seen it, but was in no way part of it) by the "Coyote" organization. They managed to quickly change the name to santa teresa lab before the opening ceremony (after the closest main road).
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sat, 07 Apr 2007 09:34:37 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
and for additional topic drift ... recent news URLs
Forrester Research Questions the Future of NAC
http://www.networkcomputing.com/channels/security/showArticle.jhtml?articleID=198800907
Forrester: Today's NAC is whack
http://www.infoworld.com/article/07/04/05/HNforresternacdead_1.html
NAC Attack: Today's Products Will Fail, Report Says
http://www.eweek.com/article2/0,1895,2112120,00.asp
What you need to know about NAC
http://www.computerworld.com/action/article.do?command=viewArticleBasic&taxonomyId=16&articleId=9014179&taxonomyId=16&articleId=9014179
...
so some of this about doing end-to-end authentication (including device authentication ... as per prior drift) could be consistent with ipsec from early 90s.
I've contented that both SSL (from a little client/server startup) and VPNs both appeared about the same time ... in part prompted by the difficulty of adopting ipsec (and getting end-to-end low-level protocol authentication/security deployed in end-nodes).
at '94 ietf meeting in san jose, somebody that we had worked with quite a bit, introduced VPN in the gateway working group (i.e. implemented in boundary routers). My view was that it resulted in some amount of consternation from the ipsec camp. It was semi-resolved when the ipsec camp took to calling VPN "lightweight" ipsec (which, in turn, sort-of met that regular ipsec was now "heavyweight" ipsec). VPN in boundary routers side-stepped the difficulty of deploying a lot of new security and authentication in low-level tcp/ip protocol stack (which typical also required a deploying new system/kernel for all the systems) for all the end-point systems.
in the same period, SSL also appeared ... as an end-point to end-point solution ... but implemented in application layer ... again bypassing the difficulty related to low-level protocol and kernel change-over in large variety of end-point nodes.
for other drift ... lots of past posts mentioning SSL
https://www.garlic.com/~lynn/subpubkey.html#sslcert
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: alt.folklore.computers Date: Sat, 07 Apr 2007 10:26:16 -0600greymaus writes:
problem were these old folded letters written in the late '40s by my
wife's mother from the far east to her mother ... i couldn't eliminate
the creases (using flatbed scanner) ... i eventually had to rescan with
a multifunction machine (fax, printer, scanner) which pulled the paper
across the scan line (and in so doing also flattened the creases).
https://www.garlic.com/~lynn/2006b.html#27 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006b.html#33 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#27 Mount DASD as read-only
https://www.garlic.com/~lynn/2006s.html#44 Universal constants
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Sat, 07 Apr 2007 12:48:21 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
Globalisation's offspring; How the new multinationals are remaking the old
http://www.economist.com/opinion/displaystory.cfm?story_id=8960441
posts in this thread:
https://www.garlic.com/~lynn/2007g.html#50
https://www.garlic.com/~lynn/2007g.html#51
https://www.garlic.com/~lynn/2007g.html#55
https://www.garlic.com/~lynn/2007g.html#57
https://www.garlic.com/~lynn/2007g.html#59
and other recent topic drift
https://www.garlic.com/~lynn/2007g.html#6 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#35 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#52 U.S. Cedes Top Spot in Global IT Competitiveness
and this has cross-over about the development cycle for new processors
and the development cycle for new automobiles
https://www.garlic.com/~lynn/2007g.html#29 The Perfect Computer - 36 bits?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Memory Mapped Vs I/O Mapped Vs others Newsgroups: alt.folklore.computers Date: Sun, 08 Apr 2007 03:02:41 -0600Frank McCoy <mccoyf@millcomm.com> writes:
and lots of posts about having first written support for memory mapped
filesystem in the early 70s
https://www.garlic.com/~lynn/submain.html#mmap
i got home terminal in mar70 ... 2741 & 134 something baud. this was before all the encrypting stuff.
however, one of the more interesting exercises that i remember was a business trip in the early 70s in europe ... and figuring out how to read my email back in the states.
however, as the internal network grew (i.e. it was larger than the
internet/arpanet from just about the beginning until possibly sometime
mid-85)
https://www.garlic.com/~lynn/subnetwork.html#internalnet
and number of home terminals proliferated ... corporate made a requirement that all lines/links leaving the corporate premises had to be encrypted. sometime in the mid-80s, i remember somebody commenting that more than half of all link encryptors in the world were on the internal network.
but much earlier than that ... it also became a requirement for the home terminal program ... and then people taking portable terminals on trips ... required encrypted access. this resulted in a project that produced a special internal corporate 1200baud encrypting modem ... that included doing dynamic session key generation and key exchange.
for real topic drift ... some recent posts mentioning SSL ... which
is the current common prevalent operation that does dynamic session
key generation and key exchange:
https://www.garlic.com/~lynn/2007g.html#60 Can SSL sessions be compromised?
https://www.garlic.com/~lynn/2007g.html#63 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/aadsm26.htm#50 DNSSEC to be strangled at birth
past posts mentioning corporate home terminal program and/or corporate
encrypting modems.
https://www.garlic.com/~lynn/2002d.html#11 Security Proportional to Risk (was: IBM Mainframe at home)
https://www.garlic.com/~lynn/2003i.html#62 Wireless security
https://www.garlic.com/~lynn/2004q.html#57 high speed network, cross-over from sci.crypt
https://www.garlic.com/~lynn/2006p.html#35 Metroliner telephone article
https://www.garlic.com/~lynn/2006t.html#5 Are there more stupid people in IT than there used to be?
https://www.garlic.com/~lynn/2007c.html#30 Securing financial transactions a high priority for 2007
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Unusual Floating-Point Format Remembered? Newsgroups: comp.arch.arithmetic,comp.dsp,alt.folklore.computers Date: Sun, 08 Apr 2007 04:15:14 -0600"Quadibloc" <jsavard@ecn.ab.ca> writes:
a 360/67 duplex could have up to 2mbytes real storage. 360/67 multiprocessor introduced the "channel controller" ... which was a separate box ... that provided for hardware configuration, the channel controller switches could have the whole configuration as one large operations ... which all processors accessing all memory and all channels. The configuration could also be "split" and run as independent processors ... with arbitrary (256kbyte) memory banks assigned to specific processors.
there was also LCS (large capacity storage) ... which was 8mic memory ... i think you could get 2mbyte LCS from IBM (2361) ... as well as 8mbyte LCS from places like Ampex. I'm aware of (ampex 8mbyte) LCS boxes being installed on at least 360/50s, 360/65(67)s, and 360/75s. I believe the LCS boxes on 360/67s were only used in non-relocate (i.e. 360/65) mode.
Various kinds of LCS software support was developed in that period ... some would use it directly as extension of regular storage for both executables as well as data. Some software attempted to specially allocated it ... so only data was allocated in LCS (executables wouldn't be loaded into the area). Other software support treated it as electronic disk (somewhat like some of the PC electronic disks) ... where files were initialized in LCS ... and then were "copied" to regular memory before being used.
past posts mentioning LCS
https://www.garlic.com/~lynn/2000.html#7 "OEM"?
https://www.garlic.com/~lynn/2000e.html#2 Ridiculous
https://www.garlic.com/~lynn/2000e.html#3 Ridiculous
https://www.garlic.com/~lynn/2001f.html#51 Logo (was Re: 5-player Spacewar?)
https://www.garlic.com/~lynn/2001j.html#15 Parity - why even or odd (was Re: Load Locked (was: IA64 running out of steam))
https://www.garlic.com/~lynn/2003c.html#62 Re : OT: One for the historians - 360/91
https://www.garlic.com/~lynn/2003c.html#63 Re : OT: One for the historians - 360/91
https://www.garlic.com/~lynn/2003d.html#28 Why only 24 bits on S/360?
https://www.garlic.com/~lynn/2003g.html#49 Lisp Machines
https://www.garlic.com/~lynn/2003p.html#41 comp.arch classic: the 10-bit byte
https://www.garlic.com/~lynn/2004.html#21 40th anniversary of IBM System/360 on 7 Apr 2004
https://www.garlic.com/~lynn/2004c.html#39 Memory Affinity
https://www.garlic.com/~lynn/2004e.html#4 Expanded Storage
https://www.garlic.com/~lynn/2004o.html#57 Integer types for 128-bit addressing
https://www.garlic.com/~lynn/2005c.html#11 The mid-seventies SHARE survey
https://www.garlic.com/~lynn/2005j.html#13 Performance and Capacity Planning
https://www.garlic.com/~lynn/2005k.html#19 The 8008 (was: Blinky lights WAS: The SR-71 Blackbird was designed ENTIRELYwith slide rules)
https://www.garlic.com/~lynn/2006.html#15 S/360
https://www.garlic.com/~lynn/2006c.html#42 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006c.html#44 IBM 610 workstation computer
https://www.garlic.com/~lynn/2006l.html#10 virtual memory
https://www.garlic.com/~lynn/2006l.html#43 One or two CPUs - the pros & cons
https://www.garlic.com/~lynn/2006r.html#35 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006r.html#36 REAL memory column in SDSF
https://www.garlic.com/~lynn/2006s.html#16 memory, 360 lcs, 3090 expanded store, etc
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: U.S. Cedes Top Spot in Global IT Competitiveness Newsgroups: alt.folklore.computers Date: Sun, 08 Apr 2007 11:13:56 -0600krw <krw@att.bizzzz> writes:
past posts in this thread:
https://www.garlic.com/~lynn/2007g.html#6 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#7 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#34 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#35 U.S. Cedes Top Spot in Global IT Competitiveness
https://www.garlic.com/~lynn/2007g.html#52 U.S. Cedes Top Spot in Global IT Competitiveness
other topic drift
https://www.garlic.com/~lynn/2007f.html#41 time spent/day on a computer
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: alt.folklore.computers Date: Sun, 08 Apr 2007 12:09:53 -0600Charles Shannon Hendrix <shannon@news.widomaker.com> writes:
i've had past discussions that spring work contributed to java ... since some part of spring had optimized payload download of applications
although other comments are that java went on at the same time and
independent of the spring activity ... past discussion (including
abstract from spring paper on client-side stub interpreter)
https://www.garlic.com/~lynn/2003e.html#51 A Speculative question
at one point we were invited to come in and work on commercializing
spring and getting it out the door ... in part having done some work on
SCI in the past ... as well as having done HA/CMP product
https://www.garlic.com/~lynn/subtopic.html#hacmp
in similar manner ... some claims that the pink work morphed into taligent (an object application environment).
other posts mentioning pink, taligent, and/or spring
https://www.garlic.com/~lynn/2000.html#10 Taligent
https://www.garlic.com/~lynn/2000e.html#42 IBM's Workplace OS (Was: .. Pink)
https://www.garlic.com/~lynn/2000e.html#45 IBM's Workplace OS (Was: .. Pink)
https://www.garlic.com/~lynn/2000e.html#46 Where are they now : Taligent and Pink
https://www.garlic.com/~lynn/2000e.html#48 Where are they now : Taligent and Pink
https://www.garlic.com/~lynn/2001j.html#32 Whom Do Programmers Admire Now???
https://www.garlic.com/~lynn/2001j.html#36 Proper ISA lifespan?
https://www.garlic.com/~lynn/2001n.html#93 Buffer overflow
https://www.garlic.com/~lynn/2002i.html#60 Unisys A11 worth keeping?
https://www.garlic.com/~lynn/2002j.html#76 Difference between Unix and Linux?
https://www.garlic.com/~lynn/2002m.html#60 The next big things that weren't
https://www.garlic.com/~lynn/2003d.html#45 IBM says AMD dead in 5yrs ... -- Microsoft Monopoly vs. IBM
https://www.garlic.com/~lynn/2003e.html#28 A Speculative question
https://www.garlic.com/~lynn/2004c.html#53 defination of terms: "Application Server" vs. "Transaction Server"
https://www.garlic.com/~lynn/2004p.html#64 Systems software versus applications software definitions
https://www.garlic.com/~lynn/2005b.html#40 [Lit.] Buffer overruns
https://www.garlic.com/~lynn/2005f.html#38 Where should the type information be: in tags and descriptors
https://www.garlic.com/~lynn/2005i.html#42 Development as Configuration
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: alt.folklore.computers Date: Sun, 08 Apr 2007 13:26:24 -0600re:
I had also somewhat helped spawned such a project in the very early 80s ... that included objectives that the kernel would be portable across a variety of different hardware architectures ... and various other topics under the heading of programming technologies.
however, it morphed into a major operating system rewrite project and at one point had couple hundred people writing specs for it .. and eventually collapsed of its own weight (something analogous to black hole implosion) sometime in the mid-80s.
it possibly could be viewed as a mini-FS event
https://www.garlic.com/~lynn/submain.html#futuresys
... but this time just for operating system/kernel ... with large numbers of different people in the corporation wanting to make sure their own favorite feature/gismo was incorporated.
I had invisioned something much more like microkernel or what MACH got around to doing ... effectively much smaller than the (then) existing vm370 kernel ... and other features layered on top.
possibly contributing problem was a large body of corporate experience
was based on operating system equating to large homogeneous monolithic
operation ... as opposed to well layered structune on microkernel
... and heavily optimized so it wouldn't have performance penalty of
many layered archectures ... pet-peeve osi/iso
https://www.garlic.com/~lynn/subnetwork.html#xtphsp
As independent effort to demonstrate the opposite of what was happening to the massive operating system rewrite project ... i selected to move the vm370 kernel spoolfile system, out of the kernel and into a virtual address space ... along with rewriting the assembler implementation from scratch in Pascal.
It also didn't hurt that the spool file system represented a major
networking thruput bottleneck for high-speed backbone effort
https://www.garlic.com/~lynn/subnetwork.html#hsdt
and i needed the rewrite to speed up aggregate thruput by two orders of magnitude.
i was able to simplify parts of the implementation ... because i had also done a paged-mapped API for disk access in the early 70s ... which had all sorts of high-level optimized performance thruput ... and could be leveraged by the virtual address space implementation for spool file system.
this also came up in thread drift about the "recent" appearance of virtual
appliances for the "recent" virtual machine (hypervisor) implementations
... which could be considered a "new" generation of operating systems(?)
https://www.garlic.com/~lynn/2006t.html#46 To RISC or not to RISC
https://www.garlic.com/~lynn/2006w.html#25 To RISC or not to RISC
https://www.garlic.com/~lynn/2006x.html#6 Multics on Vmware ?
https://www.garlic.com/~lynn/2006x.html#8 vmshare
misc. past posts mentioning the demonstration spool file system rewrite
(as an example of a lightweight paradigm ... as alternative to the
humongous effort that the mainline operating system rewrite project was
turning into; as well as means of getting two orders of magnitude
aggregate thruput increase for hsdt):
https://www.garlic.com/~lynn/2000b.html#43 Migrating pages from a paging device (was Re: removal of paging device)
https://www.garlic.com/~lynn/2002b.html#44 PDP-10 Archive migration plan
https://www.garlic.com/~lynn/2003b.html#33 dasd full cylinder transfer (long post warning)
https://www.garlic.com/~lynn/2003b.html#44 filesystem structure, was tape format (long post)
https://www.garlic.com/~lynn/2003b.html#46 internal network drift (was filesystem structure)
https://www.garlic.com/~lynn/2003g.html#27 SYSPROF and the 190 disk
https://www.garlic.com/~lynn/2003k.html#26 Microkernels are not "all or nothing". Re: Multics Concepts For
https://www.garlic.com/~lynn/2003k.html#63 SPXTAPE status from REXX
https://www.garlic.com/~lynn/2004g.html#19 HERCULES
https://www.garlic.com/~lynn/2004m.html#33 Shipwrecks
https://www.garlic.com/~lynn/2004p.html#3 History of C
https://www.garlic.com/~lynn/2005d.html#38 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005j.html#58 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
https://www.garlic.com/~lynn/2005n.html#36 Code density and performance?
https://www.garlic.com/~lynn/2005s.html#28 MVCIN instruction
https://www.garlic.com/~lynn/2005s.html#46 Various kinds of System reloads
https://www.garlic.com/~lynn/2005s.html#50 Various kinds of System reloads
https://www.garlic.com/~lynn/2006.html#35 Charging Time
https://www.garlic.com/~lynn/2006e.html#36 The Pankian Metaphor
https://www.garlic.com/~lynn/2006k.html#51 other cp/cms history
https://www.garlic.com/~lynn/2006o.html#64 The Fate of VM - was: Re: Baby MVS???
https://www.garlic.com/~lynn/2006p.html#11 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006q.html#27 dcss and page mapped filesystem
https://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2006t.html#45 To RISC or not to RISC
https://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007f.html#33 Historical curiosity question
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: PAAppViewer3 (AppViewer3)? Newsgroups: alt.folklore.computers Date: Sun, 08 Apr 2007 17:20:28 -0600"Andrew McLaren" <andrew@somewhere.com> writes:
small reference about have using several techniques for performance work
in the 70s ... including multiple regression analysis from the
scientific subroutine library ... and then attempting to perform similar
analysis on large (mainframe) application performance optimization
within the last couple yrs
https://www.garlic.com/~lynn/2007f.html#47 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#48 Is computer history taught now?
https://www.garlic.com/~lynn/2007f.html#51 Is computer history taught now?
https://www.garlic.com/~lynn/2007g.html#41 US Airways badmouths legacy system
however, quicky search engine for ibm's 360 scientific subroutine
library ... among other things turns up in this dusty decks note
"remembering john backus"
http://www.mcjones.org/dustydecks/
and reference from google groups
http://groups.google.com/group/alt.folklore.computers/browse_thread/thread/e85fca76a8f731ce/fd6d58fe51529d07%23fd6d58fe51529d07
SAS history starting in 1976 (gone 404)
http://www.sas.com/presscenter/bgndr_history.html
but lives on at wayback machine
https://web.archive.org/web/20070702202614/http://www.sas.com/presscenter/bgndr_history.html
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Sun, 08 Apr 2007 22:46:34 -0600Rich Alderson <news@alderson.users.panix.com> writes:
as before ... the store cpuid has several parts ... the processor model or processor type ... i.e. like 135, 145, 155, 165, 138, 148, 158, 168, etc ... and the processor serial number ... which could be used for licensing software for a specific processor ... and then some number of other things
vm370 kernel had table of processor numbers ... 135, 145, 155, 165, 138, 148. 158, 168 ... etc ... with some kernel processing parameters specific to that processor. at startup, the kernel would execute the store cpuid ... and then look up the model number (part, not the processor serial number part) in the processing table.
the first post has URL pointer to specification and features of the
store cpuid instruction
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/10.58?SHELF=DZ9ZBK03&DT=20040504121320
so new/updated kernels needed to be shipped when new processor models came out. also there were some issues regarding processors shipped by the clone vendors ... which would have different values for the cpuid.
what i was describing was the resource manager product that i shipped replacing the processor model table with other code that more dynamically determined processor specific characteristic processing (and eliminated the processor model table and the associated code).
the addition of ECPS support to the vm370 kernel presented a
different, but similar type of processor specific adaptation. recent
post mentioning ECPS
https://www.garlic.com/~lynn/2007g.html#44 1960s: IBM mgmt mistrust of SLT for ICs?
Some amount of ECPS was the migration of 370 kernel instructions into the machine (138/148) microcode. The 138/148 microcode avg. about ten micro-instructions for every 370 instruction. The kernel 370 instructions migrated into machine microcode at nearly one-for-one (i.e. one kernel 370 instruction converted almost directly into a single microcode instruction) ... resulting in nearly 10:1 performance increase.
The methodology of this part of ECPS was to define a new "370" instruction that was placed in front of the sequence of kernel instructions that it was "replacing". The new instruction would invoke microcode that exactly implemented the corresponding kernel instruction sequence. The arguments to each of these new instructions included a parameter list ... one of the items in the parameter list was the 370 instruction to resume normal kernel 370 instruction execution (it would appear as if each of the new instructions did a whole bunch of function and then "branched" around all the instructions that it was replacing).
The issue now is what does the kernel do if it boots on a machine that didn't implement all the new ECPS instructions. In this case, the initial kernel boot (w/ECPS support) checks to see whether or not the processor has ECPS support and whether the ECPS "level" corresponds to the "level" of the booted kernel ... if either of these aren't true ... the initial boot has a table of the location of every ECPS instruction in the kernel ... and runs thru the table overlaying every ECPS instruction with 370 "no-op".
Another part of ECPS was taking the microcode for some of the "privilege" instructions and implementing support ... so the microcode implementation includes support for both privilege mode and virtual machine privilege mode. This avoids the interrupt into the kernel for software simulation of the virtual machine privilege instruction.
The ECPS one-for-one instruction replacement worked well on the low
and mid-range 370s (something like 10:1 performance improvement)
... but provided little or no benefit on the high-end 370 processors
... which were started to do 370 instructions in one instruction per
machine cycle. In fact, attempting the one-for-one replacement
strategy on the high-end 370s could even result in performance
degradation for one reason or another. slightly related post
https://www.garlic.com/~lynn/2007g.html#59 IBM to the PCM market
Eventually for the high-end processors, the "SIE" instruction was
introduced ... which was a more complete formalization of virtual
machine mode support for privilege instructions. This was somewhat
what subsequently grew into PR/SM hypervisor mode and the current LPAR
support. a couple past posts mentioning SIE
https://www.garlic.com/~lynn/94.html#37 SIE instruction (S/390)
https://www.garlic.com/~lynn/2000b.html#50 VM (not VMS or Virtual Machine, the IBM sort)
https://www.garlic.com/~lynn/2000b.html#51 VM (not VMS or Virtual Machine, the IBM sort)
https://www.garlic.com/~lynn/2000b.html#52 VM (not VMS or Virtual Machine, the IBM sort)
https://www.garlic.com/~lynn/2001b.html#29 z900 and Virtual Machine Theory
https://www.garlic.com/~lynn/2001g.html#21 Root certificates
https://www.garlic.com/~lynn/2001h.html#71 IBM 9020 FAA/ATC Systems from 1960's
https://www.garlic.com/~lynn/2001h.html#73 Most complex instructions
https://www.garlic.com/~lynn/2001m.html#38 CMS under MVS
https://www.garlic.com/~lynn/2001m.html#53 TSS/360
https://www.garlic.com/~lynn/2002b.html#6 Microcode?
https://www.garlic.com/~lynn/2002b.html#44 PDP-10 Archive migration plan
https://www.garlic.com/~lynn/2002o.html#15 Home mainframes
https://www.garlic.com/~lynn/2002o.html#18 Everything you wanted to know about z900 from IBM
https://www.garlic.com/~lynn/2002p.html#40 Linux paging
https://www.garlic.com/~lynn/2002p.html#44 Linux paging
https://www.garlic.com/~lynn/2002p.html#48 Linux paging
https://www.garlic.com/~lynn/2003.html#5 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#6 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003.html#7 vax6k.openecs.org rebirth
https://www.garlic.com/~lynn/2003b.html#0 Disk drives as commodities. Was Re: Yamhill
https://www.garlic.com/~lynn/2003f.html#54 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003f.html#56 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003j.html#42 Flash 10208
https://www.garlic.com/~lynn/2003n.html#13 CPUs with microcode ?
https://www.garlic.com/~lynn/2003o.html#52 Virtual Machine Concept
https://www.garlic.com/~lynn/2005e.html#57 System/360; Hardwired vs. Microcoded
https://www.garlic.com/~lynn/2006.html#17 {SPAM?} DCSS as SWAP disk for z/Linux
https://www.garlic.com/~lynn/2006c.html#9 Mainframe Jobs Going Away
https://www.garlic.com/~lynn/2006j.html#27 virtual memory
https://www.garlic.com/~lynn/2006j.html#29 How to implement Lpars within Linux
https://www.garlic.com/~lynn/2006j.html#31 virtual memory
https://www.garlic.com/~lynn/2006l.html#22 Virtual Virtualizers
https://www.garlic.com/~lynn/2006n.html#44 Any resources on VLIW?
https://www.garlic.com/~lynn/2006p.html#42 old hypervisor email
https://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?
https://www.garlic.com/~lynn/2007b.html#21 history question
https://www.garlic.com/~lynn/2007c.html#49 SVCs
https://www.garlic.com/~lynn/2007d.html#61 ISA Support for Multithreading
https://www.garlic.com/~lynn/2007d.html#65 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007e.html#39 FBA rant
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Mon, 09 Apr 2007 10:02:44 -0600jmfbahciv writes:
cp67 and vm370 was distributed with full-source ... as well as
maintenance was distributed via source. lots of customers built system
totally from source. i've also mentioned that the share/waterloo tape
eventually had more new/changed source than the base product.
https://www.garlic.com/~lynn/2007e.html#41 IBM S/360 series operating systems history
https://www.garlic.com/~lynn/2007e.html#43 FBA rant
https://www.garlic.com/~lynn/2007g.html#9 The Perfect Computer - 36 bits?
however, complete binaries were distributed so customer could run system w/o having to rebuild from source.
when multiprocessor support started shipping ... there was a single set of source with optional logic generated based on whether or not multiprocessing version was selected (so when building from source, there was configuration option that controlled code generation with or w/o multiprocessor support). and along with that, two different binaries were shipped ... one with multiprocessor support and one w/o multiprocessor support.
lots of past posts about (cp67 and later) vm370-based commercial
interactive timesharing service bureaus (like ncss, idc, tymshare, etc)
https://www.garlic.com/~lynn/submain.html#timeshare
and possibly the largest such operation was the internal
HONE service ... providing world-wide support for marketing, sales,
and field people
https://www.garlic.com/~lynn/subtopic.html#hone
in any case, cp67 and then vm370 was used heavily for interactive, general timesharing.
there was some issues with tweaking the resource manager. first the
control algorithms tended to be more akin to operation research fortran
code (even tho implemented in assembler) intermixed with low-level
kernel assembler code. many of the straight kernel operating system
coders and maintainers found the code-style unfamiliar and hard to decipher
... and would frequently make mistakes when attempting to tweak code in
and/or around resource management control. this could still cause
problems a decade or two after the distributed source code was no longer
my responsibility. various posts concerning some of the features of
the resource manager and/or dynamic adaptive control operation
https://www.garlic.com/~lynn/subtopic.html#fairshare
https://www.garlic.com/~lynn/subtopic.html#wsclock
it also contributed to my being able to ship an embedded "joke" in the
code in plain site ... that was nobody ever picked up on (even when full
logic and source was being explained in university courses) ... recent
post reference joke
https://www.garlic.com/~lynn/2007g.html#56 The Perfect Computer - 36 bits?
the other problem with the resource manager source was that it was
and "add-on" charged for software product ... the resource manager
having been selected as the guinea pig for change to start charging
for kernel software
https://www.garlic.com/~lynn/submain.html#unbundle
the resource manager had shipped prior to vm370 multiprocessor support
(in the base kernel) ... but I had included in the resource manager a
lot of kernel restructuring and other stuff not directly associated with
resource control (including a lot of stuff needed for multiprocessor
support). recent post touching on some of this
https://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2007g.html#44 1960s: IBM mgmt mistrust of SLT for ICs?
the initial policy that had been worked out for kernel software charging
was that hardware/device related support would still be free ... which
obviously multiprocessor support was. The problem was that it would
then be a violation of the policy if the customer was required to
purchase the resource manager in order to get the free multiprocessor
support. the resolution was something like 80-90 percent of the code in
the (first) resource manager release was moved into the base (free)
kernel as part of releasing multiprocessor support. lots of past
posts mentioning multiprocessor and/or related items
https://www.garlic.com/~lynn/subtopic.html#smp
other stuff that went into the resource manager release was a lot of
performance testing and performance modeling ... including heavy
benchmarking as part calibration and verification of the resource
manager under lots of different conditions. part of this included
automated benchmarking procedure and APL-based performance model that
was used to "wander" the landscape of all possible combinations and do
automatic choice of what combination to be used for the next benchmark
(in part based on past benchmark results and how well they conformed
to model projections). the final test sequence before release was 2000
benchmarks that took 3 months elapsed time to run
https://www.garlic.com/~lynn/submain.html#benchmark
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: alt.folklore.computers Date: Mon, 09 Apr 2007 10:49:44 -0600jmfbahciv writes:
case in point may be DASD/disk ... since DASD had been chosen as a generic term (for general class of devices) well before disks had come to dominate the landscape.
slightly related thread discussing various devices of the datacell
variety
https://www.garlic.com/~lynn/2007f.html#2 FBA rant
https://www.garlic.com/~lynn/2007f.html#3 FBA rant
https://www.garlic.com/~lynn/2007f.html#5 FBA rant
https://www.garlic.com/~lynn/2007f.html#12 FBA rant
and many in the younger generation not even being aware that disks may not have even been one of the original direct access storage devices.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Mon, 09 Apr 2007 11:36:42 -0600jmfbahciv writes:
i've joked in the past about psuedo rivalry between the 5th flr where
multics was being done and the science center on the 4th flr doing
cp67/cms (originally cp40/cms and then morphed into vm370/cms)
https://www.garlic.com/~lynn/subtopic.html#545tech
... and in many minds that the corporate customer set was exclusive batch.
part of the issue was that (at least in much of the 70s), the size of the batch customer set was much larger than the size of the cp67/vm370 interactive customer set.
in turn, the size of the cp67/vm370 interactive customer set was much
larger than the size of the internal cp67/vm370 interactive customer
set. note however, the internal network was dominated by cp67/vm370
machines ... and was larger than the arpanet/internet from just
about the beginning until possibly mid-85.
https://www.garlic.com/~lynn/subnetwork.html#internalnet
and the total size of the internal cp67/vm370 interactive customer set
was much larger than just the internal customers that i would directly
ship highly modified kernel product to ... some old email and recent
references
https://www.garlic.com/~lynn/2007g.html#9 The Perfect Computer - 36 bits?
https://www.garlic.com/~lynn/2006w.html#email750430
https://www.garlic.com/~lynn/2006u.html#email800429
https://www.garlic.com/~lynn/2007c.html#email830711
However, at one point, the number of systems I was shipping production systems for were around the same as the total Multics installations (in the whole Multics lifetime).
past posts also raising this comparison
https://www.garlic.com/~lynn/2000f.html#60 360 Architecture, Multics, ... was (Re: X86 ultimate CISC? No.)
https://www.garlic.com/~lynn/2001h.html#34 D
https://www.garlic.com/~lynn/2001i.html#55 Computer security: The Future
https://www.garlic.com/~lynn/2002b.html#64 ... the need for a Museum of Computer Software
https://www.garlic.com/~lynn/2003d.html#68 unix
https://www.garlic.com/~lynn/2003g.html#29 Lisp Machines
https://www.garlic.com/~lynn/2004c.html#47 IBM 360 memory
https://www.garlic.com/~lynn/2005d.html#39 Thou shalt have no other gods before the ANSI C standard
https://www.garlic.com/~lynn/2005q.html#39 How To Abandon Microsoft
https://www.garlic.com/~lynn/2005t.html#46 winscape?
https://www.garlic.com/~lynn/2006k.html#35 PDP-1
https://www.garlic.com/~lynn/2006m.html#25 Mainframe Limericks
https://www.garlic.com/~lynn/2006x.html#19 The Future of CPUs: What's After Multi-Core?
https://www.garlic.com/~lynn/2007b.html#51 Special characters in passwords was Re: RACF - Password rules
https://www.garlic.com/~lynn/2007c.html#12 Special characters in passwords was Re: RACF - Password rules
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: comp.arch,alt.folklore.computers Date: Mon, 09 Apr 2007 11:58:26 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
for other drift ... one of the reasons that arpanet/internet exceeded the size of the internal network in mid-85 timeframe was internet was adding an increasing number of workstations and PCs ad nodes ... while the internal network remained (almost purely) mainframe (except possibly one or two A74s ... precursor to p370/p390).
PCs saw some amount of uptake in corporate environments because of terminal emulation support; corporation could get a PC for about the same price as a 3270 terminal ... and have in a single desktop footprint both 3270 terminal operation as well as some amount of local computer (relatively easy business case to make ... if a company was already budgeted to buy 3270 terminals ... to buy PC in its place).
this spawned a fairly large install base of terminal emulation PCs
... and then subsequently some amount of corporate politics around
protecting the terminal install base (in the face of industry starting
to move into peer-to-peer networking and client/server technology).
https://www.garlic.com/~lynn/subnetwork.html#emulation
we ran into such corporate polictics when we were doing HSDT (high-speed
data transport) project
https://www.garlic.com/~lynn/subnetwork.html#hsdt
as well as when we were out pitching 3-tier networking architecture
and facing conflict with "SAA" (which could be construed as corporate
effort attempting to hold the terminal emulation line)
https://www.garlic.com/~lynn/subnetwork.html#3tier
there was even some interesting politics when i had done RFC 1044
support for the standard mainframe tcp/ip product. The standard product
would get about 40kbyte/sec thruput on 3090 ... consuming nearly a full
3090 processor. In some tuning work at Cray Research, we were getting
mainframe channel thruput (1mbyte/sec) between a 4341 clone and a cray
(using only a modest amount of the 4341 clone)
https://www.garlic.com/~lynn/subnetwork.html#1044
recent reference/post to some other work for HSDT thruput
https://www.garlic.com/~lynn/2007g.html#70 The Perfect Computer - 36 bits?
misc. past posts referring to A74:
https://www.garlic.com/~lynn/2000e.html#55 Why not an IBM zSeries workstation?
https://www.garlic.com/~lynn/2000e.html#56 Why not an IBM zSeries workstation?
https://www.garlic.com/~lynn/2001i.html#19 Very CISC Instuctions (Was: why the machine word size ...)
https://www.garlic.com/~lynn/2001i.html#51 DARPA was: Short Watson Biography
https://www.garlic.com/~lynn/2002d.html#4 IBM Mainframe at home
https://www.garlic.com/~lynn/2002l.html#27 End of Moore's law and how it can influence job market
https://www.garlic.com/~lynn/2003f.html#56 ECPS:VM DISPx instructions
https://www.garlic.com/~lynn/2003h.html#40 IBM system 370
https://www.garlic.com/~lynn/2003m.html#15 IEFBR14 Problems
https://www.garlic.com/~lynn/2004l.html#65 computer industry scenairo before the invention of the PC?
https://www.garlic.com/~lynn/2004m.html#7 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2004m.html#8 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2004m.html#10 Whatever happened to IBM's VM PC software?
https://www.garlic.com/~lynn/2007c.html#14 How many 36-bit Unix ports in the old days?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Memory Mapped Vs I/O Mapped Vs others Newsgroups: alt.folklore.computers Date: Mon, 09 Apr 2007 12:43:42 -0600Walter Bushell <proto@oanix.com> writes:
i still have trailblazer packed away in some box ... but i think it was something over a decade between i first started using 1200 baud and when trailblazer came out.
i was using it among other things for uucp/usenet feed (which had special optimized mode) ... but not for long, i got an opportunity to test pagesat feed ... for free in return for doing some of the driver code and co-authoring an article for broadband magazine.
misc. past posts mentioning trailblazer and/or pagesat:
https://www.garlic.com/~lynn/2000e.html#39 I'll Be! Al Gore DID Invent the Internet After All ! NOT
https://www.garlic.com/~lynn/2001e.html#62 Modem "mating calls"
https://www.garlic.com/~lynn/2001e.html#63 Modem "mating calls"
https://www.garlic.com/~lynn/2001h.html#66 UUCP email
https://www.garlic.com/~lynn/2003g.html#6 Oldest system to run a web browser?
https://www.garlic.com/~lynn/2003k.html#33 The Vintage Computer Forum
https://www.garlic.com/~lynn/2005l.html#20 Newsgroups (Was Another OS/390 to z/OS 1.4 migration
https://www.garlic.com/~lynn/2006m.html#11 An Out-of-the-Main Activity
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: alt.folklore.computers Date: Mon, 09 Apr 2007 14:32:44 -0600pechter@pechter.dyndns.org (William Pechter) writes:
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Working while young Newsgroups: alt.folklore.computers Date: Mon, 09 Apr 2007 14:44:33 -0600jmfbahciv writes:
4th of july, 11 yrs old, place firecracker in the palm of your hand and light it (professional driver on closed course, kids don't try this at home) ... basically matter of callouses ... somewhat akin to kids in summer being able to walk barefoot across sand in direct sunlight and outside temperature is 100+.
later being on construction job handling re-bar with bare hands when everybody else was wearing leather gloves.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market(the sky is falling!!!the sky is falling!!) Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 10 Apr 2007 00:25:24 -0600gilmap@ibm-main.lst (Paul Gilmartin) writes:
part of the 3-tier and middle ware/layer executive presentations involved e-net (as opposed to 16mbit t/r). the "word" was that e-net only could get 1mbit thruput. However, it appeared that they must of been using for the comparison, the original 3mbit enet before listen-before-transmit.
there was an '88 acm sigcomm article that configuration of something like 40 stations in low-level device driver loop constantly transmitting minimum sized packets ... that 10mbit e-net over CAT4 would drop off to only 8mbits effective thruput.
along with that, the new almaden bldg. had been wired w/CAT4 supposedly for 16mbit t/r ... but tests were showing that 10mbit enet over the CAT4 had both higher effective thruput as well as lower latency than 16mbit t/r over the same CAT4.
disclaimer: my wife had been con'ed into going to pok to be in charge
of loosely-coupled architecture. while there she came out with
Peer-Coupled Shared Data architecture ... misc past postings
https://www.garlic.com/~lynn/submain.html#shareddata
and also while in pok was co-inventor on token-passing ring patent (that was subsequently granted).
and except for ims hot-standby ... the Peer-Coupled Shared Data architecture saw very little uptake until sysplex.
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 10 Apr 2007 04:44:28 -0600re:
so there were two somewhat different issues in the 16mbit tr vis-a-vis 10mbit enet and the SAA scenario ... one is the overall aggregate LAN thruput as per above referenced post. the other was the design point of the individual adapter boards.
The PS2 group was heavily pressuring the 6000 organization to use all of their microchannel adapters (and not do ones of their own). there was this joke that the result was going to be that 6000s would perform like PS2s.
In the SAA scenario, machines mostly interacting over the network with terminal emulation to a mainframe. As a result the individual adapter cards (including 16mbit t/r adapters) had design point of relatively low per adapter thruput. In the 6000 case with 2tier and 3tier environments, high performance workstations client has full bandwidth bursty operation ... and the servers handle the aggregate bandwidth requirements of all the assembled clients.
The 6000 organization had previously done their own (16bit) 4mbit t/r
adatper for the PC/RT ... and the per adapter thruput of the PC/RT 4mbit
t/r card was higher than the per adapter thruput of the PS2
(microchannel) 16mbit t/r card. The SAA scenario for the 16mbit t/r card
was 300 machines sharing the same 16mbit LAN bandwidth (doing mostly
terminal emulation) ... so the avg. per machine bandwidth was presummed
to be actually quite low (far below requirements of 2tier/3tier
operation and high performance workstations) other posts mentioning SAA
and/or the terminal emulation focus
https://www.garlic.com/~lynn/subnetwork.html#emulation
The other arrows from both the SAA and PS2 groups ... was that for a
lengthy period I had been doing somewhat a weekly trends and directions
posting to an internal forum ... that included the quantity one prices
from the sunday sjmn. These turned out to be possibly 1/3rd to 1/5th the
(official?) projected prices out of the PS2 organization ... old posts
with samples (as well as summary from forrester report from the period on
the projected future of the mainframe):
https://www.garlic.com/~lynn/2001n.html#79 a.f.c history checkup...
https://www.garlic.com/~lynn/2001n.html#80 a.f.c history checkup...
https://www.garlic.com/~lynn/2001n.html#81 a.f.c history checkup...
https://www.garlic.com/~lynn/2001n.html#82 a.f.c history checkup...
Then the head of PS2 organization hired Dataquest to do an in-depth projection of PCs in five yrs ... and the study was to include a several hr video taped round table with a dozen leading silicon valley experts.
Dataquest invited me to be one of the experts. I cleared it with my management and then explained to Dataquest that the PS2 organization wouldn't be happy to see my name ... so in the video taped introduction, Dataquest managed to garble both my name and affiliation.
One of the reasons that this had come up was that we were working with
Dataquest on a in-depth study of projected world-wide uptake of
high-speed interconnect. This was in support of HA/CMP scale-up work we
were doing ... for both numerical intensive as well as commercial
applications.
https://www.garlic.com/~lynn/subtopic.html#hacmp
old posts mentioning some of the discussions on the commercial side
https://www.garlic.com/~lynn/95.html#13
https://www.garlic.com/~lynn/96.html#15
https://www.garlic.com/~lynn/2001n.html#83
and some old email discussing various aspects of the scale-up work
https://www.garlic.com/~lynn/lhwemail.html#medusa
this was about the last email in the series
https://www.garlic.com/~lynn/2006x.html#email920129
in this post
https://www.garlic.com/~lynn/2006x.html#3 Why so little parallelism?
just before the effort was transferred (and redirected away from the commercial aspects) and we were told to stop working on anything with more than four processors.
and post with old email from decade earlier on some commercial
characteristics
https://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
https://www.garlic.com/~lynn/2007.html#email801006
https://www.garlic.com/~lynn/2007.html#email801016
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market Newsgroups: bit.listserv.ibm-main,alt.folklore.computers Date: Tue, 10 Apr 2007 10:00:47 -0600allan.staller@ibm-main.lst (Staller, Allan) writes:
now cp67 & vm370 did strictly account for nearly every clock tick ... back when MVS cature ratio typically ran around 40-50 percent ... but could be less (and the "uncaptured" time was essentially all kernel or other system services).
some posts discussing (along with old email) large internal
applications migrating from MVS to VM. recent reference about large
Burlington chip design Fortran app starting to exceed size available
for MVS applications.
https://www.garlic.com/~lynn/2007g.html#59 IBM to the PCM market
Part of the issue was it was becoming more and more difficult to find
places to stash away additional high-end machines (168, 3033, etc)
... but you could squirrel away 4341s in nearly every nick and corner
(but the lack of accurate timings, "capture ratio", played heavily)
https://www.garlic.com/~lynn/2006p.html#40 25th Anniversary of the Personal Computer
https://www.garlic.com/~lynn/2006v.html#17 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006v.html#19 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006v.html#23 Ranking of non-IBM mainframe builders?
https://www.garlic.com/~lynn/2006v.html#25 Ranking of non-IBM mainframe builders?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: IBM to the PCM market Newsgroups: bit.listserv.ibm-main,alt.folklore.computers To: <ibm-main@bama.ua.edu> Date: Tue, 10 Apr 2007 10:50:28 -0600Anne & Lynn Wheeler <lynn@garlic.com> writes:
again it is how you are accounting for the values. in typical vm/cms environment the supervisor/problem split means that all of the supervisor is in the vm kernel and all of problem is in the CMS application (cms "kernel" pathlengths mostly being almost negligible). however, nearly all of vm kernel supervisor is directly accounted to application virtual address spaces ... with the remaining supervisor still being directly accounted for, but against a "special" system task.
now a lot more of unix work on behalf of applications show up as "straight" supervisor time ... for instance all of the tcp/ip stack typically shows up in a (unix) kernel ... and shows up as supervisor. However, a typical unix tcp/ip pathlength is significantly shorter than any corresponding pathlength thru VTAM (while the accounting for instructions may be radically different ... the number of instructions to implement similar function can be orders of magnitude less).
for other drift some posts mentioning microkernel efforts to get
tcp/ip stack out of kernel space.
https://www.garlic.com/~lynn/2006p.html#13 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?
https://www.garlic.com/~lynn/2007e.html#11 A way to speed up level 1 caches
part of the above is earlier thread
https://www.garlic.com/~lynn/2006p.html#10 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006p.html#11 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006p.html#19 What part of z/OS is the OS?
https://www.garlic.com/~lynn/2006p.html#27 What part of z/OS is the OS?
From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: The Perfect Computer - 36 bits? Newsgroups: alt.folklore.computers Date: Tue, 10 Apr 2007 11:29:13 -0600pechter@pechter.dyndns.org (William Pechter) writes:
late 82 dialed to csnet ... slightly before 1jan83 switch-over to
internetworking protocol
https://www.garlic.com/~lynn/internet.htm#0
https://www.garlic.com/~lynn/internet.htm#1
https://www.garlic.com/~lynn/internet.htm#2
https://www.garlic.com/~lynn/internet.htm#3
old email finally getting class A subnet
https://www.garlic.com/~lynn/2006j.html#53 Arpa address
of course the internal network had been going strong ... being
larger than the arpanet/internet from justa bout the beginning
until sometime mid-85. recent post/reference
https://www.garlic.com/~lynn/2007g.html#48 The Perfect Computer - 36 bits?
old post with email distribution announcing internal network
https://www.garlic.com/~lynn/subnetwork.html#internalnet
passing 1000 nodes in '83
https://www.garlic.com/~lynn/internet.htm#22